Revision a8170e5e hw/vga-isa-mm.c
| b/hw/vga-isa-mm.c | ||
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| 36 | 36 |
} ISAVGAMMState; |
| 37 | 37 |
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/* Memory mapped interface */ |
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static uint32_t vga_mm_readb (void *opaque, target_phys_addr_t addr)
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static uint32_t vga_mm_readb (void *opaque, hwaddr addr)
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{
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ISAVGAMMState *s = opaque; |
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|
| ... | ... | |
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} |
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static void vga_mm_writeb (void *opaque, |
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target_phys_addr_t addr, uint32_t value)
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hwaddr addr, uint32_t value)
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{
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ISAVGAMMState *s = opaque; |
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vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xff); |
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} |
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static uint32_t vga_mm_readw (void *opaque, target_phys_addr_t addr)
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static uint32_t vga_mm_readw (void *opaque, hwaddr addr)
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{
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ISAVGAMMState *s = opaque; |
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|
| ... | ... | |
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} |
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static void vga_mm_writew (void *opaque, |
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target_phys_addr_t addr, uint32_t value)
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hwaddr addr, uint32_t value)
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{
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ISAVGAMMState *s = opaque; |
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vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xffff); |
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} |
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static uint32_t vga_mm_readl (void *opaque, target_phys_addr_t addr)
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static uint32_t vga_mm_readl (void *opaque, hwaddr addr)
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{
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ISAVGAMMState *s = opaque; |
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|
| ... | ... | |
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} |
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static void vga_mm_writel (void *opaque, |
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target_phys_addr_t addr, uint32_t value)
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hwaddr addr, uint32_t value)
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{
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ISAVGAMMState *s = opaque; |
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|
| ... | ... | |
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.endianness = DEVICE_NATIVE_ENDIAN, |
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}; |
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static void vga_mm_init(ISAVGAMMState *s, target_phys_addr_t vram_base,
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target_phys_addr_t ctrl_base, int it_shift,
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static void vga_mm_init(ISAVGAMMState *s, hwaddr vram_base,
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hwaddr ctrl_base, int it_shift,
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MemoryRegion *address_space) |
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{
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MemoryRegion *s_ioport_ctrl, *vga_io_memory; |
| ... | ... | |
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memory_region_set_coalescing(vga_io_memory); |
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} |
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int isa_vga_mm_init(target_phys_addr_t vram_base,
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target_phys_addr_t ctrl_base, int it_shift,
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int isa_vga_mm_init(hwaddr vram_base,
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hwaddr ctrl_base, int it_shift,
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MemoryRegion *address_space) |
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{
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ISAVGAMMState *s; |
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