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1
/*
2
 * OMAP LCD controller.
3
 *
4
 * Copyright (C) 2006-2007 Andrzej Zaborowski  <balrog@zabor.org>
5
 *
6
 * This program is free software; you can redistribute it and/or
7
 * modify it under the terms of the GNU General Public License as
8
 * published by the Free Software Foundation; either version 2 of
9
 * the License, or (at your option) any later version.
10
 *
11
 * This program is distributed in the hope that it will be useful,
12
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
 * GNU General Public License for more details.
15
 *
16
 * You should have received a copy of the GNU General Public License along
17
 * with this program; if not, see <http://www.gnu.org/licenses/>.
18
 */
19
#include "hw.h"
20
#include "console.h"
21
#include "omap.h"
22
#include "framebuffer.h"
23

    
24
struct omap_lcd_panel_s {
25
    MemoryRegion *sysmem;
26
    MemoryRegion iomem;
27
    qemu_irq irq;
28
    DisplayState *state;
29

    
30
    int plm;
31
    int tft;
32
    int mono;
33
    int enable;
34
    int width;
35
    int height;
36
    int interrupts;
37
    uint32_t timing[3];
38
    uint32_t subpanel;
39
    uint32_t ctrl;
40

    
41
    struct omap_dma_lcd_channel_s *dma;
42
    uint16_t palette[256];
43
    int palette_done;
44
    int frame_done;
45
    int invalidate;
46
    int sync_error;
47
};
48

    
49
static void omap_lcd_interrupts(struct omap_lcd_panel_s *s)
50
{
51
    if (s->frame_done && (s->interrupts & 1)) {
52
        qemu_irq_raise(s->irq);
53
        return;
54
    }
55

    
56
    if (s->palette_done && (s->interrupts & 2)) {
57
        qemu_irq_raise(s->irq);
58
        return;
59
    }
60

    
61
    if (s->sync_error) {
62
        qemu_irq_raise(s->irq);
63
        return;
64
    }
65

    
66
    qemu_irq_lower(s->irq);
67
}
68

    
69
#include "pixel_ops.h"
70

    
71
#define draw_line_func drawfn
72

    
73
#define DEPTH 8
74
#include "omap_lcd_template.h"
75
#define DEPTH 15
76
#include "omap_lcd_template.h"
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#define DEPTH 16
78
#include "omap_lcd_template.h"
79
#define DEPTH 32
80
#include "omap_lcd_template.h"
81

    
82
static draw_line_func draw_line_table2[33] = {
83
    [0 ... 32]        = NULL,
84
    [8]                = draw_line2_8,
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    [15]        = draw_line2_15,
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    [16]        = draw_line2_16,
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    [32]        = draw_line2_32,
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}, draw_line_table4[33] = {
89
    [0 ... 32]        = NULL,
90
    [8]                = draw_line4_8,
91
    [15]        = draw_line4_15,
92
    [16]        = draw_line4_16,
93
    [32]        = draw_line4_32,
94
}, draw_line_table8[33] = {
95
    [0 ... 32]        = NULL,
96
    [8]                = draw_line8_8,
97
    [15]        = draw_line8_15,
98
    [16]        = draw_line8_16,
99
    [32]        = draw_line8_32,
100
}, draw_line_table12[33] = {
101
    [0 ... 32]        = NULL,
102
    [8]                = draw_line12_8,
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    [15]        = draw_line12_15,
104
    [16]        = draw_line12_16,
105
    [32]        = draw_line12_32,
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}, draw_line_table16[33] = {
107
    [0 ... 32]        = NULL,
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    [8]                = draw_line16_8,
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    [15]        = draw_line16_15,
110
    [16]        = draw_line16_16,
111
    [32]        = draw_line16_32,
112
};
113

    
114
static void omap_update_display(void *opaque)
115
{
116
    struct omap_lcd_panel_s *omap_lcd = (struct omap_lcd_panel_s *) opaque;
117
    draw_line_func draw_line;
118
    int size, height, first, last;
119
    int width, linesize, step, bpp, frame_offset;
120
    hwaddr frame_base;
121

    
122
    if (!omap_lcd || omap_lcd->plm == 1 ||
123
                    !omap_lcd->enable || !ds_get_bits_per_pixel(omap_lcd->state))
124
        return;
125

    
126
    frame_offset = 0;
127
    if (omap_lcd->plm != 2) {
128
        cpu_physical_memory_read(omap_lcd->dma->phys_framebuffer[
129
                                  omap_lcd->dma->current_frame],
130
                                 (void *)omap_lcd->palette, 0x200);
131
        switch (omap_lcd->palette[0] >> 12 & 7) {
132
        case 3 ... 7:
133
            frame_offset += 0x200;
134
            break;
135
        default:
136
            frame_offset += 0x20;
137
        }
138
    }
139

    
140
    /* Colour depth */
141
    switch ((omap_lcd->palette[0] >> 12) & 7) {
142
    case 1:
143
        draw_line = draw_line_table2[ds_get_bits_per_pixel(omap_lcd->state)];
144
        bpp = 2;
145
        break;
146

    
147
    case 2:
148
        draw_line = draw_line_table4[ds_get_bits_per_pixel(omap_lcd->state)];
149
        bpp = 4;
150
        break;
151

    
152
    case 3:
153
        draw_line = draw_line_table8[ds_get_bits_per_pixel(omap_lcd->state)];
154
        bpp = 8;
155
        break;
156

    
157
    case 4 ... 7:
158
        if (!omap_lcd->tft)
159
            draw_line = draw_line_table12[ds_get_bits_per_pixel(omap_lcd->state)];
160
        else
161
            draw_line = draw_line_table16[ds_get_bits_per_pixel(omap_lcd->state)];
162
        bpp = 16;
163
        break;
164

    
165
    default:
166
        /* Unsupported at the moment.  */
167
        return;
168
    }
169

    
170
    /* Resolution */
171
    width = omap_lcd->width;
172
    if (width != ds_get_width(omap_lcd->state) ||
173
            omap_lcd->height != ds_get_height(omap_lcd->state)) {
174
        qemu_console_resize(omap_lcd->state,
175
                            omap_lcd->width, omap_lcd->height);
176
        omap_lcd->invalidate = 1;
177
    }
178

    
179
    if (omap_lcd->dma->current_frame == 0)
180
        size = omap_lcd->dma->src_f1_bottom - omap_lcd->dma->src_f1_top;
181
    else
182
        size = omap_lcd->dma->src_f2_bottom - omap_lcd->dma->src_f2_top;
183

    
184
    if (frame_offset + ((width * omap_lcd->height * bpp) >> 3) > size + 2) {
185
        omap_lcd->sync_error = 1;
186
        omap_lcd_interrupts(omap_lcd);
187
        omap_lcd->enable = 0;
188
        return;
189
    }
190

    
191
    /* Content */
192
    frame_base = omap_lcd->dma->phys_framebuffer[
193
            omap_lcd->dma->current_frame] + frame_offset;
194
    omap_lcd->dma->condition |= 1 << omap_lcd->dma->current_frame;
195
    if (omap_lcd->dma->interrupts & 1)
196
        qemu_irq_raise(omap_lcd->dma->irq);
197
    if (omap_lcd->dma->dual)
198
        omap_lcd->dma->current_frame ^= 1;
199

    
200
    if (!ds_get_bits_per_pixel(omap_lcd->state))
201
        return;
202

    
203
    first = 0;
204
    height = omap_lcd->height;
205
    if (omap_lcd->subpanel & (1 << 31)) {
206
        if (omap_lcd->subpanel & (1 << 29))
207
            first = (omap_lcd->subpanel >> 16) & 0x3ff;
208
        else
209
            height = (omap_lcd->subpanel >> 16) & 0x3ff;
210
        /* TODO: fill the rest of the panel with DPD */
211
    }
212

    
213
    step = width * bpp >> 3;
214
    linesize = ds_get_linesize(omap_lcd->state);
215
    framebuffer_update_display(omap_lcd->state, omap_lcd->sysmem,
216
                               frame_base, width, height,
217
                               step, linesize, 0,
218
                               omap_lcd->invalidate,
219
                               draw_line, omap_lcd->palette,
220
                               &first, &last);
221
    if (first >= 0) {
222
        dpy_update(omap_lcd->state, 0, first, width, last - first + 1);
223
    }
224
    omap_lcd->invalidate = 0;
225
}
226

    
227
static void omap_ppm_save(const char *filename, uint8_t *data,
228
                    int w, int h, int linesize, Error **errp)
229
{
230
    FILE *f;
231
    uint8_t *d, *d1;
232
    unsigned int v;
233
    int ret, y, x, bpp;
234

    
235
    f = fopen(filename, "wb");
236
    if (!f) {
237
        error_setg(errp, "failed to open file '%s': %s", filename,
238
                   strerror(errno));
239
        return;
240
    }
241
    ret = fprintf(f, "P6\n%d %d\n%d\n", w, h, 255);
242
    if (ret < 0) {
243
        goto write_err;
244
    }
245
    d1 = data;
246
    bpp = linesize / w;
247
    for (y = 0; y < h; y ++) {
248
        d = d1;
249
        for (x = 0; x < w; x ++) {
250
            v = *(uint32_t *) d;
251
            switch (bpp) {
252
            case 2:
253
                ret = fputc((v >> 8) & 0xf8, f);
254
                if (ret == EOF) {
255
                    goto write_err;
256
                }
257
                ret = fputc((v >> 3) & 0xfc, f);
258
                if (ret == EOF) {
259
                    goto write_err;
260
                }
261
                ret = fputc((v << 3) & 0xf8, f);
262
                if (ret == EOF) {
263
                    goto write_err;
264
                }
265
                break;
266
            case 3:
267
            case 4:
268
            default:
269
                ret = fputc((v >> 16) & 0xff, f);
270
                if (ret == EOF) {
271
                    goto write_err;
272
                }
273
                ret = fputc((v >> 8) & 0xff, f);
274
                if (ret == EOF) {
275
                    goto write_err;
276
                }
277
                ret = fputc((v) & 0xff, f);
278
                if (ret == EOF) {
279
                    goto write_err;
280
                }
281
                break;
282
            }
283
            d += bpp;
284
        }
285
        d1 += linesize;
286
    }
287
out:
288
    fclose(f);
289
    return;
290

    
291
write_err:
292
    error_setg(errp, "failed to write to file '%s': %s", filename,
293
               strerror(errno));
294
    unlink(filename);
295
    goto out;
296
}
297

    
298
static void omap_screen_dump(void *opaque, const char *filename, bool cswitch,
299
                             Error **errp)
300
{
301
    struct omap_lcd_panel_s *omap_lcd = opaque;
302

    
303
    omap_update_display(opaque);
304
    if (omap_lcd && ds_get_data(omap_lcd->state))
305
        omap_ppm_save(filename, ds_get_data(omap_lcd->state),
306
                    omap_lcd->width, omap_lcd->height,
307
                    ds_get_linesize(omap_lcd->state), errp);
308
}
309

    
310
static void omap_invalidate_display(void *opaque) {
311
    struct omap_lcd_panel_s *omap_lcd = opaque;
312
    omap_lcd->invalidate = 1;
313
}
314

    
315
static void omap_lcd_update(struct omap_lcd_panel_s *s) {
316
    if (!s->enable) {
317
        s->dma->current_frame = -1;
318
        s->sync_error = 0;
319
        if (s->plm != 1)
320
            s->frame_done = 1;
321
        omap_lcd_interrupts(s);
322
        return;
323
    }
324

    
325
    if (s->dma->current_frame == -1) {
326
        s->frame_done = 0;
327
        s->palette_done = 0;
328
        s->dma->current_frame = 0;
329
    }
330

    
331
    if (!s->dma->mpu->port[s->dma->src].addr_valid(s->dma->mpu,
332
                            s->dma->src_f1_top) ||
333
                    !s->dma->mpu->port[
334
                    s->dma->src].addr_valid(s->dma->mpu,
335
                            s->dma->src_f1_bottom) ||
336
                    (s->dma->dual &&
337
                     (!s->dma->mpu->port[
338
                      s->dma->src].addr_valid(s->dma->mpu,
339
                              s->dma->src_f2_top) ||
340
                      !s->dma->mpu->port[
341
                      s->dma->src].addr_valid(s->dma->mpu,
342
                              s->dma->src_f2_bottom)))) {
343
        s->dma->condition |= 1 << 2;
344
        if (s->dma->interrupts & (1 << 1))
345
            qemu_irq_raise(s->dma->irq);
346
        s->enable = 0;
347
        return;
348
    }
349

    
350
    s->dma->phys_framebuffer[0] = s->dma->src_f1_top;
351
    s->dma->phys_framebuffer[1] = s->dma->src_f2_top;
352

    
353
    if (s->plm != 2 && !s->palette_done) {
354
        cpu_physical_memory_read(
355
            s->dma->phys_framebuffer[s->dma->current_frame],
356
            (void *)s->palette, 0x200);
357
        s->palette_done = 1;
358
        omap_lcd_interrupts(s);
359
    }
360
}
361

    
362
static uint64_t omap_lcdc_read(void *opaque, hwaddr addr,
363
                               unsigned size)
364
{
365
    struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque;
366

    
367
    switch (addr) {
368
    case 0x00:        /* LCD_CONTROL */
369
        return (s->tft << 23) | (s->plm << 20) |
370
                (s->tft << 7) | (s->interrupts << 3) |
371
                (s->mono << 1) | s->enable | s->ctrl | 0xfe000c34;
372

    
373
    case 0x04:        /* LCD_TIMING0 */
374
        return (s->timing[0] << 10) | (s->width - 1) | 0x0000000f;
375

    
376
    case 0x08:        /* LCD_TIMING1 */
377
        return (s->timing[1] << 10) | (s->height - 1);
378

    
379
    case 0x0c:        /* LCD_TIMING2 */
380
        return s->timing[2] | 0xfc000000;
381

    
382
    case 0x10:        /* LCD_STATUS */
383
        return (s->palette_done << 6) | (s->sync_error << 2) | s->frame_done;
384

    
385
    case 0x14:        /* LCD_SUBPANEL */
386
        return s->subpanel;
387

    
388
    default:
389
        break;
390
    }
391
    OMAP_BAD_REG(addr);
392
    return 0;
393
}
394

    
395
static void omap_lcdc_write(void *opaque, hwaddr addr,
396
                            uint64_t value, unsigned size)
397
{
398
    struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque;
399

    
400
    switch (addr) {
401
    case 0x00:        /* LCD_CONTROL */
402
        s->plm = (value >> 20) & 3;
403
        s->tft = (value >> 7) & 1;
404
        s->interrupts = (value >> 3) & 3;
405
        s->mono = (value >> 1) & 1;
406
        s->ctrl = value & 0x01cff300;
407
        if (s->enable != (value & 1)) {
408
            s->enable = value & 1;
409
            omap_lcd_update(s);
410
        }
411
        break;
412

    
413
    case 0x04:        /* LCD_TIMING0 */
414
        s->timing[0] = value >> 10;
415
        s->width = (value & 0x3ff) + 1;
416
        break;
417

    
418
    case 0x08:        /* LCD_TIMING1 */
419
        s->timing[1] = value >> 10;
420
        s->height = (value & 0x3ff) + 1;
421
        break;
422

    
423
    case 0x0c:        /* LCD_TIMING2 */
424
        s->timing[2] = value;
425
        break;
426

    
427
    case 0x10:        /* LCD_STATUS */
428
        break;
429

    
430
    case 0x14:        /* LCD_SUBPANEL */
431
        s->subpanel = value & 0xa1ffffff;
432
        break;
433

    
434
    default:
435
        OMAP_BAD_REG(addr);
436
    }
437
}
438

    
439
static const MemoryRegionOps omap_lcdc_ops = {
440
    .read = omap_lcdc_read,
441
    .write = omap_lcdc_write,
442
    .endianness = DEVICE_NATIVE_ENDIAN,
443
};
444

    
445
void omap_lcdc_reset(struct omap_lcd_panel_s *s)
446
{
447
    s->dma->current_frame = -1;
448
    s->plm = 0;
449
    s->tft = 0;
450
    s->mono = 0;
451
    s->enable = 0;
452
    s->width = 0;
453
    s->height = 0;
454
    s->interrupts = 0;
455
    s->timing[0] = 0;
456
    s->timing[1] = 0;
457
    s->timing[2] = 0;
458
    s->subpanel = 0;
459
    s->palette_done = 0;
460
    s->frame_done = 0;
461
    s->sync_error = 0;
462
    s->invalidate = 1;
463
    s->subpanel = 0;
464
    s->ctrl = 0;
465
}
466

    
467
struct omap_lcd_panel_s *omap_lcdc_init(MemoryRegion *sysmem,
468
                                        hwaddr base,
469
                                        qemu_irq irq,
470
                                        struct omap_dma_lcd_channel_s *dma,
471
                                        omap_clk clk)
472
{
473
    struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *)
474
            g_malloc0(sizeof(struct omap_lcd_panel_s));
475

    
476
    s->irq = irq;
477
    s->dma = dma;
478
    s->sysmem = sysmem;
479
    omap_lcdc_reset(s);
480

    
481
    memory_region_init_io(&s->iomem, &omap_lcdc_ops, s, "omap.lcdc", 0x100);
482
    memory_region_add_subregion(sysmem, base, &s->iomem);
483

    
484
    s->state = graphic_console_init(omap_update_display,
485
                                    omap_invalidate_display,
486
                                    omap_screen_dump, NULL, s);
487

    
488
    return s;
489
}