root / hw / ppce500_spin.c @ a8170e5e
History | View | Annotate | Download (5.6 kB)
1 |
/*
|
---|---|
2 |
* QEMU PowerPC e500v2 ePAPR spinning code
|
3 |
*
|
4 |
* Copyright (C) 2011 Freescale Semiconductor, Inc. All rights reserved.
|
5 |
*
|
6 |
* Author: Alexander Graf, <agraf@suse.de>
|
7 |
*
|
8 |
* This library is free software; you can redistribute it and/or
|
9 |
* modify it under the terms of the GNU Lesser General Public
|
10 |
* License as published by the Free Software Foundation; either
|
11 |
* version 2 of the License, or (at your option) any later version.
|
12 |
*
|
13 |
* This library is distributed in the hope that it will be useful,
|
14 |
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
15 |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
16 |
* Lesser General Public License for more details.
|
17 |
*
|
18 |
* You should have received a copy of the GNU Lesser General Public
|
19 |
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
20 |
*
|
21 |
* This code is not really a device, but models an interface that usually
|
22 |
* firmware takes care of. It's used when QEMU plays the role of firmware.
|
23 |
*
|
24 |
* Specification:
|
25 |
*
|
26 |
* https://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.1.pdf
|
27 |
*
|
28 |
*/
|
29 |
|
30 |
#include "hw.h" |
31 |
#include "sysemu.h" |
32 |
#include "sysbus.h" |
33 |
#include "kvm.h" |
34 |
|
35 |
#define MAX_CPUS 32 |
36 |
|
37 |
typedef struct spin_info { |
38 |
uint64_t addr; |
39 |
uint64_t r3; |
40 |
uint32_t resv; |
41 |
uint32_t pir; |
42 |
uint64_t reserved; |
43 |
} QEMU_PACKED SpinInfo; |
44 |
|
45 |
typedef struct spin_state { |
46 |
SysBusDevice busdev; |
47 |
MemoryRegion iomem; |
48 |
SpinInfo spin[MAX_CPUS]; |
49 |
} SpinState; |
50 |
|
51 |
typedef struct spin_kick { |
52 |
CPUPPCState *env; |
53 |
SpinInfo *spin; |
54 |
} SpinKick; |
55 |
|
56 |
static void spin_reset(void *opaque) |
57 |
{ |
58 |
SpinState *s = opaque; |
59 |
int i;
|
60 |
|
61 |
for (i = 0; i < MAX_CPUS; i++) { |
62 |
SpinInfo *info = &s->spin[i]; |
63 |
|
64 |
info->pir = i; |
65 |
info->r3 = i; |
66 |
info->addr = 1;
|
67 |
} |
68 |
} |
69 |
|
70 |
/* Create -kernel TLB entries for BookE, linearly spanning 256MB. */
|
71 |
static inline hwaddr booke206_page_size_to_tlb(uint64_t size) |
72 |
{ |
73 |
return (ffs(size >> 10) - 1) >> 1; |
74 |
} |
75 |
|
76 |
static void mmubooke_create_initial_mapping(CPUPPCState *env, |
77 |
target_ulong va, |
78 |
hwaddr pa, |
79 |
hwaddr len) |
80 |
{ |
81 |
ppcmas_tlb_t *tlb = booke206_get_tlbm(env, 1, 0, 1); |
82 |
hwaddr size; |
83 |
|
84 |
size = (booke206_page_size_to_tlb(len) << MAS1_TSIZE_SHIFT); |
85 |
tlb->mas1 = MAS1_VALID | size; |
86 |
tlb->mas2 = (va & TARGET_PAGE_MASK) | MAS2_M; |
87 |
tlb->mas7_3 = pa & TARGET_PAGE_MASK; |
88 |
tlb->mas7_3 |= MAS3_UR | MAS3_UW | MAS3_UX | MAS3_SR | MAS3_SW | MAS3_SX; |
89 |
env->tlb_dirty = true;
|
90 |
} |
91 |
|
92 |
static void spin_kick(void *data) |
93 |
{ |
94 |
SpinKick *kick = data; |
95 |
CPUPPCState *env = kick->env; |
96 |
SpinInfo *curspin = kick->spin; |
97 |
hwaddr map_size = 64 * 1024 * 1024; |
98 |
hwaddr map_start; |
99 |
|
100 |
cpu_synchronize_state(env); |
101 |
stl_p(&curspin->pir, env->spr[SPR_PIR]); |
102 |
env->nip = ldq_p(&curspin->addr) & (map_size - 1);
|
103 |
env->gpr[3] = ldq_p(&curspin->r3);
|
104 |
env->gpr[4] = 0; |
105 |
env->gpr[5] = 0; |
106 |
env->gpr[6] = 0; |
107 |
env->gpr[7] = map_size;
|
108 |
env->gpr[8] = 0; |
109 |
env->gpr[9] = 0; |
110 |
|
111 |
map_start = ldq_p(&curspin->addr) & ~(map_size - 1);
|
112 |
mmubooke_create_initial_mapping(env, 0, map_start, map_size);
|
113 |
|
114 |
env->halted = 0;
|
115 |
env->exception_index = -1;
|
116 |
env->stopped = 0;
|
117 |
qemu_cpu_kick(env); |
118 |
} |
119 |
|
120 |
static void spin_write(void *opaque, hwaddr addr, uint64_t value, |
121 |
unsigned len)
|
122 |
{ |
123 |
SpinState *s = opaque; |
124 |
int env_idx = addr / sizeof(SpinInfo); |
125 |
CPUPPCState *env; |
126 |
SpinInfo *curspin = &s->spin[env_idx]; |
127 |
uint8_t *curspin_p = (uint8_t*)curspin; |
128 |
|
129 |
for (env = first_cpu; env != NULL; env = env->next_cpu) { |
130 |
if (env->cpu_index == env_idx) {
|
131 |
break;
|
132 |
} |
133 |
} |
134 |
|
135 |
if (!env) {
|
136 |
/* Unknown CPU */
|
137 |
return;
|
138 |
} |
139 |
|
140 |
if (!env->cpu_index) {
|
141 |
/* primary CPU doesn't spin */
|
142 |
return;
|
143 |
} |
144 |
|
145 |
curspin_p = &curspin_p[addr % sizeof(SpinInfo)];
|
146 |
switch (len) {
|
147 |
case 1: |
148 |
stb_p(curspin_p, value); |
149 |
break;
|
150 |
case 2: |
151 |
stw_p(curspin_p, value); |
152 |
break;
|
153 |
case 4: |
154 |
stl_p(curspin_p, value); |
155 |
break;
|
156 |
} |
157 |
|
158 |
if (!(ldq_p(&curspin->addr) & 1)) { |
159 |
/* run CPU */
|
160 |
SpinKick kick = { |
161 |
.env = env, |
162 |
.spin = curspin, |
163 |
}; |
164 |
|
165 |
run_on_cpu(env, spin_kick, &kick); |
166 |
} |
167 |
} |
168 |
|
169 |
static uint64_t spin_read(void *opaque, hwaddr addr, unsigned len) |
170 |
{ |
171 |
SpinState *s = opaque; |
172 |
uint8_t *spin_p = &((uint8_t*)s->spin)[addr]; |
173 |
|
174 |
switch (len) {
|
175 |
case 1: |
176 |
return ldub_p(spin_p);
|
177 |
case 2: |
178 |
return lduw_p(spin_p);
|
179 |
case 4: |
180 |
return ldl_p(spin_p);
|
181 |
default:
|
182 |
hw_error("ppce500: unexpected %s with len = %u", __func__, len);
|
183 |
} |
184 |
} |
185 |
|
186 |
static const MemoryRegionOps spin_rw_ops = { |
187 |
.read = spin_read, |
188 |
.write = spin_write, |
189 |
.endianness = DEVICE_BIG_ENDIAN, |
190 |
}; |
191 |
|
192 |
static int ppce500_spin_initfn(SysBusDevice *dev) |
193 |
{ |
194 |
SpinState *s; |
195 |
|
196 |
s = FROM_SYSBUS(SpinState, sysbus_from_qdev(dev)); |
197 |
|
198 |
memory_region_init_io(&s->iomem, &spin_rw_ops, s, "e500 spin pv device",
|
199 |
sizeof(SpinInfo) * MAX_CPUS);
|
200 |
sysbus_init_mmio(dev, &s->iomem); |
201 |
|
202 |
qemu_register_reset(spin_reset, s); |
203 |
|
204 |
return 0; |
205 |
} |
206 |
|
207 |
static void ppce500_spin_class_init(ObjectClass *klass, void *data) |
208 |
{ |
209 |
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
210 |
|
211 |
k->init = ppce500_spin_initfn; |
212 |
} |
213 |
|
214 |
static TypeInfo ppce500_spin_info = {
|
215 |
.name = "e500-spin",
|
216 |
.parent = TYPE_SYS_BUS_DEVICE, |
217 |
.instance_size = sizeof(SpinState),
|
218 |
.class_init = ppce500_spin_class_init, |
219 |
}; |
220 |
|
221 |
static void ppce500_spin_register_types(void) |
222 |
{ |
223 |
type_register_static(&ppce500_spin_info); |
224 |
} |
225 |
|
226 |
type_init(ppce500_spin_register_types) |