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/*
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 *  SH4 emulation
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 *
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 *  Copyright (c) 2005 Samuel Tardieu
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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 */
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#include <assert.h>
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#include <stdlib.h>
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#include "exec.h"
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#include "helper.h"
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#ifndef CONFIG_USER_ONLY
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#define MMUSUFFIX _mmu
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#define SHIFT 0
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#include "softmmu_template.h"
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#define SHIFT 1
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#include "softmmu_template.h"
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#define SHIFT 2
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#include "softmmu_template.h"
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#define SHIFT 3
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#include "softmmu_template.h"
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void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
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{
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    TranslationBlock *tb;
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    CPUState *saved_env;
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    unsigned long pc;
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    int ret;
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    /* XXX: hack to restore env in all cases, even if not called from
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       generated code */
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    saved_env = env;
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    env = cpu_single_env;
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    ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
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    if (ret) {
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        if (retaddr) {
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            /* now we have a real cpu fault */
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            pc = (unsigned long) retaddr;
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            tb = tb_find_pc(pc);
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            if (tb) {
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                /* the PC is inside the translated code. It means that we have
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                   a virtual CPU fault */
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                cpu_restore_state(tb, env, pc, NULL);
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            }
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        }
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        cpu_loop_exit();
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    }
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    env = saved_env;
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}
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#endif
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void helper_ldtlb(void)
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{
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#ifdef CONFIG_USER_ONLY
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    /* XXXXX */
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    cpu_abort(env, "Unhandled ldtlb");
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#else
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    cpu_load_tlb(env);
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#endif
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}
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void helper_raise_illegal_instruction(void)
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{
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    env->exception_index = 0x180;
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    cpu_loop_exit();
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}
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void helper_raise_slot_illegal_instruction(void)
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{
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    env->exception_index = 0x1a0;
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    cpu_loop_exit();
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}
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void helper_raise_fpu_disable(void)
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{
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  env->exception_index = 0x800;
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  cpu_loop_exit();
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}
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void helper_raise_slot_fpu_disable(void)
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{
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  env->exception_index = 0x820;
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  cpu_loop_exit();
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}
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void helper_debug(void)
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{
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    env->exception_index = EXCP_DEBUG;
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    cpu_loop_exit();
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}
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void helper_sleep(uint32_t next_pc)
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{
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    env->halted = 1;
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    env->exception_index = EXCP_HLT;
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    env->pc = next_pc;
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    cpu_loop_exit();
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}
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void helper_trapa(uint32_t tra)
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{
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    env->tra = tra << 2;
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    env->exception_index = 0x160;
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    cpu_loop_exit();
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}
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void helper_movcal(uint32_t address, uint32_t value)
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{
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    if (cpu_sh4_is_cached (env, address))
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    {
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        memory_content *r = malloc (sizeof(memory_content));
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        r->address = address;
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        r->value = value;
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        r->next = NULL;
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        *(env->movcal_backup_tail) = r;
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        env->movcal_backup_tail = &(r->next);
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    }
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}
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void helper_discard_movcal_backup(void)
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{
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    memory_content *current = env->movcal_backup;
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    while(current)
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    {
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        memory_content *next = current->next;
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        free (current);
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        env->movcal_backup = current = next;
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        if (current == NULL)
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            env->movcal_backup_tail = &(env->movcal_backup);
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    } 
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}
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void helper_ocbi(uint32_t address)
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{
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    memory_content **current = &(env->movcal_backup);
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    while (*current)
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    {
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        uint32_t a = (*current)->address;
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        if ((a & ~0x1F) == (address & ~0x1F))
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        {
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            memory_content *next = (*current)->next;
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            stl(a, (*current)->value);
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            if (next == NULL)
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            {
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                env->movcal_backup_tail = current;
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            }
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            free (*current);
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            *current = next;
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            break;
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        }
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    }
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}
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uint32_t helper_addc(uint32_t arg0, uint32_t arg1)
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{
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    uint32_t tmp0, tmp1;
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    tmp1 = arg0 + arg1;
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    tmp0 = arg1;
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    arg1 = tmp1 + (env->sr & 1);
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    if (tmp0 > tmp1)
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        env->sr |= SR_T;
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    else
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        env->sr &= ~SR_T;
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    if (tmp1 > arg1)
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        env->sr |= SR_T;
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    return arg1;
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}
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uint32_t helper_addv(uint32_t arg0, uint32_t arg1)
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{
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    uint32_t dest, src, ans;
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    if ((int32_t) arg1 >= 0)
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        dest = 0;
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    else
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        dest = 1;
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    if ((int32_t) arg0 >= 0)
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        src = 0;
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    else
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        src = 1;
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    src += dest;
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    arg1 += arg0;
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    if ((int32_t) arg1 >= 0)
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        ans = 0;
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    else
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        ans = 1;
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    ans += dest;
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    if (src == 0 || src == 2) {
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        if (ans == 1)
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            env->sr |= SR_T;
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        else
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            env->sr &= ~SR_T;
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    } else
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        env->sr &= ~SR_T;
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    return arg1;
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}
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#define T (env->sr & SR_T)
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#define Q (env->sr & SR_Q ? 1 : 0)
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#define M (env->sr & SR_M ? 1 : 0)
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#define SETT env->sr |= SR_T
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#define CLRT env->sr &= ~SR_T
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#define SETQ env->sr |= SR_Q
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#define CLRQ env->sr &= ~SR_Q
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#define SETM env->sr |= SR_M
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#define CLRM env->sr &= ~SR_M
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uint32_t helper_div1(uint32_t arg0, uint32_t arg1)
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{
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    uint32_t tmp0, tmp2;
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    uint8_t old_q, tmp1 = 0xff;
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    //printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T);
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    old_q = Q;
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    if ((0x80000000 & arg1) != 0)
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        SETQ;
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    else
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        CLRQ;
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    tmp2 = arg0;
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    arg1 <<= 1;
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    arg1 |= T;
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    switch (old_q) {
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    case 0:
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        switch (M) {
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        case 0:
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            tmp0 = arg1;
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            arg1 -= tmp2;
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            tmp1 = arg1 > tmp0;
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            switch (Q) {
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            case 0:
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                if (tmp1)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            case 1:
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                if (tmp1 == 0)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            }
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            break;
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        case 1:
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            tmp0 = arg1;
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            arg1 += tmp2;
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            tmp1 = arg1 < tmp0;
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            switch (Q) {
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            case 0:
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                if (tmp1 == 0)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            case 1:
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                if (tmp1)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            }
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            break;
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        }
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        break;
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    case 1:
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        switch (M) {
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        case 0:
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            tmp0 = arg1;
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            arg1 += tmp2;
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            tmp1 = arg1 < tmp0;
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            switch (Q) {
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            case 0:
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                if (tmp1)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            case 1:
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                if (tmp1 == 0)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            }
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            break;
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        case 1:
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            tmp0 = arg1;
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            arg1 -= tmp2;
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            tmp1 = arg1 > tmp0;
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            switch (Q) {
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            case 0:
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                if (tmp1 == 0)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            case 1:
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                if (tmp1)
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                    SETQ;
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                else
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                    CLRQ;
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                break;
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            }
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            break;
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        }
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        break;
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    }
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    if (Q == M)
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        SETT;
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    else
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        CLRT;
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    //printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T);
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    return arg1;
337 fdf9b3e8 bellard
}
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void helper_macl(uint32_t arg0, uint32_t arg1)
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{
341 fdf9b3e8 bellard
    int64_t res;
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    res = ((uint64_t) env->mach << 32) | env->macl;
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    res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1;
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    env->mach = (res >> 32) & 0xffffffff;
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    env->macl = res & 0xffffffff;
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    if (env->sr & SR_S) {
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        if (res < 0)
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            env->mach |= 0xffff0000;
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        else
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            env->mach &= 0x00007fff;
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    }
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}
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void helper_macw(uint32_t arg0, uint32_t arg1)
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{
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    int64_t res;
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    res = ((uint64_t) env->mach << 32) | env->macl;
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    res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1;
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    env->mach = (res >> 32) & 0xffffffff;
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    env->macl = res & 0xffffffff;
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    if (env->sr & SR_S) {
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        if (res < -0x80000000) {
365 fdf9b3e8 bellard
            env->mach = 1;
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            env->macl = 0x80000000;
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        } else if (res > 0x000000007fffffff) {
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            env->mach = 1;
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            env->macl = 0x7fffffff;
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        }
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    }
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}
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uint32_t helper_negc(uint32_t arg)
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{
376 fdf9b3e8 bellard
    uint32_t temp;
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378 6f06939b aurel32
    temp = -arg;
379 6f06939b aurel32
    arg = temp - (env->sr & SR_T);
380 fdf9b3e8 bellard
    if (0 < temp)
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        env->sr |= SR_T;
382 fdf9b3e8 bellard
    else
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        env->sr &= ~SR_T;
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    if (temp < arg)
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        env->sr |= SR_T;
386 6f06939b aurel32
    return arg;
387 fdf9b3e8 bellard
}
388 fdf9b3e8 bellard
389 6f06939b aurel32
uint32_t helper_subc(uint32_t arg0, uint32_t arg1)
390 fdf9b3e8 bellard
{
391 fdf9b3e8 bellard
    uint32_t tmp0, tmp1;
392 fdf9b3e8 bellard
393 6f06939b aurel32
    tmp1 = arg1 - arg0;
394 6f06939b aurel32
    tmp0 = arg1;
395 6f06939b aurel32
    arg1 = tmp1 - (env->sr & SR_T);
396 fdf9b3e8 bellard
    if (tmp0 < tmp1)
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        env->sr |= SR_T;
398 fdf9b3e8 bellard
    else
399 fdf9b3e8 bellard
        env->sr &= ~SR_T;
400 6f06939b aurel32
    if (tmp1 < arg1)
401 fdf9b3e8 bellard
        env->sr |= SR_T;
402 6f06939b aurel32
    return arg1;
403 fdf9b3e8 bellard
}
404 fdf9b3e8 bellard
405 6f06939b aurel32
uint32_t helper_subv(uint32_t arg0, uint32_t arg1)
406 fdf9b3e8 bellard
{
407 fdf9b3e8 bellard
    int32_t dest, src, ans;
408 fdf9b3e8 bellard
409 6f06939b aurel32
    if ((int32_t) arg1 >= 0)
410 fdf9b3e8 bellard
        dest = 0;
411 fdf9b3e8 bellard
    else
412 fdf9b3e8 bellard
        dest = 1;
413 6f06939b aurel32
    if ((int32_t) arg0 >= 0)
414 fdf9b3e8 bellard
        src = 0;
415 fdf9b3e8 bellard
    else
416 fdf9b3e8 bellard
        src = 1;
417 fdf9b3e8 bellard
    src += dest;
418 6f06939b aurel32
    arg1 -= arg0;
419 6f06939b aurel32
    if ((int32_t) arg1 >= 0)
420 fdf9b3e8 bellard
        ans = 0;
421 fdf9b3e8 bellard
    else
422 fdf9b3e8 bellard
        ans = 1;
423 fdf9b3e8 bellard
    ans += dest;
424 fdf9b3e8 bellard
    if (src == 1) {
425 fdf9b3e8 bellard
        if (ans == 1)
426 fdf9b3e8 bellard
            env->sr |= SR_T;
427 fdf9b3e8 bellard
        else
428 fdf9b3e8 bellard
            env->sr &= ~SR_T;
429 fdf9b3e8 bellard
    } else
430 fdf9b3e8 bellard
        env->sr &= ~SR_T;
431 6f06939b aurel32
    return arg1;
432 fdf9b3e8 bellard
}
433 fdf9b3e8 bellard
434 cc4ba6a9 aurel32
static inline void set_t(void)
435 cc4ba6a9 aurel32
{
436 cc4ba6a9 aurel32
    env->sr |= SR_T;
437 cc4ba6a9 aurel32
}
438 cc4ba6a9 aurel32
439 cc4ba6a9 aurel32
static inline void clr_t(void)
440 cc4ba6a9 aurel32
{
441 cc4ba6a9 aurel32
    env->sr &= ~SR_T;
442 cc4ba6a9 aurel32
}
443 cc4ba6a9 aurel32
444 390af821 aurel32
void helper_ld_fpscr(uint32_t val)
445 390af821 aurel32
{
446 390af821 aurel32
    env->fpscr = val & 0x003fffff;
447 390af821 aurel32
    if (val & 0x01)
448 390af821 aurel32
        set_float_rounding_mode(float_round_to_zero, &env->fp_status);
449 390af821 aurel32
    else
450 390af821 aurel32
        set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
451 390af821 aurel32
}
452 cc4ba6a9 aurel32
453 cc4ba6a9 aurel32
uint32_t helper_fabs_FT(uint32_t t0)
454 cc4ba6a9 aurel32
{
455 9850d1e8 aurel32
    CPU_FloatU f;
456 9850d1e8 aurel32
    f.l = t0;
457 9850d1e8 aurel32
    f.f = float32_abs(f.f);
458 9850d1e8 aurel32
    return f.l;
459 cc4ba6a9 aurel32
}
460 cc4ba6a9 aurel32
461 cc4ba6a9 aurel32
uint64_t helper_fabs_DT(uint64_t t0)
462 cc4ba6a9 aurel32
{
463 9850d1e8 aurel32
    CPU_DoubleU d;
464 9850d1e8 aurel32
    d.ll = t0;
465 9850d1e8 aurel32
    d.d = float64_abs(d.d);
466 9850d1e8 aurel32
    return d.ll;
467 cc4ba6a9 aurel32
}
468 cc4ba6a9 aurel32
469 cc4ba6a9 aurel32
uint32_t helper_fadd_FT(uint32_t t0, uint32_t t1)
470 cc4ba6a9 aurel32
{
471 9850d1e8 aurel32
    CPU_FloatU f0, f1;
472 9850d1e8 aurel32
    f0.l = t0;
473 9850d1e8 aurel32
    f1.l = t1;
474 9850d1e8 aurel32
    f0.f = float32_add(f0.f, f1.f, &env->fp_status);
475 9850d1e8 aurel32
    return f0.l;
476 cc4ba6a9 aurel32
}
477 cc4ba6a9 aurel32
478 cc4ba6a9 aurel32
uint64_t helper_fadd_DT(uint64_t t0, uint64_t t1)
479 cc4ba6a9 aurel32
{
480 9850d1e8 aurel32
    CPU_DoubleU d0, d1;
481 9850d1e8 aurel32
    d0.ll = t0;
482 9850d1e8 aurel32
    d1.ll = t1;
483 9850d1e8 aurel32
    d0.d = float64_add(d0.d, d1.d, &env->fp_status);
484 9850d1e8 aurel32
    return d0.ll;
485 cc4ba6a9 aurel32
}
486 cc4ba6a9 aurel32
487 cc4ba6a9 aurel32
void helper_fcmp_eq_FT(uint32_t t0, uint32_t t1)
488 cc4ba6a9 aurel32
{
489 9850d1e8 aurel32
    CPU_FloatU f0, f1;
490 9850d1e8 aurel32
    f0.l = t0;
491 9850d1e8 aurel32
    f1.l = t1;
492 9850d1e8 aurel32
493 9850d1e8 aurel32
    if (float32_compare(f0.f, f1.f, &env->fp_status) == 0)
494 cc4ba6a9 aurel32
        set_t();
495 cc4ba6a9 aurel32
    else
496 cc4ba6a9 aurel32
        clr_t();
497 cc4ba6a9 aurel32
}
498 cc4ba6a9 aurel32
499 cc4ba6a9 aurel32
void helper_fcmp_eq_DT(uint64_t t0, uint64_t t1)
500 cc4ba6a9 aurel32
{
501 9850d1e8 aurel32
    CPU_DoubleU d0, d1;
502 9850d1e8 aurel32
    d0.ll = t0;
503 9850d1e8 aurel32
    d1.ll = t1;
504 9850d1e8 aurel32
505 9850d1e8 aurel32
    if (float64_compare(d0.d, d1.d, &env->fp_status) == 0)
506 cc4ba6a9 aurel32
        set_t();
507 cc4ba6a9 aurel32
    else
508 cc4ba6a9 aurel32
        clr_t();
509 cc4ba6a9 aurel32
}
510 cc4ba6a9 aurel32
511 cc4ba6a9 aurel32
void helper_fcmp_gt_FT(uint32_t t0, uint32_t t1)
512 cc4ba6a9 aurel32
{
513 9850d1e8 aurel32
    CPU_FloatU f0, f1;
514 9850d1e8 aurel32
    f0.l = t0;
515 9850d1e8 aurel32
    f1.l = t1;
516 9850d1e8 aurel32
517 9850d1e8 aurel32
    if (float32_compare(f0.f, f1.f, &env->fp_status) == 1)
518 cc4ba6a9 aurel32
        set_t();
519 cc4ba6a9 aurel32
    else
520 cc4ba6a9 aurel32
        clr_t();
521 cc4ba6a9 aurel32
}
522 cc4ba6a9 aurel32
523 cc4ba6a9 aurel32
void helper_fcmp_gt_DT(uint64_t t0, uint64_t t1)
524 cc4ba6a9 aurel32
{
525 9850d1e8 aurel32
    CPU_DoubleU d0, d1;
526 9850d1e8 aurel32
    d0.ll = t0;
527 9850d1e8 aurel32
    d1.ll = t1;
528 9850d1e8 aurel32
529 9850d1e8 aurel32
    if (float64_compare(d0.d, d1.d, &env->fp_status) == 1)
530 cc4ba6a9 aurel32
        set_t();
531 cc4ba6a9 aurel32
    else
532 cc4ba6a9 aurel32
        clr_t();
533 cc4ba6a9 aurel32
}
534 cc4ba6a9 aurel32
535 cc4ba6a9 aurel32
uint64_t helper_fcnvsd_FT_DT(uint32_t t0)
536 cc4ba6a9 aurel32
{
537 9850d1e8 aurel32
    CPU_DoubleU d;
538 9850d1e8 aurel32
    CPU_FloatU f;
539 9850d1e8 aurel32
    f.l = t0;
540 9850d1e8 aurel32
    d.d = float32_to_float64(f.f, &env->fp_status);
541 9850d1e8 aurel32
    return d.ll;
542 cc4ba6a9 aurel32
}
543 cc4ba6a9 aurel32
544 cc4ba6a9 aurel32
uint32_t helper_fcnvds_DT_FT(uint64_t t0)
545 cc4ba6a9 aurel32
{
546 9850d1e8 aurel32
    CPU_DoubleU d;
547 9850d1e8 aurel32
    CPU_FloatU f;
548 9850d1e8 aurel32
    d.ll = t0;
549 9850d1e8 aurel32
    f.f = float64_to_float32(d.d, &env->fp_status);
550 9850d1e8 aurel32
    return f.l;
551 cc4ba6a9 aurel32
}
552 cc4ba6a9 aurel32
553 cc4ba6a9 aurel32
uint32_t helper_fdiv_FT(uint32_t t0, uint32_t t1)
554 cc4ba6a9 aurel32
{
555 9850d1e8 aurel32
    CPU_FloatU f0, f1;
556 9850d1e8 aurel32
    f0.l = t0;
557 9850d1e8 aurel32
    f1.l = t1;
558 9850d1e8 aurel32
    f0.f = float32_div(f0.f, f1.f, &env->fp_status);
559 9850d1e8 aurel32
    return f0.l;
560 cc4ba6a9 aurel32
}
561 cc4ba6a9 aurel32
562 cc4ba6a9 aurel32
uint64_t helper_fdiv_DT(uint64_t t0, uint64_t t1)
563 cc4ba6a9 aurel32
{
564 9850d1e8 aurel32
    CPU_DoubleU d0, d1;
565 9850d1e8 aurel32
    d0.ll = t0;
566 9850d1e8 aurel32
    d1.ll = t1;
567 9850d1e8 aurel32
    d0.d = float64_div(d0.d, d1.d, &env->fp_status);
568 9850d1e8 aurel32
    return d0.ll;
569 cc4ba6a9 aurel32
}
570 cc4ba6a9 aurel32
571 cc4ba6a9 aurel32
uint32_t helper_float_FT(uint32_t t0)
572 cc4ba6a9 aurel32
{
573 9850d1e8 aurel32
    CPU_FloatU f;
574 9850d1e8 aurel32
    f.f = int32_to_float32(t0, &env->fp_status);
575 9850d1e8 aurel32
    return f.l;
576 cc4ba6a9 aurel32
}
577 cc4ba6a9 aurel32
578 cc4ba6a9 aurel32
uint64_t helper_float_DT(uint32_t t0)
579 cc4ba6a9 aurel32
{
580 9850d1e8 aurel32
    CPU_DoubleU d;
581 9850d1e8 aurel32
    d.d = int32_to_float64(t0, &env->fp_status);
582 9850d1e8 aurel32
    return d.ll;
583 cc4ba6a9 aurel32
}
584 cc4ba6a9 aurel32
585 5b7141a1 aurel32
uint32_t helper_fmac_FT(uint32_t t0, uint32_t t1, uint32_t t2)
586 5b7141a1 aurel32
{
587 5b7141a1 aurel32
    CPU_FloatU f0, f1, f2;
588 5b7141a1 aurel32
    f0.l = t0;
589 5b7141a1 aurel32
    f1.l = t1;
590 5b7141a1 aurel32
    f2.l = t2;
591 5b7141a1 aurel32
    f0.f = float32_mul(f0.f, f1.f, &env->fp_status);
592 5b7141a1 aurel32
    f0.f = float32_add(f0.f, f2.f, &env->fp_status);
593 5b7141a1 aurel32
    return f0.l;
594 5b7141a1 aurel32
}
595 5b7141a1 aurel32
596 cc4ba6a9 aurel32
uint32_t helper_fmul_FT(uint32_t t0, uint32_t t1)
597 cc4ba6a9 aurel32
{
598 9850d1e8 aurel32
    CPU_FloatU f0, f1;
599 9850d1e8 aurel32
    f0.l = t0;
600 9850d1e8 aurel32
    f1.l = t1;
601 9850d1e8 aurel32
    f0.f = float32_mul(f0.f, f1.f, &env->fp_status);
602 9850d1e8 aurel32
    return f0.l;
603 cc4ba6a9 aurel32
}
604 cc4ba6a9 aurel32
605 cc4ba6a9 aurel32
uint64_t helper_fmul_DT(uint64_t t0, uint64_t t1)
606 cc4ba6a9 aurel32
{
607 9850d1e8 aurel32
    CPU_DoubleU d0, d1;
608 9850d1e8 aurel32
    d0.ll = t0;
609 9850d1e8 aurel32
    d1.ll = t1;
610 9850d1e8 aurel32
    d0.d = float64_mul(d0.d, d1.d, &env->fp_status);
611 9850d1e8 aurel32
    return d0.ll;
612 cc4ba6a9 aurel32
}
613 cc4ba6a9 aurel32
614 7fdf924f aurel32
uint32_t helper_fneg_T(uint32_t t0)
615 7fdf924f aurel32
{
616 9850d1e8 aurel32
    CPU_FloatU f;
617 9850d1e8 aurel32
    f.l = t0;
618 9850d1e8 aurel32
    f.f = float32_chs(f.f);
619 9850d1e8 aurel32
    return f.l;
620 7fdf924f aurel32
}
621 7fdf924f aurel32
622 cc4ba6a9 aurel32
uint32_t helper_fsqrt_FT(uint32_t t0)
623 cc4ba6a9 aurel32
{
624 9850d1e8 aurel32
    CPU_FloatU f;
625 9850d1e8 aurel32
    f.l = t0;
626 9850d1e8 aurel32
    f.f = float32_sqrt(f.f, &env->fp_status);
627 9850d1e8 aurel32
    return f.l;
628 cc4ba6a9 aurel32
}
629 cc4ba6a9 aurel32
630 cc4ba6a9 aurel32
uint64_t helper_fsqrt_DT(uint64_t t0)
631 cc4ba6a9 aurel32
{
632 9850d1e8 aurel32
    CPU_DoubleU d;
633 9850d1e8 aurel32
    d.ll = t0;
634 9850d1e8 aurel32
    d.d = float64_sqrt(d.d, &env->fp_status);
635 9850d1e8 aurel32
    return d.ll;
636 cc4ba6a9 aurel32
}
637 cc4ba6a9 aurel32
638 cc4ba6a9 aurel32
uint32_t helper_fsub_FT(uint32_t t0, uint32_t t1)
639 cc4ba6a9 aurel32
{
640 9850d1e8 aurel32
    CPU_FloatU f0, f1;
641 9850d1e8 aurel32
    f0.l = t0;
642 9850d1e8 aurel32
    f1.l = t1;
643 9850d1e8 aurel32
    f0.f = float32_sub(f0.f, f1.f, &env->fp_status);
644 9850d1e8 aurel32
    return f0.l;
645 cc4ba6a9 aurel32
}
646 cc4ba6a9 aurel32
647 cc4ba6a9 aurel32
uint64_t helper_fsub_DT(uint64_t t0, uint64_t t1)
648 cc4ba6a9 aurel32
{
649 9850d1e8 aurel32
    CPU_DoubleU d0, d1;
650 9850d1e8 aurel32
    d0.ll = t0;
651 9850d1e8 aurel32
    d1.ll = t1;
652 9850d1e8 aurel32
    d0.d = float64_sub(d0.d, d1.d, &env->fp_status);
653 9850d1e8 aurel32
    return d0.ll;
654 cc4ba6a9 aurel32
}
655 cc4ba6a9 aurel32
656 cc4ba6a9 aurel32
uint32_t helper_ftrc_FT(uint32_t t0)
657 cc4ba6a9 aurel32
{
658 9850d1e8 aurel32
    CPU_FloatU f;
659 9850d1e8 aurel32
    f.l = t0;
660 9850d1e8 aurel32
    return float32_to_int32_round_to_zero(f.f, &env->fp_status);
661 cc4ba6a9 aurel32
}
662 cc4ba6a9 aurel32
663 cc4ba6a9 aurel32
uint32_t helper_ftrc_DT(uint64_t t0)
664 cc4ba6a9 aurel32
{
665 9850d1e8 aurel32
    CPU_DoubleU d;
666 9850d1e8 aurel32
    d.ll = t0;
667 9850d1e8 aurel32
    return float64_to_int32_round_to_zero(d.d, &env->fp_status);
668 cc4ba6a9 aurel32
}