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root / target-sh4 @ a88790a1

# Date Author Comment
a88790a1 07/03/2010 09:48 am Paolo Bonzini

remove exec-all.h inclusion from cpu.h

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Blue Swirl <>

10eb0cc0 07/03/2010 09:48 am Paolo Bonzini

move cpu_pc_from_tb to target-*/exec.h

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Blue Swirl <>

6f0f607f 05/05/2010 01:20 pm Richard Henderson

target-sh4: Remove duplicate CPU log.

Logging for -d cpu is done in generic code.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

1a7ff922 04/08/2010 10:34 pm Paolo Bonzini

remove TARGET_* defines from translate-all.c

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Aurelien Jarno <>

43dc2a64 03/18/2010 08:41 pm Blue Swirl

Replace assert(0) with abort() or cpu_abort()

When building with -DNDEBUG, assert(0) will not stop execution
so it must not be used for abnormal termination.

Use cpu_abort() when in CPU context, abort() otherwise.

Signed-off-by: Blue Swirl <>

d4c430a8 03/17/2010 04:44 am Paul Brook

Large page TLB flush

QEMU uses a fixed page size for the CPU TLB. If the guest uses large
pages then we effectively split these into multiple smaller pages, and
populate the corresponding TLB entries on demand.

When the guest invalidates the TLB by virtual address we must invalidate...

3c7b48b7 03/12/2010 08:44 pm Paul Brook

Target specific usermode cleanup

Disable various target specific code that is only relevant to system emulation.

Signed-off-by: Paul Brook <>

4fcc562b 03/12/2010 08:34 pm Paul Brook

Remove cpu_get_phys_page_debug from userspace emulation

cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it.

Signed-off-by: Paul Brook <>

52705890 03/12/2010 06:28 pm Richard Henderson

Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.

Removes a set of ifdefs from exec.c.

Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other
than Alpha. This will be used for page_find_alloc, which is
supposed to be using virtual addresses in the first place....

ee0dc6d3 02/14/2010 09:23 am Blue Swirl

Fix incorrect exception_index use

env->exception_index should be cleared with -1, not 0.

See also 821b19fe923ac49a24cdb4af902584fdd019cee6.

Spotted by Igor Kovalenko.

Signed-off-by: Blue Swirl <>

5a25cc2b 02/09/2010 10:08 pm Aurelien Jarno

target-sh4: MMU: separate execute and read/write permissions

On SH4, the ITLB and UTLB configurations are memory mapped, so loading
ITLB entries from UTLB has to be simulated correctly. For that the QEMU
TLB has to be handle the execute (ITLB) and read/write permissions...

1f486815 02/09/2010 10:08 pm Aurelien Jarno

target-sh4: MMU: fix mem_idx computation

The mem_idx is wrongly computed. As written in target-sh4/cpu.h, mode 0
corresponds to kernel mode (SR_MD = 1), while mode 1 corresponds to user
mode (SR_MD = 0).

Signed-off-by: Aurelien Jarno <>

0f3f1ec7 02/09/2010 10:08 pm Aurelien Jarno

target-sh4: MMU: simplify call to tlb_set_page()

tlb_set_page() doesn't need addresses with offset, but simply the
page aligned addresses.

Signed-off-by: Aurelien Jarno <>

4d1e4ff6 02/09/2010 10:08 pm Aurelien Jarno

target-sh4: MMU: fix ITLB priviledge check

There is an ITLB access violation if SR_MD=0 (user mode) while
the high bit of the protection key is 0 (priviledge mode).

Signed-off-by: Aurelien Jarno <>

628b61a0 02/09/2010 10:08 pm Aurelien Jarno

target-sh4: MMU: optimize UTLB accesses

With the current code, the QEMU TLB is setup to match the read/write
mode of the MMU fault. This means when read access is done, the page
is setup in read-only mode. When the page is later accessed in write
mode, an MMU fault happened, and the page is switch in write-only...

af090497 02/09/2010 10:08 pm Aurelien Jarno

target-sh4: MMU: reduce the size of a TLB entry

Reduce the size of the TLB entry from 32 to 16 bytes, reorganising
members and using a bit field.

Signed-off-by: Aurelien Jarno <>

55ff33a4 02/09/2010 10:08 pm Aurelien Jarno

target-sh4: MMU: remove dead code

Signed-off-by: Aurelien Jarno <>

03e3b61e 02/09/2010 10:08 pm Aurelien Jarno

target-sh4: MMU: fix store queue addresses

The store queues are located from 0xe0000000 to 0xe3ffffff.

Signed-off-by: Aurelien Jarno <>

e0bcb9ca 02/09/2010 10:07 pm Aurelien Jarno

sh7750: handle MMUCR TI bit

When the MMUCR TI bit is set, all the UTLB and ITLB entries should be
flushed.

Signed-off-by: Aurelien Jarno <>

3101e99c 02/08/2010 01:21 pm Aurelien Jarno

target-sh4: minor optimisations

Signed-off-by: Aurelien Jarno <>

49a945a3 01/20/2010 12:31 am Paolo Bonzini

kill regs_to_env and env_to_regs

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Anthony Liguori <>

c227f099 10/02/2009 12:12 am Anthony Liguori

Revert "Get rid of _t suffix"

In the very least, a change like this requires discussion on the list.

The naming convention is goofy and it causes a massive merge problem. Something
like this must be presented on the list first so people can provide input...

99a0949b 10/01/2009 09:45 pm malc

Get rid of _t suffix

Some not so obvious bits, slirp and Xen were left alone for the time
being.

Signed-off-by: malc <>

b9d38e95 09/21/2009 09:11 pm Blue Swirl

Fix Sparse warnings about using plain integer as NULL pointer

Signed-off-by: Blue Swirl <>

72cf2d4f 09/12/2009 10:36 am Blue Swirl

Fix sys-queue.h conflict for good

Problem: Our file sys-queue.h is a copy of the BSD file, but there are
some additions and it's not entirely compatible. Because of that, there have
been conflicts with system headers on BSD systems. Some hacks have been
introduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896,...

0b5c1ce8 08/24/2009 04:21 pm Nathan Froyd

cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal

handle_cpu_signal is very nearly copy-paste code for each target, with a
few minor variations. This patch sets up appropriate defaults for a
generic handle_cpu_signal and provides overrides for particular targets...

8167ee88 07/16/2009 11:47 pm Blue Swirl

Update to a hopefully more future proof FSF address

Signed-off-by: Blue Swirl <>

f80f9ec9 05/21/2009 04:47 pm Anthony Liguori

Convert machine registration to use module init functions

This cleans up quite a lot of #ifdefs, extern variables, and other ugliness.

Signed-off-by: Anthony Liguori <>

55616505 05/13/2009 10:54 pm Paul Brook

Include assert.h from qemu-common.h

Include assert.h from qemu-common.h and remove other direct uses.
cpu-all.h still need to include it because of the dyngen-exec.h hacks

Signed-off-by: Paul Brook <>

0bf46a40 04/24/2009 09:03 pm aliguori

qemu: introduce qemu_init_vcpu (Marcelo Tosatti)

Signed-off-by: Marcelo Tosatti <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162

6a4955a8 04/24/2009 09:03 pm aliguori

qemu: per-arch cpu_has_work (Marcelo Tosatti)

Blue Swirl: fix Sparc32 breakage

Signed-off-by: Marcelo Tosatti <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7238 c046a42c-6fe2-441c-8c8c-71466251a162

1b530a6d 04/05/2009 11:08 pm aurel32

Add new command line option -singlestep for tcg single stepping.

This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.

Add monitor command to enable or disable single step mode.

Modify monitor command "info status" to display single step mode....

679dee3c 04/03/2009 10:33 am edgar_igl

SH: Fix linux-user _is_cached typo.

Signed-off-by: Edgar E. Iglesias <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6970 c046a42c-6fe2-441c-8c8c-71466251a162

3c1adf12 04/03/2009 10:29 am edgar_igl

SH: Add cpu_sh4_is_cached for linux-user.

The entire U0 area is assumed to be cacheable.

Signed-off-by: Edgar E. Iglesias <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6969 c046a42c-6fe2-441c-8c8c-71466251a162

852d481f 04/02/2009 02:10 am edgar_igl

SH: Improve movca.l/ocbi emulation.

Author: Vladimir Prus <>

Fix movcal.l/ocbi emulation.
  • target-sh4/cpu.h (memory_content): New.
    (CPUSH4State): New fields movcal_backup and movcal_backup_tail.
  • target-sh4/helper.h (helper_movcal)...
c2764719 03/07/2009 05:24 pm pbrook

The _exit syscall is used for both thread termination in NPTL applications,
and process termination in legacy applications. Try to guess which we want
based on the presence of multiple threads.

Also implement locking when modifying the CPU list.

Signed-off-by: Paul Brook <>...

927e3a4e 03/03/2009 11:14 am aurel32

SH4: Fixed last UTLB unused and URB/URC management

Signed-off-by: Lionel Landwerlin <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6675 c046a42c-6fe2-441c-8c8c-71466251a162

45f4d016 03/03/2009 08:14 am aurel32

SH4: Fixed last UTLB unused

Version 2 of the patch.

Signed-off-by: Lionel Landwerlin <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6672 c046a42c-6fe2-441c-8c8c-71466251a162

fb104582 03/03/2009 08:12 am aurel32

SH4: Fixed last UTLB unused

With my previous patch (the one monitoring tlb), I found that the last
TLB entry was never use. Here a little fix.

Signed-off-by: Lionel Landwerlin <>
Signed-off-by: Aurelien Jarno <>...

ef7ec1c1 03/03/2009 08:12 am aurel32

clean build: Fix remaining sh4 warnings

Signed-off-by: Jan Kiszka <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6668 c046a42c-6fe2-441c-8c8c-71466251a162

66c7c806 03/02/2009 07:13 pm aurel32

SH: Implement MOVCO.L and MOVLI.L

  • target-sh4/cpu.h (struct CPUSH4State): New field ldst.
  • target-sh4/translate.c (cpu_ldst): New.
    (sh4_translate_init): Initialize cpu_ldst.
    (_decode_opc): Support MOVCO.L and MOVLI.L.

(Vladimir Prus)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6666 c046a42c-6fe2-441c-8c8c-71466251a162

c2432a42 02/07/2009 05:18 pm aurel32

SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 and fix BCR2 support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6548 c046a42c-6fe2-441c-8c8c-71466251a162

0d0266a5 02/06/2009 12:06 am aliguori

targets: remove error handling from qemu_malloc() callers (Avi Kivity)

Signed-off-by: Avi Kivity <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6530 c046a42c-6fe2-441c-8c8c-71466251a162

eca1bdf4 01/26/2009 09:54 pm aliguori

Log reset events (Jan Kiszka)

Original idea&code by Kevin Wolf, split-up in two patches and added more
archs.

This patch introduces a flag to log CPU resets. Useful for tracing
unexpected resets (such as those triggered by x86 triple faults).

Signed-off-by: Jan Kiszka <>...

8fec2b8c 01/16/2009 12:36 am aliguori

global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)

These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.

Signed-off-by: Eduardo Habkost <>
Signed-off-by: Anthony Liguori <>...

93fcfe39 01/16/2009 12:34 am aliguori

Convert references to logfile/loglevel to use qemu_log*() macros

This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.

Signed-off-by: Eduardo Habkost <>
Signed-off-by: Anthony Liguori <>...

5b7141a1 01/14/2009 11:02 pm aurel32

sh4: Add FMAC instruction support

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Lionel Landwerlin <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6309 c046a42c-6fe2-441c-8c8c-71466251a162

fad6cb1a 01/05/2009 12:05 am aurel32

Update FSF address in GPL/LGPL boilerplate

The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.

Signed-off-by: Stuart Brady <>
Signed-off-by: Aurelien Jarno <>...

df9247b2 01/01/2009 04:09 pm aurel32

tcg_temp_local_new should take no parameter

This patch removes useless type information in some calls to
tcg_temp_local_new. It also removes the parameter from the
macro declaration; if a target has to use a specific non-default
size then it should use tcg_temp_local_new_{i32,i64}....

b1503cda 12/22/2008 10:33 pm malc

Use the ARRAY_SIZE() macro where appropriate.

Change from v1:
Avoid changing the existing coding style in certain files.

Signed-off-by: Stuart Brady <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162

56cd2b96 12/13/2008 09:27 pm aurel32

target-sh4: make the initial value of SR easier to read

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6016 c046a42c-6fe2-441c-8c8c-71466251a162

f3ff7fac 12/13/2008 09:27 pm aurel32

target-sh4: don't disable FPU instructions in user mode

Based on a patch from Lionel Landwerlin.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6015 c046a42c-6fe2-441c-8c8c-71466251a162

bacc637a 12/13/2008 08:57 pm aurel32

target-sh4: disable debug code

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6014 c046a42c-6fe2-441c-8c8c-71466251a162

71968fa6 12/13/2008 08:57 pm aurel32

target-sh4: add prefi, icbi, synco

(Vladimir Prus)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6013 c046a42c-6fe2-441c-8c8c-71466251a162

a9c43f8e 12/13/2008 08:57 pm aurel32

target-sh4: add SH7785 as CPU option

(Vladimir Prus)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6012 c046a42c-6fe2-441c-8c8c-71466251a162

42083220 12/12/2008 12:42 am aurel32

target-sh4: remove 2 warnings

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5993 c046a42c-6fe2-441c-8c8c-71466251a162

eeda6778 12/10/2008 07:31 pm aurel32

target-sh4: Add SH bit handling to TLB

This patch adds SH bit handling to sh4's TLB, which is a part of MMU
functionality that had not been implemented in qemu.

Additionally, increment_urc() call in cpu_load_tlb() is deleted, because
the specification explicitly says that URC is not incremented by an LDTLB...

f6198371 12/10/2008 07:31 pm aurel32

target-sh4: check FD bit for FP instructions

Based on a patch from Vladimir Prus <>

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5970 c046a42c-6fe2-441c-8c8c-71466251a162

b79e1752 12/08/2008 12:46 am aurel32

SH4: kill a few warnings

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5938 c046a42c-6fe2-441c-8c8c-71466251a162

d8299bcc 12/08/2008 12:46 am aurel32

SH4: Implement FD bit

SH4 manual say that if a floating point instruction is executed while
FD bit in the status register is 1, an exception should be raised. QEMU
presently does not do that, so the kernel does not initialize FP state
for any thread, nor does it save/restore FP state. The most apparent...

5c16736a 12/07/2008 09:39 pm balrog

SH4: Eliminate P4 to A7 mangling (Takashi YOSHII).

Main purpose of this is to delete
*physical = address & 0x1fffffff;
at target-sh4/helper.c:449, using new mmio rule introduced by #5849
This masking is a nice trick to realize P4/A7 duality of SH registers....

1e5459a3 12/07/2008 09:08 pm balrog

SH: On-chip PCI controller support (Takashi YOSHII).

This patch adds SuperH on-chip PCI controller(PCIC) support.

Signed-off-by: Takashi YOSHII <>
Signed-off-by: Andrzej Zaborowski <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5927 c046a42c-6fe2-441c-8c8c-71466251a162

db8d9902 12/07/2008 08:15 pm aurel32

Remove FORCE_RET() and RETURN

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5923 c046a42c-6fe2-441c-8c8c-71466251a162

2cbd949d 11/30/2008 06:23 pm aurel32

Common cpu_loop_exit prototype

All archs use the same cpu_loop_exit, so move the prototype in a common
header. i386 was carrying a __hidden attribute, but that was empty for
this arch anyway.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Aurelien Jarno <>...

c0ce998e 11/26/2008 12:13 am aliguori

Use sys-queue.h for break/watchpoint managment (Jan Kiszka)

This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.

Signed-off-by: Jan Kiszka <>...

11bb09f1 11/22/2008 12:09 pm aurel32

target-sh4: fix 64-bit fmov to/from memory

When loading/storing a register pair, the even-numbered register
always maps to the low 32 bits of memory independently of target
endian configuration.

Signed-off-by: Mans Rullgard <>
Signed-off-by: Aurelien Jarno <>...

cf7055bd 11/22/2008 12:33 am aurel32

target-sh4: fix TLB/MMU emulation

Based on a patch from Vladimir Prus and comments from Shin-ichiro KAWASAKI.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5770 c046a42c-6fe2-441c-8c8c-71466251a162

12d96138 11/20/2008 08:41 am aurel32

target-sh4: fix fldi0/fldi1

fldi0/fldi1 should be executed as a nop if FPSCR.FR is set instead of
generating an exception. Reported by Laurent Desnogues.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5759 c046a42c-6fe2-441c-8c8c-71466251a162

66ba317c 11/19/2008 08:00 pm aurel32

target-sh4: map FP registers as TCG variables

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5758 c046a42c-6fe2-441c-8c8c-71466251a162

9850d1e8 11/19/2008 08:00 pm aurel32

target-sh4: use CPU_Float/CPU_Double instead of ugly casts

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5757 c046a42c-6fe2-441c-8c8c-71466251a162

a1d1bb31 11/18/2008 10:07 pm aliguori

Refactor and enhance break/watchpoint API (Jan Kiszka)

This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.

First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists....

6b917547 11/18/2008 09:46 pm aliguori

Refactor translation block CPU state handling (Jan Kiszka)

This patch refactors the way the CPU state is handled that is associated
with a TB. The basic motivation is to move more arch specific code out
of generic files. Specifically the long #ifdef clutter in tb_find_fast()...

622ed360 11/18/2008 09:36 pm aliguori

Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)

as macros should be avoided when possible.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162

a7812ae4 11/17/2008 04:43 pm pbrook

TCG variable type checking.

Signed-off-by: Paul Brook <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162

b1d8e52e 10/26/2008 03:43 pm blueswir1

Fix undeclared symbol warnings from sparse

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162

7526aa2d 10/13/2008 02:32 am aurel32

SH4: Implement MOVUA.L

  • target-sh4/translate.c (_decode_opc): Implement
    MOVUA.L.

(Vladimir Prus)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5473 c046a42c-6fe2-441c-8c8c-71466251a162

bdbf22e6 10/13/2008 02:32 am aurel32

SH4: fix single-stepping

  • target-sh/translate.c (gen_intermediate_code_internal): If
    singlestep is enabled, update PC before stopping.

(Vladimir Prus)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5472 c046a42c-6fe2-441c-8c8c-71466251a162

c69e3264 10/13/2008 02:32 am aurel32

SH4: Fix swap.b

The SH4 manual documents the swap.b instruction as follows:

SWAP.B Rm,Rn
Rm → swap lower 2 bytes → Rn

Current QEMU code, in addition to the above, also clears the high
16 bits. The immediate breakage I saw is that htonl function applied...

1ed1a787 10/05/2008 02:47 pm blueswir1

Silence some warnings about no value returned from non-void function

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5430 c046a42c-6fe2-441c-8c8c-71466251a162

36aa55dc 09/21/2008 04:48 pm pbrook

Add concat_i32_i64 op.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5280 c046a42c-6fe2-441c-8c8c-71466251a162

b55266b5 09/20/2008 11:07 am blueswir1

Suppress gcc 4.x -Wpointer-sign (included in -Wall) warnings

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5275 c046a42c-6fe2-441c-8c8c-71466251a162

fe25591e 09/15/2008 11:49 am aurel32

SH4: Privilege check for instructions

This patch adds check for all SH4 instructions which are
executed only in privileged mode.

(Shin-ichiro KAWASAKI)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5224 c046a42c-6fe2-441c-8c8c-71466251a162

0b6d3ae0 09/15/2008 10:43 am aurel32

qemu sh4 nptl support

(Michael Trimarchi)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5223 c046a42c-6fe2-441c-8c8c-71466251a162

7478757e 09/15/2008 10:34 am aurel32

sh4: doesn't set the cpu_model_str

Fix setting of cpu_model_str for sh4

(Michael Trimarchi)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5222 c046a42c-6fe2-441c-8c8c-71466251a162

f24f381b 09/15/2008 09:42 am aurel32

SH4: sleep instruction bug fix

fix a bug on 'sleep' instruction, which have caused halt of idle task.
As i386 'hlt' instruction does, it should save PC before sleep.

(Shin-ichiro KAWASAKI)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5220 c046a42c-6fe2-441c-8c8c-71466251a162

0fd3ca30 09/02/2008 07:18 pm aurel32

sh4: CPU versioning.

Trivial patch adding CPU listing and the ability to do per-subtype
CVR/PVR/PRR values. Presently SH7750R and SH7751R definitions are
provided, as these are the ones in present use in-tree.

The CVR value for SH7751R is intentionally restricted so the kernel...

86e0abc7 09/02/2008 11:42 am aurel32

SH4: fix a regression introduced in r5122

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5132 c046a42c-6fe2-441c-8c8c-71466251a162

17b086f7 09/02/2008 01:12 am aurel32

SH4: Remove dyngen leftovers

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5126 c046a42c-6fe2-441c-8c8c-71466251a162

7fdf924f 09/02/2008 01:12 am aurel32

SH4: final conversion to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5125 c046a42c-6fe2-441c-8c8c-71466251a162

cc4ba6a9 09/02/2008 01:11 am aurel32

SH4: convert floating-point ops to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5124 c046a42c-6fe2-441c-8c8c-71466251a162

c55497ec 09/01/2008 04:09 pm aurel32

SH4: Remove most uses of cpu_T0 and cpu_T1

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5122 c046a42c-6fe2-441c-8c8c-71466251a162

7efbe241 09/01/2008 04:09 pm aurel32

SH4: TCG optimisations

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5121 c046a42c-6fe2-441c-8c8c-71466251a162

69d6275b 09/01/2008 04:09 pm aurel32

SH4: Convert remaining non-fp ops to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5120 c046a42c-6fe2-441c-8c8c-71466251a162

c047da1a 08/31/2008 01:37 am aurel32

SH4: Convert shift functions to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5119 c046a42c-6fe2-441c-8c8c-71466251a162

390af821 08/31/2008 01:07 am aurel32

SH4: convert control/status register load/store to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5118 c046a42c-6fe2-441c-8c8c-71466251a162

fa4da107 08/31/2008 01:07 am aurel32

SH4: Convert memory loads/stores to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5117 c046a42c-6fe2-441c-8c8c-71466251a162

6f06939b 08/30/2008 04:55 pm aurel32

SH4: convert some more arithmetics ops to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5116 c046a42c-6fe2-441c-8c8c-71466251a162

e6afc2f4 08/30/2008 02:01 am aurel32

SH4: convert a few helpers to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5112 c046a42c-6fe2-441c-8c8c-71466251a162

1000822b 08/30/2008 01:32 am aurel32

SH4: convert branch/jump instructions to TCG

(Shin-ichiro KAWASAKI)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5111 c046a42c-6fe2-441c-8c8c-71466251a162

a4625612 08/29/2008 11:12 pm aurel32

SH4: convert simple compare instructions to TCG

(Shin-ichiro KAWASAKI)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5108 c046a42c-6fe2-441c-8c8c-71466251a162