root / hw / input / pckbd.c @ a8aec295
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1 | 80cabfad | bellard | /*
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2 | 80cabfad | bellard | * QEMU PC keyboard emulation
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3 | 5fafdf24 | ths | *
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4 | 80cabfad | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | 5fafdf24 | ths | *
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6 | 80cabfad | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 80cabfad | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 80cabfad | bellard | * in the Software without restriction, including without limitation the rights
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9 | 80cabfad | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 80cabfad | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 80cabfad | bellard | * furnished to do so, subject to the following conditions:
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12 | 80cabfad | bellard | *
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13 | 80cabfad | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 80cabfad | bellard | * all copies or substantial portions of the Software.
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15 | 80cabfad | bellard | *
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16 | 80cabfad | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 80cabfad | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 80cabfad | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 80cabfad | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 80cabfad | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 80cabfad | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 80cabfad | bellard | * THE SOFTWARE.
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23 | 80cabfad | bellard | */
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24 | 83c9f4ca | Paolo Bonzini | #include "hw/hw.h" |
25 | 0d09e41a | Paolo Bonzini | #include "hw/isa/isa.h" |
26 | 0d09e41a | Paolo Bonzini | #include "hw/i386/pc.h" |
27 | 0d09e41a | Paolo Bonzini | #include "hw/input/ps2.h" |
28 | 9c17d615 | Paolo Bonzini | #include "sysemu/sysemu.h" |
29 | 80cabfad | bellard | |
30 | 80cabfad | bellard | /* debug PC keyboard */
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31 | 80cabfad | bellard | //#define DEBUG_KBD
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32 | c86d2c23 | Blue Swirl | #ifdef DEBUG_KBD
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33 | c86d2c23 | Blue Swirl | #define DPRINTF(fmt, ...) \
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34 | c86d2c23 | Blue Swirl | do { printf("KBD: " fmt , ## __VA_ARGS__); } while (0) |
35 | c86d2c23 | Blue Swirl | #else
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36 | c86d2c23 | Blue Swirl | #define DPRINTF(fmt, ...)
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37 | c86d2c23 | Blue Swirl | #endif
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38 | 80cabfad | bellard | |
39 | 80cabfad | bellard | /* Keyboard Controller Commands */
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40 | 80cabfad | bellard | #define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */ |
41 | 80cabfad | bellard | #define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */ |
42 | 80cabfad | bellard | #define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */ |
43 | 80cabfad | bellard | #define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */ |
44 | 80cabfad | bellard | #define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */ |
45 | 80cabfad | bellard | #define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */ |
46 | 80cabfad | bellard | #define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */ |
47 | 80cabfad | bellard | #define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */ |
48 | 80cabfad | bellard | #define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */ |
49 | 80cabfad | bellard | #define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */ |
50 | 80cabfad | bellard | #define KBD_CCMD_READ_INPORT 0xC0 /* read input port */ |
51 | 80cabfad | bellard | #define KBD_CCMD_READ_OUTPORT 0xD0 /* read output port */ |
52 | 80cabfad | bellard | #define KBD_CCMD_WRITE_OUTPORT 0xD1 /* write output port */ |
53 | 80cabfad | bellard | #define KBD_CCMD_WRITE_OBUF 0xD2 |
54 | 80cabfad | bellard | #define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if |
55 | 80cabfad | bellard | initiated by the auxiliary device */
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56 | 80cabfad | bellard | #define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */ |
57 | 80cabfad | bellard | #define KBD_CCMD_DISABLE_A20 0xDD /* HP vectra only ? */ |
58 | 80cabfad | bellard | #define KBD_CCMD_ENABLE_A20 0xDF /* HP vectra only ? */ |
59 | 5ccaa4ce | Bernhard Kohl | #define KBD_CCMD_PULSE_BITS_3_0 0xF0 /* Pulse bits 3-0 of the output port P2. */ |
60 | 5ccaa4ce | Bernhard Kohl | #define KBD_CCMD_RESET 0xFE /* Pulse bit 0 of the output port P2 = CPU reset. */ |
61 | 5ccaa4ce | Bernhard Kohl | #define KBD_CCMD_NO_OP 0xFF /* Pulse no bits of the output port P2. */ |
62 | 80cabfad | bellard | |
63 | 80cabfad | bellard | /* Keyboard Commands */
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64 | 80cabfad | bellard | #define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */ |
65 | 80cabfad | bellard | #define KBD_CMD_ECHO 0xEE |
66 | 80cabfad | bellard | #define KBD_CMD_GET_ID 0xF2 /* get keyboard ID */ |
67 | 80cabfad | bellard | #define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */ |
68 | 80cabfad | bellard | #define KBD_CMD_ENABLE 0xF4 /* Enable scanning */ |
69 | 80cabfad | bellard | #define KBD_CMD_RESET_DISABLE 0xF5 /* reset and disable scanning */ |
70 | 80cabfad | bellard | #define KBD_CMD_RESET_ENABLE 0xF6 /* reset and enable scanning */ |
71 | 80cabfad | bellard | #define KBD_CMD_RESET 0xFF /* Reset */ |
72 | 80cabfad | bellard | |
73 | 80cabfad | bellard | /* Keyboard Replies */
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74 | 80cabfad | bellard | #define KBD_REPLY_POR 0xAA /* Power on reset */ |
75 | 80cabfad | bellard | #define KBD_REPLY_ACK 0xFA /* Command ACK */ |
76 | 80cabfad | bellard | #define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */ |
77 | 80cabfad | bellard | |
78 | 80cabfad | bellard | /* Status Register Bits */
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79 | 80cabfad | bellard | #define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */ |
80 | 80cabfad | bellard | #define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */ |
81 | 80cabfad | bellard | #define KBD_STAT_SELFTEST 0x04 /* Self test successful */ |
82 | 80cabfad | bellard | #define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */ |
83 | 80cabfad | bellard | #define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */ |
84 | 80cabfad | bellard | #define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */ |
85 | 80cabfad | bellard | #define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */ |
86 | 80cabfad | bellard | #define KBD_STAT_PERR 0x80 /* Parity error */ |
87 | 80cabfad | bellard | |
88 | 80cabfad | bellard | /* Controller Mode Register Bits */
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89 | 80cabfad | bellard | #define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */ |
90 | 80cabfad | bellard | #define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */ |
91 | 80cabfad | bellard | #define KBD_MODE_SYS 0x04 /* The system flag (?) */ |
92 | 80cabfad | bellard | #define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */ |
93 | 80cabfad | bellard | #define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */ |
94 | 80cabfad | bellard | #define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */ |
95 | 80cabfad | bellard | #define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */ |
96 | 80cabfad | bellard | #define KBD_MODE_RFU 0x80 |
97 | 80cabfad | bellard | |
98 | 956a3e6b | Blue Swirl | /* Output Port Bits */
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99 | 956a3e6b | Blue Swirl | #define KBD_OUT_RESET 0x01 /* 1=normal mode, 0=reset */ |
100 | 956a3e6b | Blue Swirl | #define KBD_OUT_A20 0x02 /* x86 only */ |
101 | 956a3e6b | Blue Swirl | #define KBD_OUT_OBF 0x10 /* Keyboard output buffer full */ |
102 | 956a3e6b | Blue Swirl | #define KBD_OUT_MOUSE_OBF 0x20 /* Mouse output buffer full */ |
103 | 956a3e6b | Blue Swirl | |
104 | 80cabfad | bellard | /* Mouse Commands */
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105 | 80cabfad | bellard | #define AUX_SET_SCALE11 0xE6 /* Set 1:1 scaling */ |
106 | 80cabfad | bellard | #define AUX_SET_SCALE21 0xE7 /* Set 2:1 scaling */ |
107 | 80cabfad | bellard | #define AUX_SET_RES 0xE8 /* Set resolution */ |
108 | 80cabfad | bellard | #define AUX_GET_SCALE 0xE9 /* Get scaling factor */ |
109 | 80cabfad | bellard | #define AUX_SET_STREAM 0xEA /* Set stream mode */ |
110 | 80cabfad | bellard | #define AUX_POLL 0xEB /* Poll */ |
111 | 80cabfad | bellard | #define AUX_RESET_WRAP 0xEC /* Reset wrap mode */ |
112 | 80cabfad | bellard | #define AUX_SET_WRAP 0xEE /* Set wrap mode */ |
113 | 80cabfad | bellard | #define AUX_SET_REMOTE 0xF0 /* Set remote mode */ |
114 | 80cabfad | bellard | #define AUX_GET_TYPE 0xF2 /* Get type */ |
115 | 80cabfad | bellard | #define AUX_SET_SAMPLE 0xF3 /* Set sample rate */ |
116 | 80cabfad | bellard | #define AUX_ENABLE_DEV 0xF4 /* Enable aux device */ |
117 | 80cabfad | bellard | #define AUX_DISABLE_DEV 0xF5 /* Disable aux device */ |
118 | 80cabfad | bellard | #define AUX_SET_DEFAULT 0xF6 |
119 | 80cabfad | bellard | #define AUX_RESET 0xFF /* Reset aux device */ |
120 | 80cabfad | bellard | #define AUX_ACK 0xFA /* Command byte ACK. */ |
121 | 80cabfad | bellard | |
122 | 80cabfad | bellard | #define MOUSE_STATUS_REMOTE 0x40 |
123 | 80cabfad | bellard | #define MOUSE_STATUS_ENABLED 0x20 |
124 | 80cabfad | bellard | #define MOUSE_STATUS_SCALE21 0x10 |
125 | 80cabfad | bellard | |
126 | daa57963 | bellard | #define KBD_PENDING_KBD 1 |
127 | daa57963 | bellard | #define KBD_PENDING_AUX 2 |
128 | 80cabfad | bellard | |
129 | 80cabfad | bellard | typedef struct KBDState { |
130 | 80cabfad | bellard | uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
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131 | 80cabfad | bellard | uint8_t status; |
132 | 80cabfad | bellard | uint8_t mode; |
133 | 956a3e6b | Blue Swirl | uint8_t outport; |
134 | daa57963 | bellard | /* Bitmask of devices with data available. */
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135 | 7783e9f0 | pbrook | uint8_t pending; |
136 | daa57963 | bellard | void *kbd;
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137 | daa57963 | bellard | void *mouse;
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138 | b7678d96 | ths | |
139 | d537cf6c | pbrook | qemu_irq irq_kbd; |
140 | d537cf6c | pbrook | qemu_irq irq_mouse; |
141 | 956a3e6b | Blue Swirl | qemu_irq *a20_out; |
142 | a8170e5e | Avi Kivity | hwaddr mask; |
143 | 80cabfad | bellard | } KBDState; |
144 | 80cabfad | bellard | |
145 | 80cabfad | bellard | /* update irq and KBD_STAT_[MOUSE_]OBF */
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146 | 80cabfad | bellard | /* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
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147 | 80cabfad | bellard | incorrect, but it avoids having to simulate exact delays */
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148 | 80cabfad | bellard | static void kbd_update_irq(KBDState *s) |
149 | 80cabfad | bellard | { |
150 | b7678d96 | ths | int irq_kbd_level, irq_mouse_level;
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151 | 80cabfad | bellard | |
152 | b7678d96 | ths | irq_kbd_level = 0;
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153 | b7678d96 | ths | irq_mouse_level = 0;
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154 | 80cabfad | bellard | s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF); |
155 | 956a3e6b | Blue Swirl | s->outport &= ~(KBD_OUT_OBF | KBD_OUT_MOUSE_OBF); |
156 | daa57963 | bellard | if (s->pending) {
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157 | 80cabfad | bellard | s->status |= KBD_STAT_OBF; |
158 | 956a3e6b | Blue Swirl | s->outport |= KBD_OUT_OBF; |
159 | b92bb99b | ths | /* kbd data takes priority over aux data. */
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160 | daa57963 | bellard | if (s->pending == KBD_PENDING_AUX) {
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161 | 80cabfad | bellard | s->status |= KBD_STAT_MOUSE_OBF; |
162 | 956a3e6b | Blue Swirl | s->outport |= KBD_OUT_MOUSE_OBF; |
163 | 80cabfad | bellard | if (s->mode & KBD_MODE_MOUSE_INT)
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164 | b7678d96 | ths | irq_mouse_level = 1;
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165 | 80cabfad | bellard | } else {
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166 | 5fafdf24 | ths | if ((s->mode & KBD_MODE_KBD_INT) &&
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167 | 80cabfad | bellard | !(s->mode & KBD_MODE_DISABLE_KBD)) |
168 | b7678d96 | ths | irq_kbd_level = 1;
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169 | 80cabfad | bellard | } |
170 | 80cabfad | bellard | } |
171 | d537cf6c | pbrook | qemu_set_irq(s->irq_kbd, irq_kbd_level); |
172 | d537cf6c | pbrook | qemu_set_irq(s->irq_mouse, irq_mouse_level); |
173 | 80cabfad | bellard | } |
174 | 80cabfad | bellard | |
175 | daa57963 | bellard | static void kbd_update_kbd_irq(void *opaque, int level) |
176 | 80cabfad | bellard | { |
177 | daa57963 | bellard | KBDState *s = (KBDState *)opaque; |
178 | 80cabfad | bellard | |
179 | daa57963 | bellard | if (level)
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180 | daa57963 | bellard | s->pending |= KBD_PENDING_KBD; |
181 | 80cabfad | bellard | else
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182 | daa57963 | bellard | s->pending &= ~KBD_PENDING_KBD; |
183 | 80cabfad | bellard | kbd_update_irq(s); |
184 | 80cabfad | bellard | } |
185 | 80cabfad | bellard | |
186 | daa57963 | bellard | static void kbd_update_aux_irq(void *opaque, int level) |
187 | 80cabfad | bellard | { |
188 | daa57963 | bellard | KBDState *s = (KBDState *)opaque; |
189 | daa57963 | bellard | |
190 | daa57963 | bellard | if (level)
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191 | daa57963 | bellard | s->pending |= KBD_PENDING_AUX; |
192 | daa57963 | bellard | else
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193 | daa57963 | bellard | s->pending &= ~KBD_PENDING_AUX; |
194 | daa57963 | bellard | kbd_update_irq(s); |
195 | 80cabfad | bellard | } |
196 | 80cabfad | bellard | |
197 | d540bfe0 | Alexander Graf | static uint64_t kbd_read_status(void *opaque, hwaddr addr, |
198 | d540bfe0 | Alexander Graf | unsigned size)
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199 | 80cabfad | bellard | { |
200 | b41a2cd1 | bellard | KBDState *s = opaque; |
201 | 80cabfad | bellard | int val;
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202 | 80cabfad | bellard | val = s->status; |
203 | c86d2c23 | Blue Swirl | DPRINTF("kbd: read status=0x%02x\n", val);
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204 | 80cabfad | bellard | return val;
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205 | 80cabfad | bellard | } |
206 | 80cabfad | bellard | |
207 | daa57963 | bellard | static void kbd_queue(KBDState *s, int b, int aux) |
208 | daa57963 | bellard | { |
209 | daa57963 | bellard | if (aux)
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210 | daa57963 | bellard | ps2_queue(s->mouse, b); |
211 | daa57963 | bellard | else
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212 | daa57963 | bellard | ps2_queue(s->kbd, b); |
213 | daa57963 | bellard | } |
214 | daa57963 | bellard | |
215 | 4b78a802 | Blue Swirl | static void outport_write(KBDState *s, uint32_t val) |
216 | 956a3e6b | Blue Swirl | { |
217 | c86d2c23 | Blue Swirl | DPRINTF("kbd: write outport=0x%02x\n", val);
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218 | 956a3e6b | Blue Swirl | s->outport = val; |
219 | 956a3e6b | Blue Swirl | if (s->a20_out) {
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220 | 956a3e6b | Blue Swirl | qemu_set_irq(*s->a20_out, (val >> 1) & 1); |
221 | 956a3e6b | Blue Swirl | } |
222 | 956a3e6b | Blue Swirl | if (!(val & 1)) { |
223 | 956a3e6b | Blue Swirl | qemu_system_reset_request(); |
224 | 956a3e6b | Blue Swirl | } |
225 | 956a3e6b | Blue Swirl | } |
226 | 956a3e6b | Blue Swirl | |
227 | d540bfe0 | Alexander Graf | static void kbd_write_command(void *opaque, hwaddr addr, |
228 | d540bfe0 | Alexander Graf | uint64_t val, unsigned size)
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229 | 80cabfad | bellard | { |
230 | b41a2cd1 | bellard | KBDState *s = opaque; |
231 | 80cabfad | bellard | |
232 | c86d2c23 | Blue Swirl | DPRINTF("kbd: write cmd=0x%02x\n", val);
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233 | 5ccaa4ce | Bernhard Kohl | |
234 | 5ccaa4ce | Bernhard Kohl | /* Bits 3-0 of the output port P2 of the keyboard controller may be pulsed
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235 | 5ccaa4ce | Bernhard Kohl | * low for approximately 6 micro seconds. Bits 3-0 of the KBD_CCMD_PULSE
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236 | 5ccaa4ce | Bernhard Kohl | * command specify the output port bits to be pulsed.
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237 | 5ccaa4ce | Bernhard Kohl | * 0: Bit should be pulsed. 1: Bit should not be modified.
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238 | 5ccaa4ce | Bernhard Kohl | * The only useful version of this command is pulsing bit 0,
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239 | 5ccaa4ce | Bernhard Kohl | * which does a CPU reset.
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240 | 5ccaa4ce | Bernhard Kohl | */
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241 | 5ccaa4ce | Bernhard Kohl | if((val & KBD_CCMD_PULSE_BITS_3_0) == KBD_CCMD_PULSE_BITS_3_0) {
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242 | 5ccaa4ce | Bernhard Kohl | if(!(val & 1)) |
243 | 5ccaa4ce | Bernhard Kohl | val = KBD_CCMD_RESET; |
244 | 5ccaa4ce | Bernhard Kohl | else
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245 | 5ccaa4ce | Bernhard Kohl | val = KBD_CCMD_NO_OP; |
246 | 5ccaa4ce | Bernhard Kohl | } |
247 | 5ccaa4ce | Bernhard Kohl | |
248 | 80cabfad | bellard | switch(val) {
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249 | 80cabfad | bellard | case KBD_CCMD_READ_MODE:
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250 | 889bec69 | balrog | kbd_queue(s, s->mode, 0);
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251 | 80cabfad | bellard | break;
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252 | 80cabfad | bellard | case KBD_CCMD_WRITE_MODE:
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253 | 80cabfad | bellard | case KBD_CCMD_WRITE_OBUF:
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254 | 80cabfad | bellard | case KBD_CCMD_WRITE_AUX_OBUF:
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255 | 80cabfad | bellard | case KBD_CCMD_WRITE_MOUSE:
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256 | 80cabfad | bellard | case KBD_CCMD_WRITE_OUTPORT:
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257 | 80cabfad | bellard | s->write_cmd = val; |
258 | 80cabfad | bellard | break;
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259 | 80cabfad | bellard | case KBD_CCMD_MOUSE_DISABLE:
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260 | 80cabfad | bellard | s->mode |= KBD_MODE_DISABLE_MOUSE; |
261 | 80cabfad | bellard | break;
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262 | 80cabfad | bellard | case KBD_CCMD_MOUSE_ENABLE:
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263 | 80cabfad | bellard | s->mode &= ~KBD_MODE_DISABLE_MOUSE; |
264 | 80cabfad | bellard | break;
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265 | 80cabfad | bellard | case KBD_CCMD_TEST_MOUSE:
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266 | 80cabfad | bellard | kbd_queue(s, 0x00, 0); |
267 | 80cabfad | bellard | break;
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268 | 80cabfad | bellard | case KBD_CCMD_SELF_TEST:
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269 | 80cabfad | bellard | s->status |= KBD_STAT_SELFTEST; |
270 | 80cabfad | bellard | kbd_queue(s, 0x55, 0); |
271 | 80cabfad | bellard | break;
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272 | 80cabfad | bellard | case KBD_CCMD_KBD_TEST:
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273 | 80cabfad | bellard | kbd_queue(s, 0x00, 0); |
274 | 80cabfad | bellard | break;
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275 | 80cabfad | bellard | case KBD_CCMD_KBD_DISABLE:
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276 | 80cabfad | bellard | s->mode |= KBD_MODE_DISABLE_KBD; |
277 | 80cabfad | bellard | kbd_update_irq(s); |
278 | 80cabfad | bellard | break;
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279 | 80cabfad | bellard | case KBD_CCMD_KBD_ENABLE:
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280 | 80cabfad | bellard | s->mode &= ~KBD_MODE_DISABLE_KBD; |
281 | 80cabfad | bellard | kbd_update_irq(s); |
282 | 80cabfad | bellard | break;
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283 | 80cabfad | bellard | case KBD_CCMD_READ_INPORT:
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284 | 80cabfad | bellard | kbd_queue(s, 0x00, 0); |
285 | 80cabfad | bellard | break;
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286 | 80cabfad | bellard | case KBD_CCMD_READ_OUTPORT:
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287 | 956a3e6b | Blue Swirl | kbd_queue(s, s->outport, 0);
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288 | 80cabfad | bellard | break;
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289 | 80cabfad | bellard | case KBD_CCMD_ENABLE_A20:
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290 | 956a3e6b | Blue Swirl | if (s->a20_out) {
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291 | 956a3e6b | Blue Swirl | qemu_irq_raise(*s->a20_out); |
292 | 956a3e6b | Blue Swirl | } |
293 | 956a3e6b | Blue Swirl | s->outport |= KBD_OUT_A20; |
294 | 80cabfad | bellard | break;
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295 | 80cabfad | bellard | case KBD_CCMD_DISABLE_A20:
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296 | 956a3e6b | Blue Swirl | if (s->a20_out) {
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297 | 956a3e6b | Blue Swirl | qemu_irq_lower(*s->a20_out); |
298 | 956a3e6b | Blue Swirl | } |
299 | 956a3e6b | Blue Swirl | s->outport &= ~KBD_OUT_A20; |
300 | 80cabfad | bellard | break;
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301 | 80cabfad | bellard | case KBD_CCMD_RESET:
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302 | d7d02e3c | bellard | qemu_system_reset_request(); |
303 | 80cabfad | bellard | break;
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304 | 5ccaa4ce | Bernhard Kohl | case KBD_CCMD_NO_OP:
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305 | 5ccaa4ce | Bernhard Kohl | /* ignore that */
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306 | 80cabfad | bellard | break;
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307 | 80cabfad | bellard | default:
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308 | d540bfe0 | Alexander Graf | fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", (int)val); |
309 | 80cabfad | bellard | break;
|
310 | 80cabfad | bellard | } |
311 | 80cabfad | bellard | } |
312 | 80cabfad | bellard | |
313 | d540bfe0 | Alexander Graf | static uint64_t kbd_read_data(void *opaque, hwaddr addr, |
314 | d540bfe0 | Alexander Graf | unsigned size)
|
315 | 80cabfad | bellard | { |
316 | b41a2cd1 | bellard | KBDState *s = opaque; |
317 | e41c0f26 | balrog | uint32_t val; |
318 | 80cabfad | bellard | |
319 | daa57963 | bellard | if (s->pending == KBD_PENDING_AUX)
|
320 | e41c0f26 | balrog | val = ps2_read_data(s->mouse); |
321 | e41c0f26 | balrog | else
|
322 | e41c0f26 | balrog | val = ps2_read_data(s->kbd); |
323 | 80cabfad | bellard | |
324 | c86d2c23 | Blue Swirl | DPRINTF("kbd: read data=0x%02x\n", val);
|
325 | e41c0f26 | balrog | return val;
|
326 | 80cabfad | bellard | } |
327 | 80cabfad | bellard | |
328 | d540bfe0 | Alexander Graf | static void kbd_write_data(void *opaque, hwaddr addr, |
329 | d540bfe0 | Alexander Graf | uint64_t val, unsigned size)
|
330 | 80cabfad | bellard | { |
331 | b41a2cd1 | bellard | KBDState *s = opaque; |
332 | 80cabfad | bellard | |
333 | c86d2c23 | Blue Swirl | DPRINTF("kbd: write data=0x%02x\n", val);
|
334 | 80cabfad | bellard | |
335 | 80cabfad | bellard | switch(s->write_cmd) {
|
336 | 80cabfad | bellard | case 0: |
337 | daa57963 | bellard | ps2_write_keyboard(s->kbd, val); |
338 | 80cabfad | bellard | break;
|
339 | 80cabfad | bellard | case KBD_CCMD_WRITE_MODE:
|
340 | 80cabfad | bellard | s->mode = val; |
341 | f94f5d71 | pbrook | ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0);
|
342 | daa57963 | bellard | /* ??? */
|
343 | 80cabfad | bellard | kbd_update_irq(s); |
344 | 80cabfad | bellard | break;
|
345 | 80cabfad | bellard | case KBD_CCMD_WRITE_OBUF:
|
346 | 80cabfad | bellard | kbd_queue(s, val, 0);
|
347 | 80cabfad | bellard | break;
|
348 | 80cabfad | bellard | case KBD_CCMD_WRITE_AUX_OBUF:
|
349 | 80cabfad | bellard | kbd_queue(s, val, 1);
|
350 | 80cabfad | bellard | break;
|
351 | 80cabfad | bellard | case KBD_CCMD_WRITE_OUTPORT:
|
352 | 4b78a802 | Blue Swirl | outport_write(s, val); |
353 | 80cabfad | bellard | break;
|
354 | 80cabfad | bellard | case KBD_CCMD_WRITE_MOUSE:
|
355 | daa57963 | bellard | ps2_write_mouse(s->mouse, val); |
356 | 80cabfad | bellard | break;
|
357 | 80cabfad | bellard | default:
|
358 | 80cabfad | bellard | break;
|
359 | 80cabfad | bellard | } |
360 | 80cabfad | bellard | s->write_cmd = 0;
|
361 | 80cabfad | bellard | } |
362 | 80cabfad | bellard | |
363 | d7d02e3c | bellard | static void kbd_reset(void *opaque) |
364 | 80cabfad | bellard | { |
365 | d7d02e3c | bellard | KBDState *s = opaque; |
366 | 80cabfad | bellard | |
367 | 80cabfad | bellard | s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT; |
368 | 80cabfad | bellard | s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED; |
369 | 956a3e6b | Blue Swirl | s->outport = KBD_OUT_RESET | KBD_OUT_A20; |
370 | 80cabfad | bellard | } |
371 | 80cabfad | bellard | |
372 | 3c619b59 | Juan Quintela | static const VMStateDescription vmstate_kbd = { |
373 | 3c619b59 | Juan Quintela | .name = "pckbd",
|
374 | 3c619b59 | Juan Quintela | .version_id = 3,
|
375 | 3c619b59 | Juan Quintela | .minimum_version_id = 3,
|
376 | 3c619b59 | Juan Quintela | .minimum_version_id_old = 3,
|
377 | 3c619b59 | Juan Quintela | .fields = (VMStateField []) { |
378 | 3c619b59 | Juan Quintela | VMSTATE_UINT8(write_cmd, KBDState), |
379 | 3c619b59 | Juan Quintela | VMSTATE_UINT8(status, KBDState), |
380 | 3c619b59 | Juan Quintela | VMSTATE_UINT8(mode, KBDState), |
381 | 3c619b59 | Juan Quintela | VMSTATE_UINT8(pending, KBDState), |
382 | 3c619b59 | Juan Quintela | VMSTATE_END_OF_LIST() |
383 | 3c619b59 | Juan Quintela | } |
384 | 3c619b59 | Juan Quintela | }; |
385 | 675376f2 | bellard | |
386 | b92bb99b | ths | /* Memory mapped interface */
|
387 | a8170e5e | Avi Kivity | static uint32_t kbd_mm_readb (void *opaque, hwaddr addr) |
388 | b92bb99b | ths | { |
389 | b92bb99b | ths | KBDState *s = opaque; |
390 | b92bb99b | ths | |
391 | 4efbe58f | aurel32 | if (addr & s->mask)
|
392 | d540bfe0 | Alexander Graf | return kbd_read_status(s, 0, 1) & 0xff; |
393 | 4efbe58f | aurel32 | else
|
394 | d540bfe0 | Alexander Graf | return kbd_read_data(s, 0, 1) & 0xff; |
395 | b92bb99b | ths | } |
396 | b92bb99b | ths | |
397 | a8170e5e | Avi Kivity | static void kbd_mm_writeb (void *opaque, hwaddr addr, uint32_t value) |
398 | b92bb99b | ths | { |
399 | b92bb99b | ths | KBDState *s = opaque; |
400 | b92bb99b | ths | |
401 | 4efbe58f | aurel32 | if (addr & s->mask)
|
402 | d540bfe0 | Alexander Graf | kbd_write_command(s, 0, value & 0xff, 1); |
403 | 4efbe58f | aurel32 | else
|
404 | d540bfe0 | Alexander Graf | kbd_write_data(s, 0, value & 0xff, 1); |
405 | b92bb99b | ths | } |
406 | b92bb99b | ths | |
407 | dbff76ac | Richard Henderson | static const MemoryRegionOps i8042_mmio_ops = { |
408 | dbff76ac | Richard Henderson | .endianness = DEVICE_NATIVE_ENDIAN, |
409 | dbff76ac | Richard Henderson | .old_mmio = { |
410 | dbff76ac | Richard Henderson | .read = { kbd_mm_readb, kbd_mm_readb, kbd_mm_readb }, |
411 | dbff76ac | Richard Henderson | .write = { kbd_mm_writeb, kbd_mm_writeb, kbd_mm_writeb }, |
412 | dbff76ac | Richard Henderson | }, |
413 | b92bb99b | ths | }; |
414 | b92bb99b | ths | |
415 | 71db710f | blueswir1 | void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
|
416 | dbff76ac | Richard Henderson | MemoryRegion *region, ram_addr_t size, |
417 | a8170e5e | Avi Kivity | hwaddr mask) |
418 | b92bb99b | ths | { |
419 | 7267c094 | Anthony Liguori | KBDState *s = g_malloc0(sizeof(KBDState));
|
420 | b92bb99b | ths | |
421 | b92bb99b | ths | s->irq_kbd = kbd_irq; |
422 | b92bb99b | ths | s->irq_mouse = mouse_irq; |
423 | 4efbe58f | aurel32 | s->mask = mask; |
424 | b92bb99b | ths | |
425 | 0be71e32 | Alex Williamson | vmstate_register(NULL, 0, &vmstate_kbd, s); |
426 | dbff76ac | Richard Henderson | |
427 | dbff76ac | Richard Henderson | memory_region_init_io(region, &i8042_mmio_ops, s, "i8042", size);
|
428 | b92bb99b | ths | |
429 | b92bb99b | ths | s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s); |
430 | b92bb99b | ths | s->mouse = ps2_mouse_init(kbd_update_aux_irq, s); |
431 | a08d4367 | Jan Kiszka | qemu_register_reset(kbd_reset, s); |
432 | b92bb99b | ths | } |
433 | da85ccfb | Gerd Hoffmann | |
434 | a2e0b863 | Andreas Färber | #define TYPE_I8042 "i8042" |
435 | a2e0b863 | Andreas Färber | #define I8042(obj) OBJECT_CHECK(ISAKBDState, (obj), TYPE_I8042)
|
436 | a2e0b863 | Andreas Färber | |
437 | da85ccfb | Gerd Hoffmann | typedef struct ISAKBDState { |
438 | a2e0b863 | Andreas Färber | ISADevice parent_obj; |
439 | a2e0b863 | Andreas Färber | |
440 | dbff76ac | Richard Henderson | KBDState kbd; |
441 | dbff76ac | Richard Henderson | MemoryRegion io[2];
|
442 | da85ccfb | Gerd Hoffmann | } ISAKBDState; |
443 | da85ccfb | Gerd Hoffmann | |
444 | 956a3e6b | Blue Swirl | void i8042_isa_mouse_fake_event(void *opaque) |
445 | 956a3e6b | Blue Swirl | { |
446 | 956a3e6b | Blue Swirl | ISADevice *dev = opaque; |
447 | a2e0b863 | Andreas Färber | ISAKBDState *isa = I8042(dev); |
448 | a2e0b863 | Andreas Färber | KBDState *s = &isa->kbd; |
449 | 956a3e6b | Blue Swirl | |
450 | 956a3e6b | Blue Swirl | ps2_mouse_fake_event(s->mouse); |
451 | 956a3e6b | Blue Swirl | } |
452 | 956a3e6b | Blue Swirl | |
453 | 956a3e6b | Blue Swirl | void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out)
|
454 | 956a3e6b | Blue Swirl | { |
455 | a2e0b863 | Andreas Färber | ISAKBDState *isa = I8042(dev); |
456 | a2e0b863 | Andreas Färber | KBDState *s = &isa->kbd; |
457 | 956a3e6b | Blue Swirl | |
458 | 956a3e6b | Blue Swirl | s->a20_out = a20_out; |
459 | 956a3e6b | Blue Swirl | } |
460 | 956a3e6b | Blue Swirl | |
461 | d05ac8fa | Blue Swirl | static const VMStateDescription vmstate_kbd_isa = { |
462 | be73cfe2 | Juan Quintela | .name = "pckbd",
|
463 | be73cfe2 | Juan Quintela | .version_id = 3,
|
464 | be73cfe2 | Juan Quintela | .minimum_version_id = 3,
|
465 | be73cfe2 | Juan Quintela | .minimum_version_id_old = 3,
|
466 | be73cfe2 | Juan Quintela | .fields = (VMStateField []) { |
467 | be73cfe2 | Juan Quintela | VMSTATE_STRUCT(kbd, ISAKBDState, 0, vmstate_kbd, KBDState),
|
468 | be73cfe2 | Juan Quintela | VMSTATE_END_OF_LIST() |
469 | be73cfe2 | Juan Quintela | } |
470 | be73cfe2 | Juan Quintela | }; |
471 | be73cfe2 | Juan Quintela | |
472 | dbff76ac | Richard Henderson | static const MemoryRegionOps i8042_data_ops = { |
473 | d540bfe0 | Alexander Graf | .read = kbd_read_data, |
474 | d540bfe0 | Alexander Graf | .write = kbd_write_data, |
475 | d540bfe0 | Alexander Graf | .impl = { |
476 | d540bfe0 | Alexander Graf | .min_access_size = 1,
|
477 | d540bfe0 | Alexander Graf | .max_access_size = 1,
|
478 | d540bfe0 | Alexander Graf | }, |
479 | d540bfe0 | Alexander Graf | .endianness = DEVICE_LITTLE_ENDIAN, |
480 | dbff76ac | Richard Henderson | }; |
481 | dbff76ac | Richard Henderson | |
482 | dbff76ac | Richard Henderson | static const MemoryRegionOps i8042_cmd_ops = { |
483 | d540bfe0 | Alexander Graf | .read = kbd_read_status, |
484 | d540bfe0 | Alexander Graf | .write = kbd_write_command, |
485 | d540bfe0 | Alexander Graf | .impl = { |
486 | d540bfe0 | Alexander Graf | .min_access_size = 1,
|
487 | d540bfe0 | Alexander Graf | .max_access_size = 1,
|
488 | d540bfe0 | Alexander Graf | }, |
489 | d540bfe0 | Alexander Graf | .endianness = DEVICE_LITTLE_ENDIAN, |
490 | dbff76ac | Richard Henderson | }; |
491 | dbff76ac | Richard Henderson | |
492 | db895a1e | Andreas Färber | static void i8042_initfn(Object *obj) |
493 | da85ccfb | Gerd Hoffmann | { |
494 | db895a1e | Andreas Färber | ISAKBDState *isa_s = I8042(obj); |
495 | dbff76ac | Richard Henderson | KBDState *s = &isa_s->kbd; |
496 | da85ccfb | Gerd Hoffmann | |
497 | dbff76ac | Richard Henderson | memory_region_init_io(isa_s->io + 0, &i8042_data_ops, s, "i8042-data", 1); |
498 | dbff76ac | Richard Henderson | memory_region_init_io(isa_s->io + 1, &i8042_cmd_ops, s, "i8042-cmd", 1); |
499 | db895a1e | Andreas Färber | } |
500 | db895a1e | Andreas Färber | |
501 | db895a1e | Andreas Färber | static void i8042_realizefn(DeviceState *dev, Error **errp) |
502 | db895a1e | Andreas Färber | { |
503 | db895a1e | Andreas Färber | ISADevice *isadev = ISA_DEVICE(dev); |
504 | db895a1e | Andreas Färber | ISAKBDState *isa_s = I8042(dev); |
505 | db895a1e | Andreas Färber | KBDState *s = &isa_s->kbd; |
506 | db895a1e | Andreas Färber | |
507 | db895a1e | Andreas Färber | isa_init_irq(isadev, &s->irq_kbd, 1);
|
508 | db895a1e | Andreas Färber | isa_init_irq(isadev, &s->irq_mouse, 12);
|
509 | db895a1e | Andreas Färber | |
510 | db895a1e | Andreas Färber | isa_register_ioport(isadev, isa_s->io + 0, 0x60); |
511 | db895a1e | Andreas Färber | isa_register_ioport(isadev, isa_s->io + 1, 0x64); |
512 | da85ccfb | Gerd Hoffmann | |
513 | da85ccfb | Gerd Hoffmann | s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s); |
514 | da85ccfb | Gerd Hoffmann | s->mouse = ps2_mouse_init(kbd_update_aux_irq, s); |
515 | da85ccfb | Gerd Hoffmann | qemu_register_reset(kbd_reset, s); |
516 | da85ccfb | Gerd Hoffmann | } |
517 | da85ccfb | Gerd Hoffmann | |
518 | 8f04ee08 | Anthony Liguori | static void i8042_class_initfn(ObjectClass *klass, void *data) |
519 | 8f04ee08 | Anthony Liguori | { |
520 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
521 | db895a1e | Andreas Färber | |
522 | db895a1e | Andreas Färber | dc->realize = i8042_realizefn; |
523 | 39bffca2 | Anthony Liguori | dc->no_user = 1;
|
524 | 39bffca2 | Anthony Liguori | dc->vmsd = &vmstate_kbd_isa; |
525 | 8f04ee08 | Anthony Liguori | } |
526 | 8f04ee08 | Anthony Liguori | |
527 | 8c43a6f0 | Andreas Färber | static const TypeInfo i8042_info = { |
528 | a2e0b863 | Andreas Färber | .name = TYPE_I8042, |
529 | 39bffca2 | Anthony Liguori | .parent = TYPE_ISA_DEVICE, |
530 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(ISAKBDState),
|
531 | db895a1e | Andreas Färber | .instance_init = i8042_initfn, |
532 | 39bffca2 | Anthony Liguori | .class_init = i8042_class_initfn, |
533 | da85ccfb | Gerd Hoffmann | }; |
534 | da85ccfb | Gerd Hoffmann | |
535 | 83f7d43a | Andreas Färber | static void i8042_register_types(void) |
536 | da85ccfb | Gerd Hoffmann | { |
537 | 39bffca2 | Anthony Liguori | type_register_static(&i8042_info); |
538 | da85ccfb | Gerd Hoffmann | } |
539 | 83f7d43a | Andreas Färber | |
540 | 83f7d43a | Andreas Färber | type_init(i8042_register_types) |