root / hw / spapr.c @ a9f8ad8f
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/*
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* QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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*
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* Copyright (c) 2004-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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* Copyright (c) 2010 David Gibson, IBM Corporation.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*/
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#include "sysemu.h" |
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#include "hw.h" |
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#include "elf.h" |
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#include "net.h" |
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#include "blockdev.h" |
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#include "hw/boards.h" |
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#include "hw/ppc.h" |
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#include "hw/loader.h" |
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#include "hw/spapr.h" |
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#include "hw/spapr_vio.h" |
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#include "hw/xics.h" |
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#include <libfdt.h> |
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#define KERNEL_LOAD_ADDR 0x00000000 |
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#define INITRD_LOAD_ADDR 0x02800000 |
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#define FDT_MAX_SIZE 0x10000 |
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#define RTAS_MAX_SIZE 0x10000 |
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#define FW_MAX_SIZE 0x400000 |
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#define FW_FILE_NAME "slof.bin" |
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#define MIN_RAM_SLOF 512UL |
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#define TIMEBASE_FREQ 512000000ULL |
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#define MAX_CPUS 32 |
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#define XICS_IRQS 1024 |
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sPAPREnvironment *spapr; |
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static void *spapr_create_fdt(int *fdt_size, ram_addr_t ramsize, |
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const char *cpu_model, CPUState *envs[], |
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sPAPREnvironment *spapr, |
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target_phys_addr_t initrd_base, |
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target_phys_addr_t initrd_size, |
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const char *boot_device, |
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const char *kernel_cmdline, |
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target_phys_addr_t rtas_addr, |
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target_phys_addr_t rtas_size, |
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long hash_shift)
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{ |
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void *fdt;
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uint64_t mem_reg_property[] = { 0, cpu_to_be64(ramsize) };
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uint32_t start_prop = cpu_to_be32(initrd_base); |
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uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size); |
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uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
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char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt" |
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"\0hcall-tce\0hcall-vio\0hcall-splpar";
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uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
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int i;
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char *modelname;
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int ret;
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#define _FDT(exp) \
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do { \
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int ret = (exp); \
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if (ret < 0) { \ |
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fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
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#exp, fdt_strerror(ret)); \
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exit(1); \
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} \ |
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} while (0) |
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fdt = qemu_mallocz(FDT_MAX_SIZE); |
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_FDT((fdt_create(fdt, FDT_MAX_SIZE))); |
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_FDT((fdt_finish_reservemap(fdt))); |
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/* Root node */
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_FDT((fdt_begin_node(fdt, "")));
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_FDT((fdt_property_string(fdt, "device_type", "chrp"))); |
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_FDT((fdt_property_string(fdt, "model", "qemu,emulated-pSeries-LPAR"))); |
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_FDT((fdt_property_cell(fdt, "#address-cells", 0x2))); |
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_FDT((fdt_property_cell(fdt, "#size-cells", 0x2))); |
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/* /chosen */
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_FDT((fdt_begin_node(fdt, "chosen")));
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_FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
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_FDT((fdt_property(fdt, "linux,initrd-start",
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&start_prop, sizeof(start_prop))));
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_FDT((fdt_property(fdt, "linux,initrd-end",
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&end_prop, sizeof(end_prop))));
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_FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
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_FDT((fdt_end_node(fdt))); |
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/* memory node */
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_FDT((fdt_begin_node(fdt, "memory@0")));
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_FDT((fdt_property_string(fdt, "device_type", "memory"))); |
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_FDT((fdt_property(fdt, "reg",
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mem_reg_property, sizeof(mem_reg_property))));
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_FDT((fdt_end_node(fdt))); |
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/* cpus */
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_FDT((fdt_begin_node(fdt, "cpus")));
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_FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
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_FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
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modelname = qemu_strdup(cpu_model); |
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for (i = 0; i < strlen(modelname); i++) { |
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modelname[i] = toupper(modelname[i]); |
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} |
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for (i = 0; i < smp_cpus; i++) { |
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CPUState *env = envs[i]; |
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uint32_t gserver_prop[] = {cpu_to_be32(i), 0}; /* HACK! */ |
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char *nodename;
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uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), |
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0xffffffff, 0xffffffff}; |
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if (asprintf(&nodename, "%s@%x", modelname, i) < 0) { |
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fprintf(stderr, "Allocation failure\n");
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exit(1);
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} |
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_FDT((fdt_begin_node(fdt, nodename))); |
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free(nodename); |
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_FDT((fdt_property_cell(fdt, "reg", i)));
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_FDT((fdt_property_string(fdt, "device_type", "cpu"))); |
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_FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
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_FDT((fdt_property_cell(fdt, "dcache-block-size",
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env->dcache_line_size))); |
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_FDT((fdt_property_cell(fdt, "icache-block-size",
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env->icache_line_size))); |
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_FDT((fdt_property_cell(fdt, "timebase-frequency", TIMEBASE_FREQ)));
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/* Hardcode CPU frequency for now. It's kind of arbitrary on
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* full emu, for kvm we should copy it from the host */
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_FDT((fdt_property_cell(fdt, "clock-frequency", 1000000000))); |
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_FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
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_FDT((fdt_property(fdt, "ibm,pft-size",
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pft_size_prop, sizeof(pft_size_prop))));
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_FDT((fdt_property_string(fdt, "status", "okay"))); |
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_FDT((fdt_property(fdt, "64-bit", NULL, 0))); |
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_FDT((fdt_property_cell(fdt, "ibm,ppc-interrupt-server#s", i)));
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_FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
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gserver_prop, sizeof(gserver_prop))));
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if (envs[i]->mmu_model & POWERPC_MMU_1TSEG) {
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_FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
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segs, sizeof(segs))));
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} |
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_FDT((fdt_end_node(fdt))); |
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} |
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qemu_free(modelname); |
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_FDT((fdt_end_node(fdt))); |
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/* RTAS */
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_FDT((fdt_begin_node(fdt, "rtas")));
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_FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
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sizeof(hypertas_prop))));
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_FDT((fdt_end_node(fdt))); |
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/* interrupt controller */
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_FDT((fdt_begin_node(fdt, "interrupt-controller@0")));
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_FDT((fdt_property_string(fdt, "device_type",
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"PowerPC-External-Interrupt-Presentation")));
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_FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp"))); |
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_FDT((fdt_property_cell(fdt, "reg", 0))); |
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_FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
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_FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
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interrupt_server_ranges_prop, |
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sizeof(interrupt_server_ranges_prop))));
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_FDT((fdt_end_node(fdt))); |
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/* vdevice */
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_FDT((fdt_begin_node(fdt, "vdevice")));
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_FDT((fdt_property_string(fdt, "device_type", "vdevice"))); |
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_FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice"))); |
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_FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
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_FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
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_FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2))); |
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_FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
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_FDT((fdt_end_node(fdt))); |
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_FDT((fdt_end_node(fdt))); /* close root node */
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_FDT((fdt_finish(fdt))); |
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/* re-expand to allow for further tweaks */
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_FDT((fdt_open_into(fdt, fdt, FDT_MAX_SIZE))); |
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ret = spapr_populate_vdevice(spapr->vio_bus, fdt); |
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if (ret < 0) { |
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fprintf(stderr, "couldn't setup vio devices in fdt\n");
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exit(1);
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} |
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/* RTAS */
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ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size); |
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if (ret < 0) { |
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fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
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} |
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_FDT((fdt_pack(fdt))); |
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*fdt_size = fdt_totalsize(fdt); |
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return fdt;
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} |
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static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
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{ |
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return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; |
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} |
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static void emulate_spapr_hypercall(CPUState *env) |
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{ |
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env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]); |
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} |
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/* pSeries LPAR / sPAPR hardware init */
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static void ppc_spapr_init(ram_addr_t ram_size, |
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const char *boot_device, |
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const char *kernel_filename, |
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const char *kernel_cmdline, |
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const char *initrd_filename, |
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const char *cpu_model) |
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{ |
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CPUState *envs[MAX_CPUS]; |
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void *fdt, *htab;
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int i;
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ram_addr_t ram_offset; |
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target_phys_addr_t fdt_addr, rtas_addr; |
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uint32_t kernel_base, initrd_base; |
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long kernel_size, initrd_size, htab_size, rtas_size, fw_size;
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long pteg_shift = 17; |
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int fdt_size;
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char *filename;
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int irq = 16; |
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spapr = qemu_malloc(sizeof(*spapr));
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cpu_ppc_hypercall = emulate_spapr_hypercall; |
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/* We place the device tree just below either the top of RAM, or
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* 2GB, so that it can be processed with 32-bit code if
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* necessary */
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fdt_addr = MIN(ram_size, 0x80000000) - FDT_MAX_SIZE;
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/* RTAS goes just below that */
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rtas_addr = fdt_addr - RTAS_MAX_SIZE; |
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/* init CPUs */
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if (cpu_model == NULL) { |
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cpu_model = "POWER7";
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} |
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for (i = 0; i < smp_cpus; i++) { |
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CPUState *env = cpu_init(cpu_model); |
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if (!env) {
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fprintf(stderr, "Unable to find PowerPC CPU definition\n");
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exit(1);
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} |
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/* Set time-base frequency to 512 MHz */
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cpu_ppc_tb_init(env, TIMEBASE_FREQ); |
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qemu_register_reset((QEMUResetHandler *)&cpu_reset, env); |
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env->hreset_vector = 0x60;
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env->hreset_excp_prefix = 0;
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env->gpr[3] = i;
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envs[i] = env; |
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} |
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/* allocate RAM */
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ram_offset = qemu_ram_alloc(NULL, "ppc_spapr.ram", ram_size); |
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cpu_register_physical_memory(0, ram_size, ram_offset);
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/* allocate hash page table. For now we always make this 16mb,
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* later we should probably make it scale to the size of guest
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* RAM */
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htab_size = 1ULL << (pteg_shift + 7); |
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htab = qemu_mallocz(htab_size); |
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for (i = 0; i < smp_cpus; i++) { |
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envs[i]->external_htab = htab; |
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envs[i]->htab_base = -1;
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envs[i]->htab_mask = htab_size - 1;
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} |
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
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rtas_size = load_image_targphys(filename, rtas_addr, ram_size - rtas_addr); |
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if (rtas_size < 0) { |
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hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
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exit(1);
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} |
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qemu_free(filename); |
331 |
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/* Set up Interrupt Controller */
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spapr->icp = xics_system_init(smp_cpus, envs, XICS_IRQS); |
334 |
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/* Set up VIO bus */
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spapr->vio_bus = spapr_vio_bus_init(); |
337 |
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for (i = 0; i < MAX_SERIAL_PORTS; i++, irq++) { |
339 |
if (serial_hds[i]) {
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spapr_vty_create(spapr->vio_bus, i, serial_hds[i], |
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xics_find_qirq(spapr->icp, irq), irq); |
342 |
} |
343 |
} |
344 |
|
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for (i = 0; i < nb_nics; i++, irq++) { |
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NICInfo *nd = &nd_table[i]; |
347 |
|
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if (!nd->model) {
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nd->model = qemu_strdup("ibmveth");
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} |
351 |
|
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if (strcmp(nd->model, "ibmveth") == 0) { |
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spapr_vlan_create(spapr->vio_bus, 0x1000 + i, nd,
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xics_find_qirq(spapr->icp, irq), irq); |
355 |
} else {
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fprintf(stderr, "pSeries (sPAPR) platform does not support "
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"NIC model '%s' (only ibmveth is supported)\n",
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nd->model); |
359 |
exit(1);
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} |
361 |
} |
362 |
|
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for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) { |
364 |
spapr_vscsi_create(spapr->vio_bus, 0x2000 + i,
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xics_find_qirq(spapr->icp, irq), irq); |
366 |
irq++; |
367 |
} |
368 |
|
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if (kernel_filename) {
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uint64_t lowaddr = 0;
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|
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kernel_base = KERNEL_LOAD_ADDR; |
373 |
|
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kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
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NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0); |
376 |
if (kernel_size < 0) { |
377 |
kernel_size = load_image_targphys(kernel_filename, kernel_base, |
378 |
ram_size - kernel_base); |
379 |
} |
380 |
if (kernel_size < 0) { |
381 |
fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
382 |
kernel_filename); |
383 |
exit(1);
|
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} |
385 |
|
386 |
/* load initrd */
|
387 |
if (initrd_filename) {
|
388 |
initrd_base = INITRD_LOAD_ADDR; |
389 |
initrd_size = load_image_targphys(initrd_filename, initrd_base, |
390 |
ram_size - initrd_base); |
391 |
if (initrd_size < 0) { |
392 |
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
393 |
initrd_filename); |
394 |
exit(1);
|
395 |
} |
396 |
} else {
|
397 |
initrd_base = 0;
|
398 |
initrd_size = 0;
|
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} |
400 |
} else {
|
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if (ram_size < (MIN_RAM_SLOF << 20)) { |
402 |
fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
|
403 |
"%ldM guest RAM\n", MIN_RAM_SLOF);
|
404 |
exit(1);
|
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} |
406 |
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "slof.bin");
|
407 |
fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
|
408 |
if (fw_size < 0) { |
409 |
hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
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exit(1);
|
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} |
412 |
qemu_free(filename); |
413 |
kernel_base = 0x100;
|
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initrd_base = 0;
|
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initrd_size = 0;
|
416 |
|
417 |
/* SLOF will startup the secondary CPUs using RTAS,
|
418 |
rather than expecting a kexec() style entry */
|
419 |
for (i = 0; i < smp_cpus; i++) { |
420 |
envs[i]->halted = 1;
|
421 |
} |
422 |
} |
423 |
|
424 |
/* Prepare the device tree */
|
425 |
fdt = spapr_create_fdt(&fdt_size, ram_size, cpu_model, envs, spapr, |
426 |
initrd_base, initrd_size, |
427 |
boot_device, kernel_cmdline, |
428 |
rtas_addr, rtas_size, pteg_shift + 7);
|
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assert(fdt != NULL);
|
430 |
|
431 |
cpu_physical_memory_write(fdt_addr, fdt, fdt_size); |
432 |
|
433 |
qemu_free(fdt); |
434 |
|
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envs[0]->gpr[3] = fdt_addr; |
436 |
envs[0]->gpr[5] = 0; |
437 |
envs[0]->hreset_vector = kernel_base;
|
438 |
envs[0]->halted = 0; |
439 |
} |
440 |
|
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static QEMUMachine spapr_machine = {
|
442 |
.name = "pseries",
|
443 |
.desc = "pSeries Logical Partition (PAPR compliant)",
|
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.init = ppc_spapr_init, |
445 |
.max_cpus = MAX_CPUS, |
446 |
.no_vga = 1,
|
447 |
.no_parallel = 1,
|
448 |
.use_scsi = 1,
|
449 |
}; |
450 |
|
451 |
static void spapr_machine_init(void) |
452 |
{ |
453 |
qemu_register_machine(&spapr_machine); |
454 |
} |
455 |
|
456 |
machine_init(spapr_machine_init); |