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root / target-mips / mips-defs.h @ aa343735

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#if !defined (__QEMU_MIPS_DEFS_H__)
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#define __QEMU_MIPS_DEFS_H__
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/* If we want to use host float regs... */
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//#define USE_HOST_FLOAT_REGS
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/* real pages are variable size... */
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#define TARGET_PAGE_BITS 12
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#define MIPS_TLB_MAX 128
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#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
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#define TARGET_LONG_BITS 64
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#else
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#define TARGET_LONG_BITS 32
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#endif
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/* Masks used to mark instructions to indicate which ISA level they
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   were introduced in. */
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#define                ISA_MIPS1        0x00000001
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#define                ISA_MIPS2        0x00000002
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#define                ISA_MIPS3        0x00000004
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#define                ISA_MIPS4        0x00000008
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#define                ISA_MIPS5        0x00000010
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#define                ISA_MIPS32        0x00000020
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#define                ISA_MIPS32R2        0x00000040
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#define                ISA_MIPS64        0x00000080
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#define                ISA_MIPS64R2        0x00000100
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/* MIPS ASE */
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#define                ASE_MIPS16        0x00001000
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#define                ASE_MIPS3D        0x00002000
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#define                ASE_MDMX        0x00004000
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#define                ASE_DSP                0x00008000
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#define                ASE_DSPR2        0x00010000
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/* Chip specific instructions.   */
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/* Currently void */
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/* MIPS CPU defines.  */
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#define                CPU_MIPS1        (ISA_MIPS1)
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#define                CPU_MIPS2        (CPU_MIPS1 | ISA_MIPS2)
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#define                CPU_MIPS3        (CPU_MIPS2 | ISA_MIPS3)
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#define                CPU_MIPS4        (CPU_MIPS3 | ISA_MIPS4)
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#define                CPU_MIPS5        (CPU_MIPS4 | ISA_MIPS5)
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#define                CPU_MIPS32        (CPU_MIPS2 | ISA_MIPS32)
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#define                CPU_MIPS64        (CPU_MIPS5 | CPU_MIPS32 | ISA_MIPS64)
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#define                CPU_MIPS32R2        (CPU_MIPS32 | ISA_MIPS32R2)
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#define                CPU_MIPS64R2        (CPU_MIPS64 | CPU_MIPS32R2 | ISA_MIPS64R2)
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/* Strictly follow the architecture standard:
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   - Disallow "special" instruction handling for PMON/SPIM.
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   Note that we still maintain Count/Compare to match the host clock. */
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//#define MIPS_STRICT_STANDARD 1
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#endif /* !defined (__QEMU_MIPS_DEFS_H__) */