Revision aaed909a hw/sun4u.c
| b/hw/sun4u.c | ||
|---|---|---|
| 343 | 343 |
unsigned int i; |
| 344 | 344 |
long prom_offset, initrd_size, kernel_size; |
| 345 | 345 |
PCIBus *pci_bus; |
| 346 |
const sparc_def_t *def; |
|
| 347 | 346 |
QEMUBH *bh; |
| 348 | 347 |
qemu_irq *irq; |
| 349 | 348 |
|
| ... | ... | |
| 352 | 351 |
/* init CPUs */ |
| 353 | 352 |
if (cpu_model == NULL) |
| 354 | 353 |
cpu_model = "TI UltraSparc II"; |
| 355 |
sparc_find_by_name(cpu_model, &def);
|
|
| 356 |
if (def == NULL) {
|
|
| 354 |
env = cpu_init(cpu_model);
|
|
| 355 |
if (!env) {
|
|
| 357 | 356 |
fprintf(stderr, "Unable to find Sparc CPU definition\n"); |
| 358 | 357 |
exit(1); |
| 359 | 358 |
} |
| 360 |
env = cpu_init(); |
|
| 361 |
cpu_sparc_register(env, def, 0); |
|
| 362 | 359 |
bh = qemu_bh_new(tick_irq, env); |
| 363 | 360 |
env->tick = ptimer_init(bh); |
| 364 | 361 |
ptimer_set_period(env->tick, 1ULL); |
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