Revision ab471ade
b/hw/alpha_palcode.c | ||
---|---|---|
1060 | 1060 |
{ |
1061 | 1061 |
target_long ret; |
1062 | 1062 |
|
1063 |
qemu_log("%s: palcode %02x\n", __func__, palcode); |
|
1064 | 1063 |
switch (palcode) { |
1065 | 1064 |
case 0x83: |
1066 | 1065 |
/* CALLSYS */ |
... | ... | |
1078 | 1077 |
break; |
1079 | 1078 |
case 0x9E: |
1080 | 1079 |
/* RDUNIQUE */ |
1081 |
env->ir[IR_V0] = env->unique; |
|
1082 | 1080 |
qemu_log("RDUNIQUE: " TARGET_FMT_lx "\n", env->unique); |
1083 |
break; |
|
1081 |
/* Handled in the translator for usermode. */ |
|
1082 |
abort(); |
|
1084 | 1083 |
case 0x9F: |
1085 | 1084 |
/* WRUNIQUE */ |
1086 |
env->unique = env->ir[IR_A0];
|
|
1087 |
qemu_log("WRUNIQUE: " TARGET_FMT_lx "\n", env->unique);
|
|
1088 |
break;
|
|
1085 |
qemu_log("WRUNIQUE: " TARGET_FMT_lx "\n", env->ir[IR_A0]);
|
|
1086 |
/* Handled in the translator for usermode. */
|
|
1087 |
abort();
|
|
1089 | 1088 |
default: |
1090 | 1089 |
qemu_log("%s: unhandled palcode %02x\n", |
1091 | 1090 |
__func__, palcode); |
b/target-alpha/translate.c | ||
---|---|---|
57 | 57 |
static TCGv cpu_fir[31]; |
58 | 58 |
static TCGv cpu_pc; |
59 | 59 |
static TCGv cpu_lock; |
60 |
#ifdef CONFIG_USER_ONLY |
|
61 |
static TCGv cpu_uniq; |
|
62 |
#endif |
|
60 | 63 |
|
61 | 64 |
/* register names */ |
62 | 65 |
static char cpu_reg_names[10*4+21*5 + 10*5+21*6]; |
... | ... | |
93 | 96 |
cpu_lock = tcg_global_mem_new_i64(TCG_AREG0, |
94 | 97 |
offsetof(CPUState, lock), "lock"); |
95 | 98 |
|
99 |
#ifdef CONFIG_USER_ONLY |
|
100 |
cpu_uniq = tcg_global_mem_new_i64(TCG_AREG0, |
|
101 |
offsetof(CPUState, unique), "uniq"); |
|
102 |
#endif |
|
103 |
|
|
96 | 104 |
/* register helpers */ |
97 | 105 |
#define GEN_HELPER 2 |
98 | 106 |
#include "helper.h" |
... | ... | |
751 | 759 |
switch (opc) { |
752 | 760 |
case 0x00: |
753 | 761 |
/* CALL_PAL */ |
762 |
#ifdef CONFIG_USER_ONLY |
|
763 |
if (palcode == 0x9E) { |
|
764 |
/* RDUNIQUE */ |
|
765 |
tcg_gen_mov_i64(cpu_ir[IR_V0], cpu_uniq); |
|
766 |
break; |
|
767 |
} else if (palcode == 0x9F) { |
|
768 |
/* WRUNIQUE */ |
|
769 |
tcg_gen_mov_i64(cpu_uniq, cpu_ir[IR_A0]); |
|
770 |
break; |
|
771 |
} |
|
772 |
#endif |
|
754 | 773 |
if (palcode >= 0x80 && palcode < 0xC0) { |
755 | 774 |
/* Unprivileged PAL call */ |
756 | 775 |
gen_excp(ctx, EXCP_CALL_PAL + ((palcode & 0x3F) << 6), 0); |
757 |
#if !defined (CONFIG_USER_ONLY) |
|
758 |
} else if (palcode < 0x40) { |
|
776 |
ret = 3; |
|
777 |
break; |
|
778 |
} |
|
779 |
#ifndef CONFIG_USER_ONLY |
|
780 |
if (palcode < 0x40) { |
|
759 | 781 |
/* Privileged PAL code */ |
760 | 782 |
if (ctx->mem_idx & 1) |
761 | 783 |
goto invalid_opc; |
762 |
else |
|
763 |
gen_excp(ctx, EXCP_CALL_PALP + ((palcode & 0x3F) << 6), 0); |
|
764 |
#endif |
|
765 |
} else { |
|
766 |
/* Invalid PAL call */ |
|
767 |
goto invalid_opc; |
|
784 |
gen_excp(ctx, EXCP_CALL_PALP + ((palcode & 0x3F) << 6), 0); |
|
785 |
ret = 3; |
|
768 | 786 |
} |
769 |
ret = 3; |
|
770 |
break; |
|
787 |
#endif |
|
788 |
/* Invalid PAL call */ |
|
789 |
goto invalid_opc; |
|
771 | 790 |
case 0x01: |
772 | 791 |
/* OPC01 */ |
773 | 792 |
goto invalid_opc; |
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