root / hw / pcie.c @ ac0cdda3
History | View | Annotate | Download (19.1 kB)
1 | 0428527c | Isaku Yamahata | /*
|
---|---|---|---|
2 | 0428527c | Isaku Yamahata | * pcie.c
|
3 | 0428527c | Isaku Yamahata | *
|
4 | 0428527c | Isaku Yamahata | * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
|
5 | 0428527c | Isaku Yamahata | * VA Linux Systems Japan K.K.
|
6 | 0428527c | Isaku Yamahata | *
|
7 | 0428527c | Isaku Yamahata | * This program is free software; you can redistribute it and/or modify
|
8 | 0428527c | Isaku Yamahata | * it under the terms of the GNU General Public License as published by
|
9 | 0428527c | Isaku Yamahata | * the Free Software Foundation; either version 2 of the License, or
|
10 | 0428527c | Isaku Yamahata | * (at your option) any later version.
|
11 | 0428527c | Isaku Yamahata | *
|
12 | 0428527c | Isaku Yamahata | * This program is distributed in the hope that it will be useful,
|
13 | 0428527c | Isaku Yamahata | * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
14 | 0428527c | Isaku Yamahata | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
15 | 0428527c | Isaku Yamahata | * GNU General Public License for more details.
|
16 | 0428527c | Isaku Yamahata | *
|
17 | 0428527c | Isaku Yamahata | * You should have received a copy of the GNU General Public License along
|
18 | 0428527c | Isaku Yamahata | * with this program; if not, see <http://www.gnu.org/licenses/>.
|
19 | 0428527c | Isaku Yamahata | */
|
20 | 0428527c | Isaku Yamahata | |
21 | 0428527c | Isaku Yamahata | #include "sysemu.h" |
22 | ac0cdda3 | Michael S. Tsirkin | #include "range.h" |
23 | 0428527c | Isaku Yamahata | #include "pci_bridge.h" |
24 | 0428527c | Isaku Yamahata | #include "pcie.h" |
25 | 0428527c | Isaku Yamahata | #include "msix.h" |
26 | 0428527c | Isaku Yamahata | #include "msi.h" |
27 | 0428527c | Isaku Yamahata | #include "pci_internals.h" |
28 | 0428527c | Isaku Yamahata | #include "pcie_regs.h" |
29 | 5afb9869 | Blue Swirl | #include "range.h" |
30 | 0428527c | Isaku Yamahata | |
31 | 0428527c | Isaku Yamahata | //#define DEBUG_PCIE
|
32 | 0428527c | Isaku Yamahata | #ifdef DEBUG_PCIE
|
33 | 0428527c | Isaku Yamahata | # define PCIE_DPRINTF(fmt, ...) \
|
34 | 0428527c | Isaku Yamahata | fprintf(stderr, "%s:%d " fmt, __func__, __LINE__, ## __VA_ARGS__) |
35 | 0428527c | Isaku Yamahata | #else
|
36 | 0428527c | Isaku Yamahata | # define PCIE_DPRINTF(fmt, ...) do {} while (0) |
37 | 0428527c | Isaku Yamahata | #endif
|
38 | 0428527c | Isaku Yamahata | #define PCIE_DEV_PRINTF(dev, fmt, ...) \
|
39 | 0428527c | Isaku Yamahata | PCIE_DPRINTF("%s:%x "fmt, (dev)->name, (dev)->devfn, ## __VA_ARGS__) |
40 | 0428527c | Isaku Yamahata | |
41 | 0428527c | Isaku Yamahata | |
42 | 0428527c | Isaku Yamahata | /***************************************************************************
|
43 | 0428527c | Isaku Yamahata | * pci express capability helper functions
|
44 | 0428527c | Isaku Yamahata | */
|
45 | 0428527c | Isaku Yamahata | int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port)
|
46 | 0428527c | Isaku Yamahata | { |
47 | 0428527c | Isaku Yamahata | int pos;
|
48 | 0428527c | Isaku Yamahata | uint8_t *exp_cap; |
49 | 0428527c | Isaku Yamahata | |
50 | 0428527c | Isaku Yamahata | assert(pci_is_express(dev)); |
51 | 0428527c | Isaku Yamahata | |
52 | 0428527c | Isaku Yamahata | pos = pci_add_capability(dev, PCI_CAP_ID_EXP, offset, |
53 | 0428527c | Isaku Yamahata | PCI_EXP_VER2_SIZEOF); |
54 | 0428527c | Isaku Yamahata | if (pos < 0) { |
55 | 0428527c | Isaku Yamahata | return pos;
|
56 | 0428527c | Isaku Yamahata | } |
57 | 0428527c | Isaku Yamahata | dev->exp.exp_cap = pos; |
58 | 0428527c | Isaku Yamahata | exp_cap = dev->config + pos; |
59 | 0428527c | Isaku Yamahata | |
60 | 0428527c | Isaku Yamahata | /* capability register
|
61 | 0428527c | Isaku Yamahata | interrupt message number defaults to 0 */
|
62 | 0428527c | Isaku Yamahata | pci_set_word(exp_cap + PCI_EXP_FLAGS, |
63 | 0428527c | Isaku Yamahata | ((type << PCI_EXP_FLAGS_TYPE_SHIFT) & PCI_EXP_FLAGS_TYPE) | |
64 | 0428527c | Isaku Yamahata | PCI_EXP_FLAGS_VER2); |
65 | 0428527c | Isaku Yamahata | |
66 | 0428527c | Isaku Yamahata | /* device capability register
|
67 | 0428527c | Isaku Yamahata | * table 7-12:
|
68 | 0428527c | Isaku Yamahata | * roll based error reporting bit must be set by all
|
69 | 0428527c | Isaku Yamahata | * Functions conforming to the ECN, PCI Express Base
|
70 | 0428527c | Isaku Yamahata | * Specification, Revision 1.1., or subsequent PCI Express Base
|
71 | 0428527c | Isaku Yamahata | * Specification revisions.
|
72 | 0428527c | Isaku Yamahata | */
|
73 | 0428527c | Isaku Yamahata | pci_set_long(exp_cap + PCI_EXP_DEVCAP, PCI_EXP_DEVCAP_RBER); |
74 | 0428527c | Isaku Yamahata | |
75 | 0428527c | Isaku Yamahata | pci_set_long(exp_cap + PCI_EXP_LNKCAP, |
76 | 0428527c | Isaku Yamahata | (port << PCI_EXP_LNKCAP_PN_SHIFT) | |
77 | 0428527c | Isaku Yamahata | PCI_EXP_LNKCAP_ASPMS_0S | |
78 | 0428527c | Isaku Yamahata | PCI_EXP_LNK_MLW_1 | |
79 | 0428527c | Isaku Yamahata | PCI_EXP_LNK_LS_25); |
80 | 0428527c | Isaku Yamahata | |
81 | 0428527c | Isaku Yamahata | pci_set_word(exp_cap + PCI_EXP_LNKSTA, |
82 | 0428527c | Isaku Yamahata | PCI_EXP_LNK_MLW_1 | PCI_EXP_LNK_LS_25); |
83 | 0428527c | Isaku Yamahata | |
84 | 0428527c | Isaku Yamahata | pci_set_long(exp_cap + PCI_EXP_DEVCAP2, |
85 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP); |
86 | 0428527c | Isaku Yamahata | |
87 | 0428527c | Isaku Yamahata | pci_set_word(dev->wmask + pos, PCI_EXP_DEVCTL2_EETLPPB); |
88 | 0428527c | Isaku Yamahata | return pos;
|
89 | 0428527c | Isaku Yamahata | } |
90 | 0428527c | Isaku Yamahata | |
91 | 0428527c | Isaku Yamahata | void pcie_cap_exit(PCIDevice *dev)
|
92 | 0428527c | Isaku Yamahata | { |
93 | 0428527c | Isaku Yamahata | pci_del_capability(dev, PCI_CAP_ID_EXP, PCI_EXP_VER2_SIZEOF); |
94 | 0428527c | Isaku Yamahata | } |
95 | 0428527c | Isaku Yamahata | |
96 | 0428527c | Isaku Yamahata | uint8_t pcie_cap_get_type(const PCIDevice *dev)
|
97 | 0428527c | Isaku Yamahata | { |
98 | 0428527c | Isaku Yamahata | uint32_t pos = dev->exp.exp_cap; |
99 | 0428527c | Isaku Yamahata | assert(pos > 0);
|
100 | 0428527c | Isaku Yamahata | return (pci_get_word(dev->config + pos + PCI_EXP_FLAGS) &
|
101 | 0428527c | Isaku Yamahata | PCI_EXP_FLAGS_TYPE) >> PCI_EXP_FLAGS_TYPE_SHIFT; |
102 | 0428527c | Isaku Yamahata | } |
103 | 0428527c | Isaku Yamahata | |
104 | 0428527c | Isaku Yamahata | /* MSI/MSI-X */
|
105 | 0428527c | Isaku Yamahata | /* pci express interrupt message number */
|
106 | 0428527c | Isaku Yamahata | /* 7.8.2 PCI Express Capabilities Register: Interrupt Message Number */
|
107 | 0428527c | Isaku Yamahata | void pcie_cap_flags_set_vector(PCIDevice *dev, uint8_t vector)
|
108 | 0428527c | Isaku Yamahata | { |
109 | 0428527c | Isaku Yamahata | uint8_t *exp_cap = dev->config + dev->exp.exp_cap; |
110 | 0428527c | Isaku Yamahata | assert(vector < 32);
|
111 | 0428527c | Isaku Yamahata | pci_word_test_and_clear_mask(exp_cap + PCI_EXP_FLAGS, PCI_EXP_FLAGS_IRQ); |
112 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(exp_cap + PCI_EXP_FLAGS, |
113 | 0428527c | Isaku Yamahata | vector << PCI_EXP_FLAGS_IRQ_SHIFT); |
114 | 0428527c | Isaku Yamahata | } |
115 | 0428527c | Isaku Yamahata | |
116 | 0428527c | Isaku Yamahata | uint8_t pcie_cap_flags_get_vector(PCIDevice *dev) |
117 | 0428527c | Isaku Yamahata | { |
118 | 0428527c | Isaku Yamahata | return (pci_get_word(dev->config + dev->exp.exp_cap + PCI_EXP_FLAGS) &
|
119 | 0428527c | Isaku Yamahata | PCI_EXP_FLAGS_IRQ) >> PCI_EXP_FLAGS_IRQ_SHIFT; |
120 | 0428527c | Isaku Yamahata | } |
121 | 0428527c | Isaku Yamahata | |
122 | 0428527c | Isaku Yamahata | void pcie_cap_deverr_init(PCIDevice *dev)
|
123 | 0428527c | Isaku Yamahata | { |
124 | 0428527c | Isaku Yamahata | uint32_t pos = dev->exp.exp_cap; |
125 | 0428527c | Isaku Yamahata | pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_DEVCAP, |
126 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCAP_RBER); |
127 | 0428527c | Isaku Yamahata | pci_long_test_and_set_mask(dev->wmask + pos + PCI_EXP_DEVCTL, |
128 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCTL_CERE | PCI_EXP_DEVCTL_NFERE | |
129 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE); |
130 | 0428527c | Isaku Yamahata | pci_long_test_and_set_mask(dev->w1cmask + pos + PCI_EXP_DEVSTA, |
131 | 0428527c | Isaku Yamahata | PCI_EXP_DEVSTA_CED | PCI_EXP_DEVSTA_NFED | |
132 | 0428527c | Isaku Yamahata | PCI_EXP_DEVSTA_URD | PCI_EXP_DEVSTA_URD); |
133 | 0428527c | Isaku Yamahata | } |
134 | 0428527c | Isaku Yamahata | |
135 | 0428527c | Isaku Yamahata | void pcie_cap_deverr_reset(PCIDevice *dev)
|
136 | 0428527c | Isaku Yamahata | { |
137 | 0428527c | Isaku Yamahata | uint8_t *devctl = dev->config + dev->exp.exp_cap + PCI_EXP_DEVCTL; |
138 | 0428527c | Isaku Yamahata | pci_long_test_and_clear_mask(devctl, |
139 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCTL_CERE | PCI_EXP_DEVCTL_NFERE | |
140 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE); |
141 | 0428527c | Isaku Yamahata | } |
142 | 0428527c | Isaku Yamahata | |
143 | 0428527c | Isaku Yamahata | /*
|
144 | 0428527c | Isaku Yamahata | * A PCI Express Hot-Plug Event has occured, so update slot status register
|
145 | 0428527c | Isaku Yamahata | * and notify OS of the event if necessary.
|
146 | 0428527c | Isaku Yamahata | *
|
147 | 0428527c | Isaku Yamahata | * 6.7.3 PCI Express Hot-Plug Events
|
148 | 0428527c | Isaku Yamahata | * 6.7.3.4 Software Notification of Hot-Plug Events
|
149 | 0428527c | Isaku Yamahata | */
|
150 | 0428527c | Isaku Yamahata | static void pcie_cap_slot_event(PCIDevice *dev, PCIExpressHotPlugEvent event) |
151 | 0428527c | Isaku Yamahata | { |
152 | 0428527c | Isaku Yamahata | uint8_t *exp_cap = dev->config + dev->exp.exp_cap; |
153 | 0428527c | Isaku Yamahata | uint16_t sltctl = pci_get_word(exp_cap + PCI_EXP_SLTCTL); |
154 | 0428527c | Isaku Yamahata | uint16_t sltsta = pci_get_word(exp_cap + PCI_EXP_SLTSTA); |
155 | 0428527c | Isaku Yamahata | |
156 | 0428527c | Isaku Yamahata | PCIE_DEV_PRINTF(dev, |
157 | 0428527c | Isaku Yamahata | "sltctl: 0x%02"PRIx16" sltsta: 0x%02"PRIx16" event: %x\n", |
158 | 0428527c | Isaku Yamahata | sltctl, sltsta, event); |
159 | 0428527c | Isaku Yamahata | |
160 | 0428527c | Isaku Yamahata | if (pci_word_test_and_set_mask(exp_cap + PCI_EXP_SLTSTA, event)) {
|
161 | 0428527c | Isaku Yamahata | return;
|
162 | 0428527c | Isaku Yamahata | } |
163 | 0428527c | Isaku Yamahata | sltsta = pci_get_word(exp_cap + PCI_EXP_SLTSTA); |
164 | 0428527c | Isaku Yamahata | PCIE_DEV_PRINTF(dev, "sltsta -> %02"PRIx16"\n", sltsta); |
165 | 0428527c | Isaku Yamahata | |
166 | 0428527c | Isaku Yamahata | if ((sltctl & PCI_EXP_SLTCTL_HPIE) &&
|
167 | 0428527c | Isaku Yamahata | (sltctl & event & PCI_EXP_HP_EV_SUPPORTED)) { |
168 | 0428527c | Isaku Yamahata | if (pci_msi_enabled(dev)) {
|
169 | 0428527c | Isaku Yamahata | pci_msi_notify(dev, pcie_cap_flags_get_vector(dev)); |
170 | 0428527c | Isaku Yamahata | } else {
|
171 | 0428527c | Isaku Yamahata | qemu_set_irq(dev->irq[dev->exp.hpev_intx], 1);
|
172 | 0428527c | Isaku Yamahata | } |
173 | 0428527c | Isaku Yamahata | } |
174 | 0428527c | Isaku Yamahata | } |
175 | 0428527c | Isaku Yamahata | |
176 | 0428527c | Isaku Yamahata | static int pcie_cap_slot_hotplug(DeviceState *qdev, |
177 | 0428527c | Isaku Yamahata | PCIDevice *pci_dev, int state)
|
178 | 0428527c | Isaku Yamahata | { |
179 | 0428527c | Isaku Yamahata | PCIDevice *d = DO_UPCAST(PCIDevice, qdev, qdev); |
180 | 0428527c | Isaku Yamahata | uint8_t *exp_cap = d->config + d->exp.exp_cap; |
181 | 0428527c | Isaku Yamahata | uint16_t sltsta = pci_get_word(exp_cap + PCI_EXP_SLTSTA); |
182 | 0428527c | Isaku Yamahata | |
183 | 0428527c | Isaku Yamahata | if (!pci_dev->qdev.hotplugged) {
|
184 | 0428527c | Isaku Yamahata | assert(state); /* this case only happens at machine creation. */
|
185 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(exp_cap + PCI_EXP_SLTSTA, |
186 | 0428527c | Isaku Yamahata | PCI_EXP_SLTSTA_PDS); |
187 | 0428527c | Isaku Yamahata | return 0; |
188 | 0428527c | Isaku Yamahata | } |
189 | 0428527c | Isaku Yamahata | |
190 | 0428527c | Isaku Yamahata | PCIE_DEV_PRINTF(pci_dev, "hotplug state: %d\n", state);
|
191 | 0428527c | Isaku Yamahata | if (sltsta & PCI_EXP_SLTSTA_EIS) {
|
192 | 0428527c | Isaku Yamahata | /* the slot is electromechanically locked.
|
193 | 0428527c | Isaku Yamahata | * This error is propagated up to qdev and then to HMP/QMP.
|
194 | 0428527c | Isaku Yamahata | */
|
195 | 0428527c | Isaku Yamahata | return -EBUSY;
|
196 | 0428527c | Isaku Yamahata | } |
197 | 0428527c | Isaku Yamahata | |
198 | 0428527c | Isaku Yamahata | /* TODO: multifunction hot-plug.
|
199 | 0428527c | Isaku Yamahata | * Right now, only a device of function = 0 is allowed to be
|
200 | 0428527c | Isaku Yamahata | * hot plugged/unplugged.
|
201 | 0428527c | Isaku Yamahata | */
|
202 | 0428527c | Isaku Yamahata | assert(PCI_FUNC(pci_dev->devfn) == 0);
|
203 | 0428527c | Isaku Yamahata | |
204 | 0428527c | Isaku Yamahata | if (state) {
|
205 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(exp_cap + PCI_EXP_SLTSTA, |
206 | 0428527c | Isaku Yamahata | PCI_EXP_SLTSTA_PDS); |
207 | 0428527c | Isaku Yamahata | pcie_cap_slot_event(d, PCI_EXP_HP_EV_PDC); |
208 | 0428527c | Isaku Yamahata | } else {
|
209 | 0428527c | Isaku Yamahata | qdev_free(&pci_dev->qdev); |
210 | 0428527c | Isaku Yamahata | pci_word_test_and_clear_mask(exp_cap + PCI_EXP_SLTSTA, |
211 | 0428527c | Isaku Yamahata | PCI_EXP_SLTSTA_PDS); |
212 | 0428527c | Isaku Yamahata | pcie_cap_slot_event(d, PCI_EXP_HP_EV_PDC); |
213 | 0428527c | Isaku Yamahata | } |
214 | 0428527c | Isaku Yamahata | return 0; |
215 | 0428527c | Isaku Yamahata | } |
216 | 0428527c | Isaku Yamahata | |
217 | 0428527c | Isaku Yamahata | /* pci express slot for pci express root/downstream port
|
218 | 0428527c | Isaku Yamahata | PCI express capability slot registers */
|
219 | 0428527c | Isaku Yamahata | void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot)
|
220 | 0428527c | Isaku Yamahata | { |
221 | 0428527c | Isaku Yamahata | uint32_t pos = dev->exp.exp_cap; |
222 | 0428527c | Isaku Yamahata | |
223 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(dev->config + pos + PCI_EXP_FLAGS, |
224 | 0428527c | Isaku Yamahata | PCI_EXP_FLAGS_SLOT); |
225 | 0428527c | Isaku Yamahata | |
226 | 0428527c | Isaku Yamahata | pci_long_test_and_clear_mask(dev->config + pos + PCI_EXP_SLTCAP, |
227 | 0428527c | Isaku Yamahata | ~PCI_EXP_SLTCAP_PSN); |
228 | 0428527c | Isaku Yamahata | pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_SLTCAP, |
229 | 0428527c | Isaku Yamahata | (slot << PCI_EXP_SLTCAP_PSN_SHIFT) | |
230 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCAP_EIP | |
231 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCAP_HPS | |
232 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCAP_HPC | |
233 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCAP_PIP | |
234 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCAP_AIP | |
235 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCAP_ABP); |
236 | 0428527c | Isaku Yamahata | |
237 | 0428527c | Isaku Yamahata | pci_word_test_and_clear_mask(dev->config + pos + PCI_EXP_SLTCTL, |
238 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_PIC | |
239 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_AIC); |
240 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(dev->config + pos + PCI_EXP_SLTCTL, |
241 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_PIC_OFF | |
242 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_AIC_OFF); |
243 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(dev->wmask + pos + PCI_EXP_SLTCTL, |
244 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_PIC | |
245 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_AIC | |
246 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_HPIE | |
247 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_CCIE | |
248 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_PDCE | |
249 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_ABPE); |
250 | 0428527c | Isaku Yamahata | /* Although reading PCI_EXP_SLTCTL_EIC returns always 0,
|
251 | 0428527c | Isaku Yamahata | * make the bit writable here in order to detect 1b is written.
|
252 | 0428527c | Isaku Yamahata | * pcie_cap_slot_write_config() test-and-clear the bit, so
|
253 | 0428527c | Isaku Yamahata | * this bit always returns 0 to the guest.
|
254 | 0428527c | Isaku Yamahata | */
|
255 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(dev->wmask + pos + PCI_EXP_SLTCTL, |
256 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_EIC); |
257 | 0428527c | Isaku Yamahata | |
258 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(dev->w1cmask + pos + PCI_EXP_SLTSTA, |
259 | 0428527c | Isaku Yamahata | PCI_EXP_HP_EV_SUPPORTED); |
260 | 0428527c | Isaku Yamahata | |
261 | 0428527c | Isaku Yamahata | pci_bus_hotplug(pci_bridge_get_sec_bus(DO_UPCAST(PCIBridge, dev, dev)), |
262 | 0428527c | Isaku Yamahata | pcie_cap_slot_hotplug, &dev->qdev); |
263 | 0428527c | Isaku Yamahata | } |
264 | 0428527c | Isaku Yamahata | |
265 | 0428527c | Isaku Yamahata | void pcie_cap_slot_reset(PCIDevice *dev)
|
266 | 0428527c | Isaku Yamahata | { |
267 | 0428527c | Isaku Yamahata | uint8_t *exp_cap = dev->config + dev->exp.exp_cap; |
268 | 0428527c | Isaku Yamahata | |
269 | 0428527c | Isaku Yamahata | PCIE_DEV_PRINTF(dev, "reset\n");
|
270 | 0428527c | Isaku Yamahata | |
271 | 0428527c | Isaku Yamahata | pci_word_test_and_clear_mask(exp_cap + PCI_EXP_SLTCTL, |
272 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_EIC | |
273 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_PIC | |
274 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_AIC | |
275 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_HPIE | |
276 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_CCIE | |
277 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_PDCE | |
278 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_ABPE); |
279 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(exp_cap + PCI_EXP_SLTCTL, |
280 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_PIC_OFF | |
281 | 0428527c | Isaku Yamahata | PCI_EXP_SLTCTL_AIC_OFF); |
282 | 0428527c | Isaku Yamahata | |
283 | 0428527c | Isaku Yamahata | pci_word_test_and_clear_mask(exp_cap + PCI_EXP_SLTSTA, |
284 | 0428527c | Isaku Yamahata | PCI_EXP_SLTSTA_EIS |/* on reset,
|
285 | 0428527c | Isaku Yamahata | the lock is released */
|
286 | 0428527c | Isaku Yamahata | PCI_EXP_SLTSTA_CC | |
287 | 0428527c | Isaku Yamahata | PCI_EXP_SLTSTA_PDC | |
288 | 0428527c | Isaku Yamahata | PCI_EXP_SLTSTA_ABP); |
289 | 0428527c | Isaku Yamahata | } |
290 | 0428527c | Isaku Yamahata | |
291 | 0428527c | Isaku Yamahata | void pcie_cap_slot_write_config(PCIDevice *dev,
|
292 | 0428527c | Isaku Yamahata | uint32_t addr, uint32_t val, int len,
|
293 | 0428527c | Isaku Yamahata | uint16_t sltctl_prev) |
294 | 0428527c | Isaku Yamahata | { |
295 | 0428527c | Isaku Yamahata | uint32_t pos = dev->exp.exp_cap; |
296 | 0428527c | Isaku Yamahata | uint8_t *exp_cap = dev->config + pos; |
297 | 0428527c | Isaku Yamahata | uint16_t sltctl = pci_get_word(exp_cap + PCI_EXP_SLTCTL); |
298 | 0428527c | Isaku Yamahata | uint16_t sltsta = pci_get_word(exp_cap + PCI_EXP_SLTSTA); |
299 | 0428527c | Isaku Yamahata | |
300 | ac0cdda3 | Michael S. Tsirkin | if (!ranges_overlap(addr, len, pos + PCI_EXP_SLTCTL, 2)) { |
301 | ac0cdda3 | Michael S. Tsirkin | return;
|
302 | ac0cdda3 | Michael S. Tsirkin | } |
303 | ac0cdda3 | Michael S. Tsirkin | |
304 | 0428527c | Isaku Yamahata | PCIE_DEV_PRINTF(dev, |
305 | 0428527c | Isaku Yamahata | "addr: 0x%"PRIx32" val: 0x%"PRIx32" len: %d\n" |
306 | 0428527c | Isaku Yamahata | "\tsltctl_prev: 0x%02"PRIx16" sltctl: 0x%02"PRIx16 |
307 | 0428527c | Isaku Yamahata | " sltsta: 0x%02"PRIx16"\n", |
308 | 0428527c | Isaku Yamahata | addr, val, len, sltctl_prev, sltctl, sltsta); |
309 | 0428527c | Isaku Yamahata | |
310 | 0428527c | Isaku Yamahata | /* SLTCTL */
|
311 | ac0cdda3 | Michael S. Tsirkin | PCIE_DEV_PRINTF(dev, "sltctl: 0x%02"PRIx16" -> 0x%02"PRIx16"\n", |
312 | ac0cdda3 | Michael S. Tsirkin | sltctl_prev, sltctl); |
313 | ac0cdda3 | Michael S. Tsirkin | |
314 | ac0cdda3 | Michael S. Tsirkin | if (pci_word_test_and_clear_mask(exp_cap + PCI_EXP_SLTCTL,
|
315 | ac0cdda3 | Michael S. Tsirkin | PCI_EXP_SLTCTL_EIC)) { |
316 | ac0cdda3 | Michael S. Tsirkin | sltsta ^= PCI_EXP_SLTSTA_EIS; /* toggle PCI_EXP_SLTSTA_EIS bit */
|
317 | ac0cdda3 | Michael S. Tsirkin | pci_set_word(exp_cap + PCI_EXP_SLTSTA, sltsta); |
318 | ac0cdda3 | Michael S. Tsirkin | PCIE_DEV_PRINTF(dev, "PCI_EXP_SLTCTL_EIC: "
|
319 | ac0cdda3 | Michael S. Tsirkin | "sltsta -> 0x%02"PRIx16"\n", |
320 | ac0cdda3 | Michael S. Tsirkin | sltsta); |
321 | ac0cdda3 | Michael S. Tsirkin | } |
322 | 0428527c | Isaku Yamahata | |
323 | ac0cdda3 | Michael S. Tsirkin | /*
|
324 | ac0cdda3 | Michael S. Tsirkin | * The events control bits might be enabled or disabled,
|
325 | ac0cdda3 | Michael S. Tsirkin | * Check if the software notificastion condition is satisfied
|
326 | ac0cdda3 | Michael S. Tsirkin | * or disatisfied.
|
327 | ac0cdda3 | Michael S. Tsirkin | *
|
328 | ac0cdda3 | Michael S. Tsirkin | * 6.7.3.4 Software Notification of Hot-plug events
|
329 | ac0cdda3 | Michael S. Tsirkin | */
|
330 | ac0cdda3 | Michael S. Tsirkin | if (pci_msi_enabled(dev)) {
|
331 | ac0cdda3 | Michael S. Tsirkin | bool msi_trigger =
|
332 | ac0cdda3 | Michael S. Tsirkin | (sltctl & PCI_EXP_SLTCTL_HPIE) && |
333 | ac0cdda3 | Michael S. Tsirkin | ((sltctl_prev ^ sltctl) & sltctl & /* stlctl: 0 -> 1 */
|
334 | ac0cdda3 | Michael S. Tsirkin | sltsta & PCI_EXP_HP_EV_SUPPORTED); |
335 | ac0cdda3 | Michael S. Tsirkin | if (msi_trigger) {
|
336 | ac0cdda3 | Michael S. Tsirkin | pci_msi_notify(dev, pcie_cap_flags_get_vector(dev)); |
337 | 0428527c | Isaku Yamahata | } |
338 | ac0cdda3 | Michael S. Tsirkin | } else {
|
339 | ac0cdda3 | Michael S. Tsirkin | int int_level =
|
340 | ac0cdda3 | Michael S. Tsirkin | (sltctl & PCI_EXP_SLTCTL_HPIE) && |
341 | ac0cdda3 | Michael S. Tsirkin | (sltctl & sltsta & PCI_EXP_HP_EV_SUPPORTED); |
342 | ac0cdda3 | Michael S. Tsirkin | qemu_set_irq(dev->irq[dev->exp.hpev_intx], int_level); |
343 | ac0cdda3 | Michael S. Tsirkin | } |
344 | 0428527c | Isaku Yamahata | |
345 | ac0cdda3 | Michael S. Tsirkin | if (!((sltctl_prev ^ sltctl) & PCI_EXP_SLTCTL_SUPPORTED)) {
|
346 | ac0cdda3 | Michael S. Tsirkin | PCIE_DEV_PRINTF(dev, |
347 | ac0cdda3 | Michael S. Tsirkin | "sprious command completion slctl "
|
348 | ac0cdda3 | Michael S. Tsirkin | "0x%"PRIx16" -> 0x%"PRIx16"\n", |
349 | ac0cdda3 | Michael S. Tsirkin | sltctl_prev, sltctl); |
350 | 0428527c | Isaku Yamahata | } |
351 | ac0cdda3 | Michael S. Tsirkin | |
352 | ac0cdda3 | Michael S. Tsirkin | /*
|
353 | ac0cdda3 | Michael S. Tsirkin | * 6.7.3.2 Command Completed Events
|
354 | ac0cdda3 | Michael S. Tsirkin | *
|
355 | ac0cdda3 | Michael S. Tsirkin | * Software issues a command to a hot-plug capable Downstream Port by
|
356 | ac0cdda3 | Michael S. Tsirkin | * issuing a write transaction that targets any portion of the Portโs Slot
|
357 | ac0cdda3 | Michael S. Tsirkin | * Control register. A single write to the Slot Control register is
|
358 | ac0cdda3 | Michael S. Tsirkin | * considered to be a single command, even if the write affects more than
|
359 | ac0cdda3 | Michael S. Tsirkin | * one field in the Slot Control register. In response to this transaction,
|
360 | ac0cdda3 | Michael S. Tsirkin | * the Port must carry out the requested actions and then set the
|
361 | ac0cdda3 | Michael S. Tsirkin | * associated status field for the command completed event. */
|
362 | ac0cdda3 | Michael S. Tsirkin | |
363 | ac0cdda3 | Michael S. Tsirkin | /* Real hardware might take a while to complete requested command because
|
364 | ac0cdda3 | Michael S. Tsirkin | * physical movement would be involved like locking the electromechanical
|
365 | ac0cdda3 | Michael S. Tsirkin | * lock. However in our case, command is completed instantaneously above,
|
366 | ac0cdda3 | Michael S. Tsirkin | * so send a command completion event right now.
|
367 | ac0cdda3 | Michael S. Tsirkin | */
|
368 | ac0cdda3 | Michael S. Tsirkin | pcie_cap_slot_event(dev, PCI_EXP_HP_EV_CCI); |
369 | 0428527c | Isaku Yamahata | } |
370 | 0428527c | Isaku Yamahata | |
371 | 0428527c | Isaku Yamahata | void pcie_cap_slot_push_attention_button(PCIDevice *dev)
|
372 | 0428527c | Isaku Yamahata | { |
373 | 0428527c | Isaku Yamahata | pcie_cap_slot_event(dev, PCI_EXP_HP_EV_ABP); |
374 | 0428527c | Isaku Yamahata | } |
375 | 0428527c | Isaku Yamahata | |
376 | 0428527c | Isaku Yamahata | /* root control/capabilities/status. PME isn't emulated for now */
|
377 | 0428527c | Isaku Yamahata | void pcie_cap_root_init(PCIDevice *dev)
|
378 | 0428527c | Isaku Yamahata | { |
379 | 0428527c | Isaku Yamahata | pci_set_word(dev->wmask + dev->exp.exp_cap + PCI_EXP_RTCTL, |
380 | 0428527c | Isaku Yamahata | PCI_EXP_RTCTL_SECEE | PCI_EXP_RTCTL_SENFEE | |
381 | 0428527c | Isaku Yamahata | PCI_EXP_RTCTL_SEFEE); |
382 | 0428527c | Isaku Yamahata | } |
383 | 0428527c | Isaku Yamahata | |
384 | 0428527c | Isaku Yamahata | void pcie_cap_root_reset(PCIDevice *dev)
|
385 | 0428527c | Isaku Yamahata | { |
386 | 0428527c | Isaku Yamahata | pci_set_word(dev->config + dev->exp.exp_cap + PCI_EXP_RTCTL, 0);
|
387 | 0428527c | Isaku Yamahata | } |
388 | 0428527c | Isaku Yamahata | |
389 | 0428527c | Isaku Yamahata | /*
|
390 | 0428527c | Isaku Yamahata | * TODO: implement FLR:
|
391 | 0428527c | Isaku Yamahata | * Right now sets the bit which indicates FLR is supported.
|
392 | 0428527c | Isaku Yamahata | */
|
393 | 0428527c | Isaku Yamahata | /* function level reset(FLR) */
|
394 | 0428527c | Isaku Yamahata | void pcie_cap_flr_init(PCIDevice *dev)
|
395 | 0428527c | Isaku Yamahata | { |
396 | 0428527c | Isaku Yamahata | pci_long_test_and_set_mask(dev->config + dev->exp.exp_cap + PCI_EXP_DEVCAP, |
397 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCAP_FLR); |
398 | 0428527c | Isaku Yamahata | |
399 | 0428527c | Isaku Yamahata | /* Although reading BCR_FLR returns always 0,
|
400 | 0428527c | Isaku Yamahata | * the bit is made writable here in order to detect the 1b is written
|
401 | 0428527c | Isaku Yamahata | * pcie_cap_flr_write_config() test-and-clear the bit, so
|
402 | 0428527c | Isaku Yamahata | * this bit always returns 0 to the guest.
|
403 | 0428527c | Isaku Yamahata | */
|
404 | 0428527c | Isaku Yamahata | pci_word_test_and_set_mask(dev->wmask + dev->exp.exp_cap + PCI_EXP_DEVCTL, |
405 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCTL_BCR_FLR); |
406 | 0428527c | Isaku Yamahata | } |
407 | 0428527c | Isaku Yamahata | |
408 | 0428527c | Isaku Yamahata | void pcie_cap_flr_write_config(PCIDevice *dev,
|
409 | 0428527c | Isaku Yamahata | uint32_t addr, uint32_t val, int len)
|
410 | 0428527c | Isaku Yamahata | { |
411 | 0428527c | Isaku Yamahata | uint8_t *devctl = dev->config + dev->exp.exp_cap + PCI_EXP_DEVCTL; |
412 | 0428527c | Isaku Yamahata | if (pci_word_test_and_clear_mask(devctl, PCI_EXP_DEVCTL_BCR_FLR)) {
|
413 | 0428527c | Isaku Yamahata | /* TODO: implement FLR */
|
414 | 0428527c | Isaku Yamahata | } |
415 | 0428527c | Isaku Yamahata | } |
416 | 0428527c | Isaku Yamahata | |
417 | 0428527c | Isaku Yamahata | /* Alternative Routing-ID Interpretation (ARI) */
|
418 | 0428527c | Isaku Yamahata | /* ari forwarding support for down stream port */
|
419 | 0428527c | Isaku Yamahata | void pcie_cap_ari_init(PCIDevice *dev)
|
420 | 0428527c | Isaku Yamahata | { |
421 | 0428527c | Isaku Yamahata | uint32_t pos = dev->exp.exp_cap; |
422 | 0428527c | Isaku Yamahata | pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_DEVCAP2, |
423 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCAP2_ARI); |
424 | 0428527c | Isaku Yamahata | pci_long_test_and_set_mask(dev->wmask + pos + PCI_EXP_DEVCTL2, |
425 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCTL2_ARI); |
426 | 0428527c | Isaku Yamahata | } |
427 | 0428527c | Isaku Yamahata | |
428 | 0428527c | Isaku Yamahata | void pcie_cap_ari_reset(PCIDevice *dev)
|
429 | 0428527c | Isaku Yamahata | { |
430 | 0428527c | Isaku Yamahata | uint8_t *devctl2 = dev->config + dev->exp.exp_cap + PCI_EXP_DEVCTL2; |
431 | 0428527c | Isaku Yamahata | pci_long_test_and_clear_mask(devctl2, PCI_EXP_DEVCTL2_ARI); |
432 | 0428527c | Isaku Yamahata | } |
433 | 0428527c | Isaku Yamahata | |
434 | 0428527c | Isaku Yamahata | bool pcie_cap_is_ari_enabled(const PCIDevice *dev) |
435 | 0428527c | Isaku Yamahata | { |
436 | 0428527c | Isaku Yamahata | if (!pci_is_express(dev)) {
|
437 | 0428527c | Isaku Yamahata | return false; |
438 | 0428527c | Isaku Yamahata | } |
439 | 0428527c | Isaku Yamahata | if (!dev->exp.exp_cap) {
|
440 | 0428527c | Isaku Yamahata | return false; |
441 | 0428527c | Isaku Yamahata | } |
442 | 0428527c | Isaku Yamahata | |
443 | 0428527c | Isaku Yamahata | return pci_get_long(dev->config + dev->exp.exp_cap + PCI_EXP_DEVCTL2) &
|
444 | 0428527c | Isaku Yamahata | PCI_EXP_DEVCTL2_ARI; |
445 | 0428527c | Isaku Yamahata | } |
446 | 0428527c | Isaku Yamahata | |
447 | 0428527c | Isaku Yamahata | /**************************************************************************
|
448 | 0428527c | Isaku Yamahata | * pci express extended capability allocation functions
|
449 | 0428527c | Isaku Yamahata | * uint16_t ext_cap_id (16 bit)
|
450 | 0428527c | Isaku Yamahata | * uint8_t cap_ver (4 bit)
|
451 | 0428527c | Isaku Yamahata | * uint16_t cap_offset (12 bit)
|
452 | 0428527c | Isaku Yamahata | * uint16_t ext_cap_size
|
453 | 0428527c | Isaku Yamahata | */
|
454 | 0428527c | Isaku Yamahata | |
455 | 0428527c | Isaku Yamahata | static uint16_t pcie_find_capability_list(PCIDevice *dev, uint16_t cap_id,
|
456 | 0428527c | Isaku Yamahata | uint16_t *prev_p) |
457 | 0428527c | Isaku Yamahata | { |
458 | 0428527c | Isaku Yamahata | uint16_t prev = 0;
|
459 | 0428527c | Isaku Yamahata | uint16_t next; |
460 | 0428527c | Isaku Yamahata | uint32_t header = pci_get_long(dev->config + PCI_CONFIG_SPACE_SIZE); |
461 | 0428527c | Isaku Yamahata | |
462 | 0428527c | Isaku Yamahata | if (!header) {
|
463 | 0428527c | Isaku Yamahata | /* no extended capability */
|
464 | 0428527c | Isaku Yamahata | next = 0;
|
465 | 0428527c | Isaku Yamahata | goto out;
|
466 | 0428527c | Isaku Yamahata | } |
467 | 0428527c | Isaku Yamahata | for (next = PCI_CONFIG_SPACE_SIZE; next;
|
468 | 0428527c | Isaku Yamahata | prev = next, next = PCI_EXT_CAP_NEXT(header)) { |
469 | 0428527c | Isaku Yamahata | |
470 | 0428527c | Isaku Yamahata | assert(next >= PCI_CONFIG_SPACE_SIZE); |
471 | 0428527c | Isaku Yamahata | assert(next <= PCIE_CONFIG_SPACE_SIZE - 8);
|
472 | 0428527c | Isaku Yamahata | |
473 | 0428527c | Isaku Yamahata | header = pci_get_long(dev->config + next); |
474 | 0428527c | Isaku Yamahata | if (PCI_EXT_CAP_ID(header) == cap_id) {
|
475 | 0428527c | Isaku Yamahata | break;
|
476 | 0428527c | Isaku Yamahata | } |
477 | 0428527c | Isaku Yamahata | } |
478 | 0428527c | Isaku Yamahata | |
479 | 0428527c | Isaku Yamahata | out:
|
480 | 0428527c | Isaku Yamahata | if (prev_p) {
|
481 | 0428527c | Isaku Yamahata | *prev_p = prev; |
482 | 0428527c | Isaku Yamahata | } |
483 | 0428527c | Isaku Yamahata | return next;
|
484 | 0428527c | Isaku Yamahata | } |
485 | 0428527c | Isaku Yamahata | |
486 | 0428527c | Isaku Yamahata | uint16_t pcie_find_capability(PCIDevice *dev, uint16_t cap_id) |
487 | 0428527c | Isaku Yamahata | { |
488 | 0428527c | Isaku Yamahata | return pcie_find_capability_list(dev, cap_id, NULL); |
489 | 0428527c | Isaku Yamahata | } |
490 | 0428527c | Isaku Yamahata | |
491 | 0428527c | Isaku Yamahata | static void pcie_ext_cap_set_next(PCIDevice *dev, uint16_t pos, uint16_t next) |
492 | 0428527c | Isaku Yamahata | { |
493 | 0428527c | Isaku Yamahata | uint16_t header = pci_get_long(dev->config + pos); |
494 | 0428527c | Isaku Yamahata | assert(!(next & (PCI_EXT_CAP_ALIGN - 1)));
|
495 | 0428527c | Isaku Yamahata | header = (header & ~PCI_EXT_CAP_NEXT_MASK) | |
496 | 0428527c | Isaku Yamahata | ((next << PCI_EXT_CAP_NEXT_SHIFT) & PCI_EXT_CAP_NEXT_MASK); |
497 | 0428527c | Isaku Yamahata | pci_set_long(dev->config + pos, header); |
498 | 0428527c | Isaku Yamahata | } |
499 | 0428527c | Isaku Yamahata | |
500 | 0428527c | Isaku Yamahata | /*
|
501 | 0428527c | Isaku Yamahata | * caller must supply valid (offset, size) * such that the range shouldn't
|
502 | 0428527c | Isaku Yamahata | * overlap with other capability or other registers.
|
503 | 0428527c | Isaku Yamahata | * This function doesn't check it.
|
504 | 0428527c | Isaku Yamahata | */
|
505 | 0428527c | Isaku Yamahata | void pcie_add_capability(PCIDevice *dev,
|
506 | 0428527c | Isaku Yamahata | uint16_t cap_id, uint8_t cap_ver, |
507 | 0428527c | Isaku Yamahata | uint16_t offset, uint16_t size) |
508 | 0428527c | Isaku Yamahata | { |
509 | 0428527c | Isaku Yamahata | uint32_t header; |
510 | 0428527c | Isaku Yamahata | uint16_t next; |
511 | 0428527c | Isaku Yamahata | |
512 | 0428527c | Isaku Yamahata | assert(offset >= PCI_CONFIG_SPACE_SIZE); |
513 | 0428527c | Isaku Yamahata | assert(offset < offset + size); |
514 | 0428527c | Isaku Yamahata | assert(offset + size < PCIE_CONFIG_SPACE_SIZE); |
515 | 0428527c | Isaku Yamahata | assert(size >= 8);
|
516 | 0428527c | Isaku Yamahata | assert(pci_is_express(dev)); |
517 | 0428527c | Isaku Yamahata | |
518 | 0428527c | Isaku Yamahata | if (offset == PCI_CONFIG_SPACE_SIZE) {
|
519 | 0428527c | Isaku Yamahata | header = pci_get_long(dev->config + offset); |
520 | 0428527c | Isaku Yamahata | next = PCI_EXT_CAP_NEXT(header); |
521 | 0428527c | Isaku Yamahata | } else {
|
522 | 0428527c | Isaku Yamahata | uint16_t prev; |
523 | 0428527c | Isaku Yamahata | |
524 | 0428527c | Isaku Yamahata | /* 0 is reserved cap id. use internally to find the last capability
|
525 | 0428527c | Isaku Yamahata | in the linked list */
|
526 | 0428527c | Isaku Yamahata | next = pcie_find_capability_list(dev, 0, &prev);
|
527 | 0428527c | Isaku Yamahata | |
528 | 0428527c | Isaku Yamahata | assert(prev >= PCI_CONFIG_SPACE_SIZE); |
529 | 0428527c | Isaku Yamahata | assert(next == 0);
|
530 | 0428527c | Isaku Yamahata | pcie_ext_cap_set_next(dev, prev, offset); |
531 | 0428527c | Isaku Yamahata | } |
532 | 0428527c | Isaku Yamahata | pci_set_long(dev->config + offset, PCI_EXT_CAP(cap_id, cap_ver, next)); |
533 | 0428527c | Isaku Yamahata | |
534 | 0428527c | Isaku Yamahata | /* Make capability read-only by default */
|
535 | 0428527c | Isaku Yamahata | memset(dev->wmask + offset, 0, size);
|
536 | 0428527c | Isaku Yamahata | memset(dev->w1cmask + offset, 0, size);
|
537 | 0428527c | Isaku Yamahata | /* Check capability by default */
|
538 | 0428527c | Isaku Yamahata | memset(dev->cmask + offset, 0xFF, size);
|
539 | 0428527c | Isaku Yamahata | } |
540 | 0428527c | Isaku Yamahata | |
541 | 0428527c | Isaku Yamahata | /**************************************************************************
|
542 | 0428527c | Isaku Yamahata | * pci express extended capability helper functions
|
543 | 0428527c | Isaku Yamahata | */
|
544 | 0428527c | Isaku Yamahata | |
545 | 0428527c | Isaku Yamahata | /* ARI */
|
546 | 0428527c | Isaku Yamahata | void pcie_ari_init(PCIDevice *dev, uint16_t offset, uint16_t nextfn)
|
547 | 0428527c | Isaku Yamahata | { |
548 | 0428527c | Isaku Yamahata | pcie_add_capability(dev, PCI_EXT_CAP_ID_ARI, PCI_ARI_VER, |
549 | 0428527c | Isaku Yamahata | offset, PCI_ARI_SIZEOF); |
550 | 0428527c | Isaku Yamahata | pci_set_long(dev->config + offset + PCI_ARI_CAP, PCI_ARI_CAP_NFN(nextfn)); |
551 | 0428527c | Isaku Yamahata | } |