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# Date Author Comment
e7786f27 02/07/2009 05:18 pm aurel32

SH4: fix TMU init

Init the TMU and the ptimer with the correct cpu reset value

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6549 c046a42c-6fe2-441c-8c8c-71466251a162
5c16736a 12/07/2008 09:39 pm balrog

SH4: Eliminate P4 to A7 mangling (Takashi YOSHII).

Main purpose of this is to delete
*physical = address & 0x1fffffff;
at target-sh4/helper.c:449, using new mmio rule introduced by #5849
This masking is a nice trick to realize P4/A7 duality of SH registers....
8da3ff18 12/01/2008 08:59 pm pbrook

Change MMIO callbacks to use offsets, not absolute addresses.

Signed-off-by: Paul Brook <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5849 c046a42c-6fe2-441c-8c8c-71466251a162
96e2fc41 11/21/2008 11:06 pm aurel32

SH4: Use qemu_irq in timer emulation.

  • hw/sh.h (tmu012_init): Accept qemu_irq, not intc_source.
  • hw/sh7750.c (sh7750_init): Pass qemu_irq to tmu012_init.
  • hw/sh_intc.c (sh_intc_set_irq): New.
    (sh_intc_init): Allocate irqs....
703243a0 12/12/2007 03:11 am balrog

Adds interrupt support to the sh specific timer code (Magnus Damm).

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3812 c046a42c-6fe2-441c-8c8c-71466251a162
9596ebb7 11/18/2007 03:44 am pbrook

Add statics and missing #includes for prototypes.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3683 c046a42c-6fe2-441c-8c8c-71466251a162
87ecb68b 11/17/2007 07:14 pm pbrook

Break up vl.h.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
cd1a3f68 09/29/2007 10:40 pm ths

Stand-alone TMU emulation code, by Magnus Damm.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3269 c046a42c-6fe2-441c-8c8c-71466251a162