Revision ae027ad3 hw/ide/pci.c
| b/hw/ide/pci.c | ||
|---|---|---|
| 443 | 443 |
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| 444 | 444 |
/* hd_table must contain 4 block drivers */ |
| 445 | 445 |
/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */ |
| 446 |
void pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn, |
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qemu_irq *pic) |
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void pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn) |
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{
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PCIIDEState *d; |
| 450 | 449 |
uint8_t *pci_conf; |
| ... | ... | |
| 479 | 478 |
|
| 480 | 479 |
/* hd_table must contain 4 block drivers */ |
| 481 | 480 |
/* NOTE: for the PIIX4, the IRQs and IOports are hardcoded */ |
| 482 |
void pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn, |
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qemu_irq *pic) |
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void pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn) |
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| 484 | 482 |
{
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| 485 | 483 |
PCIIDEState *d; |
| 486 | 484 |
uint8_t *pci_conf; |
| ... | ... | |
| 505 | 503 |
pci_register_bar((PCIDevice *)d, 4, 0x10, |
| 506 | 504 |
PCI_ADDRESS_SPACE_IO, bmdma_map); |
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/* |
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* These should call isa_reserve_irq() instead when MIPS supports it |
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*/ |
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ide_init2(&d->bus[0], hd_table[0], hd_table[1], pic[14]); |
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ide_init2(&d->bus[1], hd_table[2], hd_table[3], pic[15]); |
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ide_init2(&d->bus[0], hd_table[0], hd_table[1], isa_reserve_irq(14)); |
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ide_init2(&d->bus[1], hd_table[2], hd_table[3], isa_reserve_irq(15)); |
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| 513 | 508 |
ide_init_ioport(&d->bus[0], 0x1f0, 0x3f6); |
| 514 | 509 |
ide_init_ioport(&d->bus[1], 0x170, 0x376); |
| 515 | 510 |
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