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root / target-ppc @ ae0bfb79

Name Size
STATUS 10.6 kB
cpu.h 68.4 kB
exec.h 1.6 kB
helper.c 92.4 kB
helper.h 14.4 kB
helper_regs.h 3.3 kB
kvm.c 9.3 kB
kvm_ppc.c 2.6 kB
kvm_ppc.h 803 Bytes
machine.c 5.6 kB
mfrom_table.c 3.3 kB
mfrom_table_gen.c 652 Bytes
op_helper.c 125.8 kB
translate.c 334.8 kB
translate_init.c 414.5 kB

Latest revisions

# Date Author Comment
ae0bfb79 10/13/2010 09:38 pm Blue Swirl

ppc: remove video.x

Only Mac-on-Linux stuff used video.x, OpenBIOS does not need it.

Remove video.x MoL hacks.

Signed-off-by: Alexander Graf <>
Signed-off-by: Blue Swirl <>

999fa40e 10/05/2010 07:38 pm John Clark

ppc: Minor 40x MMU fixes

  • Fix swapped reading of tlblo/hi.
  • Fix tlb exec permissions

Signed-off-by: John Clark <>
Signed-off-by: Alexander Graf <>
Signed-off-by: Edgar E. Iglesias <>

2c50e26e 09/30/2010 07:53 pm Edgar E. Iglesias

powerpc: Add a virtex5 ml507 refdesign board

Signed-off-by: Edgar E. Iglesias <>
Signed-off-by: Alexander Graf <>

95070372 09/30/2010 07:53 pm Edgar E. Iglesias

powerpc: Add a ppc-440x5 Xilinx model

Add a powerpc 440x5 with the model ID on the Xilinx virtex5.
Connect the 440x5 to the 40x interrupt logic.

Signed-off-by: Edgar E. Iglesias <>
Signed-off-by: Alexander Graf <>

a586e548 09/24/2010 11:01 pm Edgar E. Iglesias

powerpc: Improve emulation of the BookE MMU

Improve the emulation of the BookE MMU to be able to boot linux
on virtex5 boards.

Signed-off-by: Edgar E. Iglesias <>

d62d2863 09/18/2010 08:53 am Blue Swirl

PPC: Suppress gcc warnings with -Wtype-limits

The hack added by c5b76b381081680633e2e0a91216507430409fb2 was not
enough to avoid warnings with gcc flag -Wtype-limits. Add a new macro
to fix both problems.

Signed-off-by: Blue Swirl <>

41557447 09/15/2010 05:18 pm Alexander Graf

PPC: Redesign interrupt trigger path

According to the Book3S spec, the interrupt context starts with an MSR
value that is rather simple. If we leave out the HV case, it's almost
always 0.

To reflect this, let's redesign the way that MSR value gets calculated....

f844c817 09/15/2010 05:18 pm Alexander Graf

PPC: Enable hint bits for lwarx/ldarx

The lwarx and ldarx instructions have a bit to give some hint to the
CPU which is safe to ignore. We currently refuse to accept any instruction
with that bit set, as it used to be declared MBZ.

Let's remove the reserved bit and make the instruction work as expected....

24e0e38b 09/11/2010 03:29 pm Edgar E. Iglesias

powerpc: Avoid TLB related log spamming

Invalid TLB entries are normal and should not spam the log.

Signed-off-by: Edgar E. Iglesias <>

fc87e185 09/05/2010 12:50 pm Alexander Graf

KVM: PPC: Add level based interrupt logic

KVM on PowerPC used to have completely broken interrupt logic. Usually,
interrupts work by having a PIC that pulls a line up/down, so the CPU knows
that an interrupt is active. This line stays active until some action is...

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