Revision ae8ecd42
| b/target-alpha/helper.h | ||
|---|---|---|
| 3 | 3 |
#endif |
| 4 | 4 |
|
| 5 | 5 |
DEF_HELPER(void, helper_tb_flush, (void)) |
| 6 |
|
|
| 7 |
DEF_HELPER(uint64_t, helper_amask, (uint64_t)) |
|
| 8 |
|
|
| 9 |
DEF_HELPER(uint64_t, helper_ctpop, (uint64_t)) |
|
| 10 |
DEF_HELPER(uint64_t, helper_ctlz, (uint64_t)) |
|
| 11 |
DEF_HELPER(uint64_t, helper_cttz, (uint64_t)) |
|
| b/target-alpha/op.c | ||
|---|---|---|
| 155 | 155 |
RETURN(); |
| 156 | 156 |
} |
| 157 | 157 |
|
| 158 |
void OPPROTO op_load_amask (void) |
|
| 159 |
{
|
|
| 160 |
helper_amask(); |
|
| 161 |
RETURN(); |
|
| 162 |
} |
|
| 163 |
|
|
| 164 | 158 |
void OPPROTO op_load_pcc (void) |
| 165 | 159 |
{
|
| 166 | 160 |
helper_load_pcc(); |
| ... | ... | |
| 340 | 334 |
RETURN(); |
| 341 | 335 |
} |
| 342 | 336 |
|
| 343 |
void OPPROTO op_sextb (void) |
|
| 344 |
{
|
|
| 345 |
T0 = (int64_t)((int8_t)T0); |
|
| 346 |
RETURN(); |
|
| 347 |
} |
|
| 348 |
|
|
| 349 |
void OPPROTO op_sextw (void) |
|
| 350 |
{
|
|
| 351 |
T0 = (int64_t)((int16_t)T0); |
|
| 352 |
RETURN(); |
|
| 353 |
|
|
| 354 |
} |
|
| 355 |
|
|
| 356 |
void OPPROTO op_ctpop (void) |
|
| 357 |
{
|
|
| 358 |
helper_ctpop(); |
|
| 359 |
RETURN(); |
|
| 360 |
} |
|
| 361 |
|
|
| 362 |
void OPPROTO op_ctlz (void) |
|
| 363 |
{
|
|
| 364 |
helper_ctlz(); |
|
| 365 |
RETURN(); |
|
| 366 |
} |
|
| 367 |
|
|
| 368 |
void OPPROTO op_cttz (void) |
|
| 369 |
{
|
|
| 370 |
helper_cttz(); |
|
| 371 |
RETURN(); |
|
| 372 |
} |
|
| 373 |
|
|
| 374 | 337 |
void OPPROTO op_mskbl (void) |
| 375 | 338 |
{
|
| 376 | 339 |
helper_mskbl(); |
| b/target-alpha/op_helper.c | ||
|---|---|---|
| 65 | 65 |
cpu_loop_exit(); |
| 66 | 66 |
} |
| 67 | 67 |
|
| 68 |
void helper_amask (void)
|
|
| 68 |
uint64_t helper_amask (uint64_t arg)
|
|
| 69 | 69 |
{
|
| 70 | 70 |
switch (env->implver) {
|
| 71 | 71 |
case IMPLVER_2106x: |
| ... | ... | |
| 74 | 74 |
case IMPLVER_21164: |
| 75 | 75 |
case IMPLVER_21264: |
| 76 | 76 |
case IMPLVER_21364: |
| 77 |
T0 &= ~env->amask;
|
|
| 77 |
arg &= ~env->amask;
|
|
| 78 | 78 |
break; |
| 79 | 79 |
} |
| 80 |
return arg; |
|
| 80 | 81 |
} |
| 81 | 82 |
|
| 82 | 83 |
void helper_load_pcc (void) |
| ... | ... | |
| 210 | 211 |
T0 = tl; |
| 211 | 212 |
} |
| 212 | 213 |
|
| 213 |
void helper_ctpop (void)
|
|
| 214 |
uint64_t helper_ctpop (uint64_t arg)
|
|
| 214 | 215 |
{
|
| 215 |
T0 = ctpop64(T0);
|
|
| 216 |
return ctpop64(arg);
|
|
| 216 | 217 |
} |
| 217 | 218 |
|
| 218 |
void helper_ctlz (void)
|
|
| 219 |
uint64_t helper_ctlz (uint64_t arg)
|
|
| 219 | 220 |
{
|
| 220 |
T0 = clz64(T0);
|
|
| 221 |
return clz64(arg);
|
|
| 221 | 222 |
} |
| 222 | 223 |
|
| 223 |
void helper_cttz (void)
|
|
| 224 |
uint64_t helper_cttz (uint64_t arg)
|
|
| 224 | 225 |
{
|
| 225 |
T0 = ctz64(T0);
|
|
| 226 |
return ctz64(arg);
|
|
| 226 | 227 |
} |
| 227 | 228 |
|
| 228 | 229 |
static always_inline uint64_t byte_zap (uint64_t op, uint8_t mskb) |
| b/target-alpha/op_helper.h | ||
|---|---|---|
| 20 | 20 |
|
| 21 | 21 |
void helper_call_pal (uint32_t palcode); |
| 22 | 22 |
void helper_excp (uint32_t excp, uint32_t error); |
| 23 |
void helper_amask (void); |
|
| 24 | 23 |
void helper_load_pcc (void); |
| 25 | 24 |
void helper_load_implver (void); |
| 26 | 25 |
void helper_load_fpcr (void); |
| ... | ... | |
| 34 | 33 |
void helper_sublv (void); |
| 35 | 34 |
void helper_mullv (void); |
| 36 | 35 |
void helper_mulqv (void); |
| 37 |
void helper_ctpop (void); |
|
| 38 |
void helper_ctlz (void); |
|
| 39 |
void helper_cttz (void); |
|
| 40 | 36 |
void helper_mskbl (void); |
| 41 | 37 |
void helper_extbl (void); |
| 42 | 38 |
void helper_insbl (void); |
| b/target-alpha/translate.c | ||
|---|---|---|
| 25 | 25 |
#include "cpu.h" |
| 26 | 26 |
#include "exec-all.h" |
| 27 | 27 |
#include "disas.h" |
| 28 |
#include "host-utils.h" |
|
| 28 | 29 |
#include "helper.h" |
| 29 | 30 |
#include "tcg-op.h" |
| 30 | 31 |
#include "qemu-common.h" |
| ... | ... | |
| 349 | 350 |
_gen_op_bcond(ctx); |
| 350 | 351 |
} |
| 351 | 352 |
|
| 352 |
static always_inline void gen_arith2 (DisasContext *ctx, |
|
| 353 |
void (*gen_arith_op)(void), |
|
| 354 |
int rb, int rc, int islit, uint8_t lit) |
|
| 355 |
{
|
|
| 356 |
if (islit) |
|
| 357 |
tcg_gen_movi_i64(cpu_T[0], lit); |
|
| 358 |
else if (rb != 31) |
|
| 359 |
tcg_gen_mov_i64(cpu_T[0], cpu_ir[rb]); |
|
| 360 |
else |
|
| 361 |
tcg_gen_movi_i64(cpu_T[0], 0); |
|
| 362 |
(*gen_arith_op)(); |
|
| 363 |
if (rc != 31) |
|
| 364 |
tcg_gen_mov_i64(cpu_ir[rc], cpu_T[0]); |
|
| 365 |
} |
|
| 366 |
|
|
| 367 | 353 |
static always_inline void gen_arith3 (DisasContext *ctx, |
| 368 | 354 |
void (*gen_arith_op)(void), |
| 369 | 355 |
int ra, int rb, int rc, |
| ... | ... | |
| 502 | 488 |
tcg_gen_sub_i64(cpu_T[0], cpu_T[0], cpu_T[1]); |
| 503 | 489 |
} |
| 504 | 490 |
|
| 505 |
static always_inline void gen_amask (void) |
|
| 506 |
{
|
|
| 507 |
gen_op_load_amask(); |
|
| 508 |
gen_op_bic(); |
|
| 509 |
} |
|
| 510 |
|
|
| 511 | 491 |
static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
| 512 | 492 |
{
|
| 513 | 493 |
uint32_t palcode; |
| ... | ... | |
| 793 | 773 |
break; |
| 794 | 774 |
case 0x61: |
| 795 | 775 |
/* AMASK */ |
| 796 |
gen_arith2(ctx, &gen_amask, rb, rc, islit, lit); |
|
| 776 |
if (likely(rc != 31)) {
|
|
| 777 |
if (islit) |
|
| 778 |
tcg_gen_movi_i64(cpu_ir[rc], helper_amask(lit)); |
|
| 779 |
else if (rb != 31) |
|
| 780 |
tcg_gen_helper_1_1(helper_amask, cpu_ir[rc], cpu_ir[rb]); |
|
| 781 |
else |
|
| 782 |
tcg_gen_movi_i64(cpu_ir[rc], 0); |
|
| 783 |
} |
|
| 797 | 784 |
break; |
| 798 | 785 |
case 0x64: |
| 799 | 786 |
/* CMOVLE */ |
| ... | ... | |
| 1446 | 1433 |
/* SEXTB */ |
| 1447 | 1434 |
if (!(ctx->amask & AMASK_BWX)) |
| 1448 | 1435 |
goto invalid_opc; |
| 1449 |
gen_arith2(ctx, &gen_op_sextb, rb, rc, islit, lit); |
|
| 1436 |
if (likely(rc != 31)) {
|
|
| 1437 |
if (islit) |
|
| 1438 |
tcg_gen_movi_i64(cpu_ir[rc], (int64_t)((int8_t)lit)); |
|
| 1439 |
else if (rb != 31) |
|
| 1440 |
tcg_gen_ext8s_i64(cpu_ir[rc], cpu_ir[rb]); |
|
| 1441 |
else |
|
| 1442 |
tcg_gen_movi_i64(cpu_ir[rc], 0); |
|
| 1443 |
} |
|
| 1450 | 1444 |
break; |
| 1451 | 1445 |
case 0x01: |
| 1452 | 1446 |
/* SEXTW */ |
| 1453 | 1447 |
if (!(ctx->amask & AMASK_BWX)) |
| 1454 | 1448 |
goto invalid_opc; |
| 1455 |
gen_arith2(ctx, &gen_op_sextw, rb, rc, islit, lit); |
|
| 1449 |
if (likely(rc != 31)) {
|
|
| 1450 |
if (islit) |
|
| 1451 |
tcg_gen_movi_i64(cpu_ir[rc], (int64_t)((int16_t)lit)); |
|
| 1452 |
else if (rb != 31) |
|
| 1453 |
tcg_gen_ext16s_i64(cpu_ir[rc], cpu_ir[rb]); |
|
| 1454 |
else |
|
| 1455 |
tcg_gen_movi_i64(cpu_ir[rc], 0); |
|
| 1456 |
} |
|
| 1456 | 1457 |
break; |
| 1457 | 1458 |
case 0x30: |
| 1458 | 1459 |
/* CTPOP */ |
| 1459 | 1460 |
if (!(ctx->amask & AMASK_CIX)) |
| 1460 | 1461 |
goto invalid_opc; |
| 1461 |
gen_arith2(ctx, &gen_op_ctpop, rb, rc, 0, 0); |
|
| 1462 |
if (likely(rc != 31)) {
|
|
| 1463 |
if (islit) |
|
| 1464 |
tcg_gen_movi_i64(cpu_ir[rc], ctpop64(lit)); |
|
| 1465 |
else if (rb != 31) |
|
| 1466 |
tcg_gen_helper_1_1(helper_ctpop, cpu_ir[rc], cpu_ir[rb]); |
|
| 1467 |
else |
|
| 1468 |
tcg_gen_movi_i64(cpu_ir[rc], 0); |
|
| 1469 |
} |
|
| 1462 | 1470 |
break; |
| 1463 | 1471 |
case 0x31: |
| 1464 | 1472 |
/* PERR */ |
| ... | ... | |
| 1471 | 1479 |
/* CTLZ */ |
| 1472 | 1480 |
if (!(ctx->amask & AMASK_CIX)) |
| 1473 | 1481 |
goto invalid_opc; |
| 1474 |
gen_arith2(ctx, &gen_op_ctlz, rb, rc, 0, 0); |
|
| 1482 |
if (likely(rc != 31)) {
|
|
| 1483 |
if (islit) |
|
| 1484 |
tcg_gen_movi_i64(cpu_ir[rc], clz64(lit)); |
|
| 1485 |
else if (rb != 31) |
|
| 1486 |
tcg_gen_helper_1_1(helper_ctlz, cpu_ir[rc], cpu_ir[rb]); |
|
| 1487 |
else |
|
| 1488 |
tcg_gen_movi_i64(cpu_ir[rc], 0); |
|
| 1489 |
} |
|
| 1475 | 1490 |
break; |
| 1476 | 1491 |
case 0x33: |
| 1477 | 1492 |
/* CTTZ */ |
| 1478 | 1493 |
if (!(ctx->amask & AMASK_CIX)) |
| 1479 | 1494 |
goto invalid_opc; |
| 1480 |
gen_arith2(ctx, &gen_op_cttz, rb, rc, 0, 0); |
|
| 1495 |
if (likely(rc != 31)) {
|
|
| 1496 |
if (islit) |
|
| 1497 |
tcg_gen_movi_i64(cpu_ir[rc], ctz64(lit)); |
|
| 1498 |
else if (rb != 31) |
|
| 1499 |
tcg_gen_helper_1_1(helper_cttz, cpu_ir[rc], cpu_ir[rb]); |
|
| 1500 |
else |
|
| 1501 |
tcg_gen_movi_i64(cpu_ir[rc], 0); |
|
| 1502 |
} |
|
| 1481 | 1503 |
break; |
| 1482 | 1504 |
case 0x34: |
| 1483 | 1505 |
/* UNPKBW */ |
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