Revision afcea8cb
b/Makefile | ||
---|---|---|
74 | 74 |
obj-y = $(block-obj-y) |
75 | 75 |
obj-y += readline.o console.o |
76 | 76 |
|
77 |
obj-y += irq.o ptimer.o |
|
77 |
obj-y += irq.o ptimer.o ioport.o
|
|
78 | 78 |
obj-y += i2c.o smbus.o smbus_eeprom.o max7310.o max111x.o wm8750.o |
79 | 79 |
obj-y += ssd0303.o ssd0323.o ads7846.o stellaris_input.o twl92230.o |
80 | 80 |
obj-y += tmp105.o lm832x.o eeprom93xx.o tsc2005.o |
b/Makefile.target | ||
---|---|---|
156 | 156 |
ifdef CONFIG_SOFTMMU |
157 | 157 |
|
158 | 158 |
obj-y = vl.o monitor.o pci.o isa_mmio.o machine.o \ |
159 |
gdbstub.o gdbstub-xml.o ioport.o
|
|
159 |
gdbstub.o gdbstub-xml.o |
|
160 | 160 |
# virtio has to be here due to weird dependency between PCI and virtio-net. |
161 | 161 |
# need to fix this properly |
162 | 162 |
obj-y += virtio-blk.o virtio-balloon.o virtio-net.o virtio-console.o virtio-pci.o |
b/hw/apb_pci.c | ||
---|---|---|
151 | 151 |
static void pci_apb_iowriteb (void *opaque, target_phys_addr_t addr, |
152 | 152 |
uint32_t val) |
153 | 153 |
{ |
154 |
cpu_outb(NULL, addr & IOPORTS_MASK, val);
|
|
154 |
cpu_outb(addr & IOPORTS_MASK, val); |
|
155 | 155 |
} |
156 | 156 |
|
157 | 157 |
static void pci_apb_iowritew (void *opaque, target_phys_addr_t addr, |
158 | 158 |
uint32_t val) |
159 | 159 |
{ |
160 |
cpu_outw(NULL, addr & IOPORTS_MASK, val);
|
|
160 |
cpu_outw(addr & IOPORTS_MASK, val); |
|
161 | 161 |
} |
162 | 162 |
|
163 | 163 |
static void pci_apb_iowritel (void *opaque, target_phys_addr_t addr, |
164 | 164 |
uint32_t val) |
165 | 165 |
{ |
166 |
cpu_outl(NULL, addr & IOPORTS_MASK, val);
|
|
166 |
cpu_outl(addr & IOPORTS_MASK, val); |
|
167 | 167 |
} |
168 | 168 |
|
169 | 169 |
static uint32_t pci_apb_ioreadb (void *opaque, target_phys_addr_t addr) |
170 | 170 |
{ |
171 | 171 |
uint32_t val; |
172 | 172 |
|
173 |
val = cpu_inb(NULL, addr & IOPORTS_MASK);
|
|
173 |
val = cpu_inb(addr & IOPORTS_MASK); |
|
174 | 174 |
return val; |
175 | 175 |
} |
176 | 176 |
|
... | ... | |
178 | 178 |
{ |
179 | 179 |
uint32_t val; |
180 | 180 |
|
181 |
val = cpu_inw(NULL, addr & IOPORTS_MASK);
|
|
181 |
val = cpu_inw(addr & IOPORTS_MASK); |
|
182 | 182 |
return val; |
183 | 183 |
} |
184 | 184 |
|
... | ... | |
186 | 186 |
{ |
187 | 187 |
uint32_t val; |
188 | 188 |
|
189 |
val = cpu_inl(NULL, addr & IOPORTS_MASK);
|
|
189 |
val = cpu_inl(addr & IOPORTS_MASK); |
|
190 | 190 |
return val; |
191 | 191 |
} |
192 | 192 |
|
b/hw/isa_mmio.c | ||
---|---|---|
28 | 28 |
static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr, |
29 | 29 |
uint32_t val) |
30 | 30 |
{ |
31 |
cpu_outb(NULL, addr & IOPORTS_MASK, val);
|
|
31 |
cpu_outb(addr & IOPORTS_MASK, val); |
|
32 | 32 |
} |
33 | 33 |
|
34 | 34 |
static void isa_mmio_writew (void *opaque, target_phys_addr_t addr, |
... | ... | |
37 | 37 |
#ifdef TARGET_WORDS_BIGENDIAN |
38 | 38 |
val = bswap16(val); |
39 | 39 |
#endif |
40 |
cpu_outw(NULL, addr & IOPORTS_MASK, val);
|
|
40 |
cpu_outw(addr & IOPORTS_MASK, val); |
|
41 | 41 |
} |
42 | 42 |
|
43 | 43 |
static void isa_mmio_writel (void *opaque, target_phys_addr_t addr, |
... | ... | |
46 | 46 |
#ifdef TARGET_WORDS_BIGENDIAN |
47 | 47 |
val = bswap32(val); |
48 | 48 |
#endif |
49 |
cpu_outl(NULL, addr & IOPORTS_MASK, val);
|
|
49 |
cpu_outl(addr & IOPORTS_MASK, val); |
|
50 | 50 |
} |
51 | 51 |
|
52 | 52 |
static uint32_t isa_mmio_readb (void *opaque, target_phys_addr_t addr) |
53 | 53 |
{ |
54 | 54 |
uint32_t val; |
55 | 55 |
|
56 |
val = cpu_inb(NULL, addr & IOPORTS_MASK);
|
|
56 |
val = cpu_inb(addr & IOPORTS_MASK); |
|
57 | 57 |
return val; |
58 | 58 |
} |
59 | 59 |
|
... | ... | |
61 | 61 |
{ |
62 | 62 |
uint32_t val; |
63 | 63 |
|
64 |
val = cpu_inw(NULL, addr & IOPORTS_MASK);
|
|
64 |
val = cpu_inw(addr & IOPORTS_MASK); |
|
65 | 65 |
#ifdef TARGET_WORDS_BIGENDIAN |
66 | 66 |
val = bswap16(val); |
67 | 67 |
#endif |
... | ... | |
72 | 72 |
{ |
73 | 73 |
uint32_t val; |
74 | 74 |
|
75 |
val = cpu_inl(NULL, addr & IOPORTS_MASK);
|
|
75 |
val = cpu_inl(addr & IOPORTS_MASK); |
|
76 | 76 |
#ifdef TARGET_WORDS_BIGENDIAN |
77 | 77 |
val = bswap32(val); |
78 | 78 |
#endif |
b/hw/mips_jazz.c | ||
---|---|---|
49 | 49 |
|
50 | 50 |
static uint32_t rtc_readb(void *opaque, target_phys_addr_t addr) |
51 | 51 |
{ |
52 |
CPUState *env = opaque; |
|
53 |
return cpu_inw(env, 0x71); |
|
52 |
return cpu_inw(0x71); |
|
54 | 53 |
} |
55 | 54 |
|
56 | 55 |
static void rtc_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) |
57 | 56 |
{ |
58 |
CPUState *env = opaque; |
|
59 |
cpu_outw(env, 0x71, val & 0xff); |
|
57 |
cpu_outw(0x71, val & 0xff); |
|
60 | 58 |
} |
61 | 59 |
|
62 | 60 |
static CPUReadMemoryFunc * const rtc_read[3] = { |
... | ... | |
243 | 241 |
|
244 | 242 |
/* Real time clock */ |
245 | 243 |
rtc_init(1980); |
246 |
s_rtc = cpu_register_io_memory(rtc_read, rtc_write, env);
|
|
244 |
s_rtc = cpu_register_io_memory(rtc_read, rtc_write, NULL);
|
|
247 | 245 |
cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc); |
248 | 246 |
|
249 | 247 |
/* Keyboard (i8042) */ |
b/hw/ppc_prep.c | ||
---|---|---|
460 | 460 |
sysctrl_t *sysctrl = opaque; |
461 | 461 |
|
462 | 462 |
addr = prep_IO_address(sysctrl, addr); |
463 |
cpu_outb(NULL, addr, value);
|
|
463 |
cpu_outb(addr, value); |
|
464 | 464 |
} |
465 | 465 |
|
466 | 466 |
static uint32_t PPC_prep_io_readb (void *opaque, target_phys_addr_t addr) |
... | ... | |
469 | 469 |
uint32_t ret; |
470 | 470 |
|
471 | 471 |
addr = prep_IO_address(sysctrl, addr); |
472 |
ret = cpu_inb(NULL, addr);
|
|
472 |
ret = cpu_inb(addr); |
|
473 | 473 |
|
474 | 474 |
return ret; |
475 | 475 |
} |
... | ... | |
484 | 484 |
value = bswap16(value); |
485 | 485 |
#endif |
486 | 486 |
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", addr, value); |
487 |
cpu_outw(NULL, addr, value);
|
|
487 |
cpu_outw(addr, value); |
|
488 | 488 |
} |
489 | 489 |
|
490 | 490 |
static uint32_t PPC_prep_io_readw (void *opaque, target_phys_addr_t addr) |
... | ... | |
493 | 493 |
uint32_t ret; |
494 | 494 |
|
495 | 495 |
addr = prep_IO_address(sysctrl, addr); |
496 |
ret = cpu_inw(NULL, addr);
|
|
496 |
ret = cpu_inw(addr); |
|
497 | 497 |
#ifdef TARGET_WORDS_BIGENDIAN |
498 | 498 |
ret = bswap16(ret); |
499 | 499 |
#endif |
... | ... | |
512 | 512 |
value = bswap32(value); |
513 | 513 |
#endif |
514 | 514 |
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", addr, value); |
515 |
cpu_outl(NULL, addr, value);
|
|
515 |
cpu_outl(addr, value); |
|
516 | 516 |
} |
517 | 517 |
|
518 | 518 |
static uint32_t PPC_prep_io_readl (void *opaque, target_phys_addr_t addr) |
... | ... | |
521 | 521 |
uint32_t ret; |
522 | 522 |
|
523 | 523 |
addr = prep_IO_address(sysctrl, addr); |
524 |
ret = cpu_inl(NULL, addr);
|
|
524 |
ret = cpu_inl(addr); |
|
525 | 525 |
#ifdef TARGET_WORDS_BIGENDIAN |
526 | 526 |
ret = bswap32(ret); |
527 | 527 |
#endif |
b/hw/sh_pci.c | ||
---|---|---|
119 | 119 |
|
120 | 120 |
static void sh_pci_outb (void *p, target_phys_addr_t addr, uint32_t val) |
121 | 121 |
{ |
122 |
cpu_outb(NULL, sh_pci_addr2port(p, addr), val);
|
|
122 |
cpu_outb(sh_pci_addr2port(p, addr), val); |
|
123 | 123 |
} |
124 | 124 |
|
125 | 125 |
static void sh_pci_outw (void *p, target_phys_addr_t addr, uint32_t val) |
126 | 126 |
{ |
127 |
cpu_outw(NULL, sh_pci_addr2port(p, addr), val);
|
|
127 |
cpu_outw(sh_pci_addr2port(p, addr), val); |
|
128 | 128 |
} |
129 | 129 |
|
130 | 130 |
static void sh_pci_outl (void *p, target_phys_addr_t addr, uint32_t val) |
131 | 131 |
{ |
132 |
cpu_outl(NULL, sh_pci_addr2port(p, addr), val);
|
|
132 |
cpu_outl(sh_pci_addr2port(p, addr), val); |
|
133 | 133 |
} |
134 | 134 |
|
135 | 135 |
static uint32_t sh_pci_inb (void *p, target_phys_addr_t addr) |
136 | 136 |
{ |
137 |
return cpu_inb(NULL, sh_pci_addr2port(p, addr));
|
|
137 |
return cpu_inb(sh_pci_addr2port(p, addr)); |
|
138 | 138 |
} |
139 | 139 |
|
140 | 140 |
static uint32_t sh_pci_inw (void *p, target_phys_addr_t addr) |
141 | 141 |
{ |
142 |
return cpu_inw(NULL, sh_pci_addr2port(p, addr));
|
|
142 |
return cpu_inw(sh_pci_addr2port(p, addr)); |
|
143 | 143 |
} |
144 | 144 |
|
145 | 145 |
static uint32_t sh_pci_inl (void *p, target_phys_addr_t addr) |
146 | 146 |
{ |
147 |
return cpu_inl(NULL, sh_pci_addr2port(p, addr));
|
|
147 |
return cpu_inl(sh_pci_addr2port(p, addr)); |
|
148 | 148 |
} |
149 | 149 |
|
150 | 150 |
typedef struct { |
b/ioport-user.c | ||
---|---|---|
23 | 23 |
#include "qemu-common.h" |
24 | 24 |
#include "ioport.h" |
25 | 25 |
|
26 |
void cpu_outb(CPUState *env, pio_addr_t addr, uint8_t val)
|
|
26 |
void cpu_outb(pio_addr_t addr, uint8_t val) |
|
27 | 27 |
{ |
28 | 28 |
fprintf(stderr, "outb: port=0x%04"FMT_pioaddr", data=%02"PRIx8"\n", |
29 | 29 |
addr, val); |
30 | 30 |
} |
31 | 31 |
|
32 |
void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val)
|
|
32 |
void cpu_outw(pio_addr_t addr, uint16_t val) |
|
33 | 33 |
{ |
34 | 34 |
fprintf(stderr, "outw: port=0x%04"FMT_pioaddr", data=%04"PRIx16"\n", |
35 | 35 |
addr, val); |
36 | 36 |
} |
37 | 37 |
|
38 |
void cpu_outl(CPUState *env, pio_addr_t addr, uint32_t val)
|
|
38 |
void cpu_outl(pio_addr_t addr, uint32_t val) |
|
39 | 39 |
{ |
40 | 40 |
fprintf(stderr, "outl: port=0x%04"FMT_pioaddr", data=%08"PRIx32"\n", |
41 | 41 |
addr, val); |
42 | 42 |
} |
43 | 43 |
|
44 |
uint8_t cpu_inb(CPUState *env, pio_addr_t addr)
|
|
44 |
uint8_t cpu_inb(pio_addr_t addr) |
|
45 | 45 |
{ |
46 | 46 |
fprintf(stderr, "inb: port=0x%04"FMT_pioaddr"\n", addr); |
47 | 47 |
return 0; |
48 | 48 |
} |
49 | 49 |
|
50 |
uint16_t cpu_inw(CPUState *env, pio_addr_t addr)
|
|
50 |
uint16_t cpu_inw(pio_addr_t addr) |
|
51 | 51 |
{ |
52 | 52 |
fprintf(stderr, "inw: port=0x%04"FMT_pioaddr"\n", addr); |
53 | 53 |
return 0; |
54 | 54 |
} |
55 | 55 |
|
56 |
uint32_t cpu_inl(CPUState *env, pio_addr_t addr)
|
|
56 |
uint32_t cpu_inl(pio_addr_t addr) |
|
57 | 57 |
{ |
58 | 58 |
fprintf(stderr, "inl: port=0x%04"FMT_pioaddr"\n", addr); |
59 | 59 |
return 0; |
b/ioport.c | ||
---|---|---|
192 | 192 |
|
193 | 193 |
/***********************************************************/ |
194 | 194 |
|
195 |
void cpu_outb(CPUState *env, pio_addr_t addr, uint8_t val)
|
|
195 |
void cpu_outb(pio_addr_t addr, uint8_t val) |
|
196 | 196 |
{ |
197 | 197 |
LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val); |
198 | 198 |
ioport_write(0, addr, val); |
199 | 199 |
} |
200 | 200 |
|
201 |
void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val)
|
|
201 |
void cpu_outw(pio_addr_t addr, uint16_t val) |
|
202 | 202 |
{ |
203 | 203 |
LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val); |
204 | 204 |
ioport_write(1, addr, val); |
205 | 205 |
} |
206 | 206 |
|
207 |
void cpu_outl(CPUState *env, pio_addr_t addr, uint32_t val)
|
|
207 |
void cpu_outl(pio_addr_t addr, uint32_t val) |
|
208 | 208 |
{ |
209 | 209 |
LOG_IOPORT("outl: %04"FMT_pioaddr" %08"PRIx32"\n", addr, val); |
210 | 210 |
ioport_write(2, addr, val); |
211 | 211 |
} |
212 | 212 |
|
213 |
uint8_t cpu_inb(CPUState *env, pio_addr_t addr)
|
|
213 |
uint8_t cpu_inb(pio_addr_t addr) |
|
214 | 214 |
{ |
215 | 215 |
uint8_t val; |
216 | 216 |
val = ioport_read(0, addr); |
... | ... | |
218 | 218 |
return val; |
219 | 219 |
} |
220 | 220 |
|
221 |
uint16_t cpu_inw(CPUState *env, pio_addr_t addr)
|
|
221 |
uint16_t cpu_inw(pio_addr_t addr) |
|
222 | 222 |
{ |
223 | 223 |
uint16_t val; |
224 | 224 |
val = ioport_read(1, addr); |
... | ... | |
226 | 226 |
return val; |
227 | 227 |
} |
228 | 228 |
|
229 |
uint32_t cpu_inl(CPUState *env, pio_addr_t addr)
|
|
229 |
uint32_t cpu_inl(pio_addr_t addr) |
|
230 | 230 |
{ |
231 | 231 |
uint32_t val; |
232 | 232 |
val = ioport_read(2, addr); |
b/ioport.h | ||
---|---|---|
43 | 43 |
void isa_unassign_ioport(pio_addr_t start, int length); |
44 | 44 |
|
45 | 45 |
|
46 |
/* NOTE: as these functions may be even used when there is an isa |
|
47 |
brige on non x86 targets, we always defined them */ |
|
48 |
#if !defined(NO_CPU_IO_DEFS) && defined(NEED_CPU_H) |
|
49 |
void cpu_outb(CPUState *env, pio_addr_t addr, uint8_t val); |
|
50 |
void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val); |
|
51 |
void cpu_outl(CPUState *env, pio_addr_t addr, uint32_t val); |
|
52 |
uint8_t cpu_inb(CPUState *env, pio_addr_t addr); |
|
53 |
uint16_t cpu_inw(CPUState *env, pio_addr_t addr); |
|
54 |
uint32_t cpu_inl(CPUState *env, pio_addr_t addr); |
|
55 |
#endif |
|
46 |
void cpu_outb(pio_addr_t addr, uint8_t val); |
|
47 |
void cpu_outw(pio_addr_t addr, uint16_t val); |
|
48 |
void cpu_outl(pio_addr_t addr, uint32_t val); |
|
49 |
uint8_t cpu_inb(pio_addr_t addr); |
|
50 |
uint16_t cpu_inw(pio_addr_t addr); |
|
51 |
uint32_t cpu_inl(pio_addr_t addr); |
|
56 | 52 |
|
57 | 53 |
#endif /* IOPORT_H */ |
b/kvm-all.c | ||
---|---|---|
517 | 517 |
return ret; |
518 | 518 |
} |
519 | 519 |
|
520 |
static int kvm_handle_io(CPUState *env, uint16_t port, void *data,
|
|
521 |
int direction, int size, uint32_t count)
|
|
520 |
static int kvm_handle_io(uint16_t port, void *data, int direction, int size,
|
|
521 |
uint32_t count) |
|
522 | 522 |
{ |
523 | 523 |
int i; |
524 | 524 |
uint8_t *ptr = data; |
... | ... | |
527 | 527 |
if (direction == KVM_EXIT_IO_IN) { |
528 | 528 |
switch (size) { |
529 | 529 |
case 1: |
530 |
stb_p(ptr, cpu_inb(env, port));
|
|
530 |
stb_p(ptr, cpu_inb(port)); |
|
531 | 531 |
break; |
532 | 532 |
case 2: |
533 |
stw_p(ptr, cpu_inw(env, port));
|
|
533 |
stw_p(ptr, cpu_inw(port)); |
|
534 | 534 |
break; |
535 | 535 |
case 4: |
536 |
stl_p(ptr, cpu_inl(env, port));
|
|
536 |
stl_p(ptr, cpu_inl(port)); |
|
537 | 537 |
break; |
538 | 538 |
} |
539 | 539 |
} else { |
540 | 540 |
switch (size) { |
541 | 541 |
case 1: |
542 |
cpu_outb(env, port, ldub_p(ptr));
|
|
542 |
cpu_outb(port, ldub_p(ptr)); |
|
543 | 543 |
break; |
544 | 544 |
case 2: |
545 |
cpu_outw(env, port, lduw_p(ptr));
|
|
545 |
cpu_outw(port, lduw_p(ptr)); |
|
546 | 546 |
break; |
547 | 547 |
case 4: |
548 |
cpu_outl(env, port, ldl_p(ptr));
|
|
548 |
cpu_outl(port, ldl_p(ptr)); |
|
549 | 549 |
break; |
550 | 550 |
} |
551 | 551 |
} |
... | ... | |
625 | 625 |
switch (run->exit_reason) { |
626 | 626 |
case KVM_EXIT_IO: |
627 | 627 |
dprintf("handle_io\n"); |
628 |
ret = kvm_handle_io(env, run->io.port,
|
|
628 |
ret = kvm_handle_io(run->io.port, |
|
629 | 629 |
(uint8_t *)run + run->io.data_offset, |
630 | 630 |
run->io.direction, |
631 | 631 |
run->io.size, |
b/monitor.c | ||
---|---|---|
1200 | 1200 |
|
1201 | 1201 |
if (has_index) { |
1202 | 1202 |
int index = qdict_get_int(qdict, "index"); |
1203 |
cpu_outb(NULL, addr & IOPORTS_MASK, index & 0xff);
|
|
1203 |
cpu_outb(addr & IOPORTS_MASK, index & 0xff); |
|
1204 | 1204 |
addr++; |
1205 | 1205 |
} |
1206 | 1206 |
addr &= 0xffff; |
... | ... | |
1208 | 1208 |
switch(size) { |
1209 | 1209 |
default: |
1210 | 1210 |
case 1: |
1211 |
val = cpu_inb(NULL, addr);
|
|
1211 |
val = cpu_inb(addr); |
|
1212 | 1212 |
suffix = 'b'; |
1213 | 1213 |
break; |
1214 | 1214 |
case 2: |
1215 |
val = cpu_inw(NULL, addr);
|
|
1215 |
val = cpu_inw(addr); |
|
1216 | 1216 |
suffix = 'w'; |
1217 | 1217 |
break; |
1218 | 1218 |
case 4: |
1219 |
val = cpu_inl(NULL, addr);
|
|
1219 |
val = cpu_inl(addr); |
|
1220 | 1220 |
suffix = 'l'; |
1221 | 1221 |
break; |
1222 | 1222 |
} |
... | ... | |
1235 | 1235 |
switch (size) { |
1236 | 1236 |
default: |
1237 | 1237 |
case 1: |
1238 |
cpu_outb(NULL, addr, val);
|
|
1238 |
cpu_outb(addr, val); |
|
1239 | 1239 |
break; |
1240 | 1240 |
case 2: |
1241 |
cpu_outw(NULL, addr, val);
|
|
1241 |
cpu_outw(addr, val); |
|
1242 | 1242 |
break; |
1243 | 1243 |
case 4: |
1244 |
cpu_outl(NULL, addr, val);
|
|
1244 |
cpu_outl(addr, val); |
|
1245 | 1245 |
break; |
1246 | 1246 |
} |
1247 | 1247 |
} |
b/target-i386/op_helper.c | ||
---|---|---|
558 | 558 |
|
559 | 559 |
void helper_outb(uint32_t port, uint32_t data) |
560 | 560 |
{ |
561 |
cpu_outb(env, port, data & 0xff);
|
|
561 |
cpu_outb(port, data & 0xff); |
|
562 | 562 |
} |
563 | 563 |
|
564 | 564 |
target_ulong helper_inb(uint32_t port) |
565 | 565 |
{ |
566 |
return cpu_inb(env, port);
|
|
566 |
return cpu_inb(port); |
|
567 | 567 |
} |
568 | 568 |
|
569 | 569 |
void helper_outw(uint32_t port, uint32_t data) |
570 | 570 |
{ |
571 |
cpu_outw(env, port, data & 0xffff);
|
|
571 |
cpu_outw(port, data & 0xffff); |
|
572 | 572 |
} |
573 | 573 |
|
574 | 574 |
target_ulong helper_inw(uint32_t port) |
575 | 575 |
{ |
576 |
return cpu_inw(env, port);
|
|
576 |
return cpu_inw(port); |
|
577 | 577 |
} |
578 | 578 |
|
579 | 579 |
void helper_outl(uint32_t port, uint32_t data) |
580 | 580 |
{ |
581 |
cpu_outl(env, port, data);
|
|
581 |
cpu_outl(port, data); |
|
582 | 582 |
} |
583 | 583 |
|
584 | 584 |
target_ulong helper_inl(uint32_t port) |
585 | 585 |
{ |
586 |
return cpu_inl(env, port);
|
|
586 |
return cpu_inl(port); |
|
587 | 587 |
} |
588 | 588 |
|
589 | 589 |
static inline unsigned int get_sp_mask(unsigned int e2) |
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