Update SeaBIOS
This includes the following changes:
42bc394 Make sure to reenable ata interrupts even on error. 494dfc6 Move SeaBIOS post/boot stack to avoid conflict with gPXE. 3133e38 Test for broken gcc -combine on FC12.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
ARM atomic ops rewrite
Implement ARMv6 atomic ops (ldrex/strex) using the same trick as PPC.
Signed-off-by: Paul Brook <paul@codesourcery.com>
BCD cleanup
Combine multiple BCD implementations.
DS1338 RTC
Implement MAXIM SD1338 RTC+NVRAM.
GPIO I2C rework
Reqrite bitbanging I2C implementation. New code improves stop/startcondition handling, and gives more accurate input line level.
Introduce intermediate abstraction layer for I2C bitbanging thatis not connected via a GPIO port.
ARM RealView I2C
Add ARM Realview I2C host emulation.
Makefile dependencies for device configs
Add makefile dependencies for target specific device configs.These will copy the default config if none exists, obsoleting the oldconfigure time code. If a config already exists but is older than thedefault then print a warning....
target-mips: fix physical address type in MMU functions
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
[WIN32] Enable -k option on Windows too
There is no reason to have it disabled on this platform.
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-mips: make CP0_LLAddr register CPU dependent
Depending on the CPU, CP0_LLAddr is either read-only or read-write,and the returned value can be shifted by a variable amount of bits.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
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