PowerPC target optimisations: make intensive use of always_inline.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3347 c046a42c-6fe2-441c-8c8c-71466251a162
Reorganize the CPUPPCState structure to group features.Add #ifdef to avoid compiling not relevant resources:- MMU related stuff for user-mode only targets- PowerPC 64 only resources for PowerPC 32 targets- embedded PowerPC extensions for non-ppcemb targets....
Add MSR bits signification per PowerPC implementation flags (to be continued).As a side effect, single step and branch step are available again.Remove irrelevant MSR bits definitions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3342 c046a42c-6fe2-441c-8c8c-71466251a162
Full implementation of PowerPC 64 MMU, just missing support for 1 TB memory segments.Remove the PowerPC 64 "bridge" MMU model and implement segment registers emulation using SLB entries instead.Make SLB area size implementation dependant.Improve TLB & SLB search debug traces....
Rename PowerPC MMUCSR0 and MMUCFG SPRs: those are not BookE specific.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3333 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC hardware reset vector is now considered as part of the exception model.Use it at CPU initialisation time.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3332 c046a42c-6fe2-441c-8c8c-71466251a162
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3322 c046a42c-6fe2-441c-8c8c-71466251a162
Make PowerPC cache line size implementation dependant.Implement dcbz tunable cache line size for PowerPC 970.Make hardware reset vector implementation dependant.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3321 c046a42c-6fe2-441c-8c8c-71466251a162
HID0 is a write-clear register on 970 (DBSR).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3320 c046a42c-6fe2-441c-8c8c-71466251a162
Enable PowerPC 64 MMU model and exceptions.Cleanups in MMU exceptions generation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3319 c046a42c-6fe2-441c-8c8c-71466251a162
Fix PowerPC initialisation and first reset: reset must occur after we defined the CPU features.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3317 c046a42c-6fe2-441c-8c8c-71466251a162
We never have to export ppc_set_irq.Protect PowerPC 64 only features with #ifdef (TARGET_PPC64)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3316 c046a42c-6fe2-441c-8c8c-71466251a162
Code provision for hypervisor mode memory accesses.Add comments in load & store tables to ease code reading.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3313 c046a42c-6fe2-441c-8c8c-71466251a162
Fix nasty sign-extensions when running 32 bits CPU in the 64 bits emulatoron 32 bits hosts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3312 c046a42c-6fe2-441c-8c8c-71466251a162
Fix reproductible crash: call cpu_loop_exit from micro-op, not from helper.c
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3311 c046a42c-6fe2-441c-8c8c-71466251a162
Fix missing nip updates for instructions that potentially generate exceptions from op helpers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3308 c046a42c-6fe2-441c-8c8c-71466251a162
Handle all MMU models in switches, even if it's just to abort because of lack of supporting code.Implement 74xx software TLB model.Keep 74xx with software TLB disabled, as Linux is not able to handle TLB miss on those processors.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3307 c046a42c-6fe2-441c-8c8c-71466251a162
More comments about unimplemented SPRs.Tag unused functions with unused attribute instead of using #ifdef (TODO) to ease tests: just have to enable the implementation in the cpu_defs table.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3306 c046a42c-6fe2-441c-8c8c-71466251a162
Optimisations: avoid generation of duplicated micro-ops.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3305 c046a42c-6fe2-441c-8c8c-71466251a162
Remove definitions for deprecated SLB & TLB related op helpers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3303 c046a42c-6fe2-441c-8c8c-71466251a162
Avoid op helpers that would just call helpers for TLB & SLB management: call the helpers directly from the micro-ops.Avoid duplicated code for tlbsx. implementation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3302 c046a42c-6fe2-441c-8c8c-71466251a162
Share more SPR instanciations between all PowerPC 401 incarnations.Add comments about some unimplemented storage control dedicated SPRs.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3301 c046a42c-6fe2-441c-8c8c-71466251a162
Implement embedded PowerPC exceptions prefix and vectors registers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3300 c046a42c-6fe2-441c-8c8c-71466251a162
Share input pins and internal interrupt controller between all PowerPC 40x.Fix critical input interrupt generation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3299 c046a42c-6fe2-441c-8c8c-71466251a162
Fix (once again) PowerPC sync weight field.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3296 c046a42c-6fe2-441c-8c8c-71466251a162
Fix PowerPC TLB miss dump code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3295 c046a42c-6fe2-441c-8c8c-71466251a162
Fix inconsistent end conditions in ppc_find_xxx functions. (crash reported by Andreas Farber when using default CPU).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3293 c046a42c-6fe2-441c-8c8c-71466251a162
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3287 c046a42c-6fe2-441c-8c8c-71466251a162
Implement Process Priority Register as defined in the PowerPC 2.04 spec.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3282 c046a42c-6fe2-441c-8c8c-71466251a162
Implement new floating-point instructions (fre, frin, friz, frip, frim) as defined in the PowerPC 2.04 specification.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3281 c046a42c-6fe2-441c-8c8c-71466251a162
Improve single-precision floats load & stores: as the PowerPC registers only store double-precision floats, use float64_to_float32 & float32_to_float64 to do the appropriate conversion.Implement stfiwx.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3280 c046a42c-6fe2-441c-8c8c-71466251a162
XER is to be treated as a 64 bits register on 64 bits implementations, according to the PowerPC 2.04 specification.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3279 c046a42c-6fe2-441c-8c8c-71466251a162
Implement the PowerPC alternate time-base, following the 2.04 specification.Share most code with the time-base management routines.Remove time-base write routines from user-mode emulation environments.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3277 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC emulation optimization:avoid stopping translation after most SPR updateswhen a context-synchronization instruction is also needed.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3265 c046a42c-6fe2-441c-8c8c-71466251a162
Code provision for hypervisor timers resources, as described in PowerPC 2.04 specification.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3264 c046a42c-6fe2-441c-8c8c-71466251a162
Define the proper bfd_mach to be used by the disassembler for eachPowerPC emulated CPU.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3257 c046a42c-6fe2-441c-8c8c-71466251a162
Change POWERPC_PPC_GENERIC to POWERPC_DEFAULT.Use it as default for workstation targets.Fix PowerPC 750fl and 750gl definitions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3256 c046a42c-6fe2-441c-8c8c-71466251a162
Move get_sp_from_cpustate from cpu.h to target_signal.h.Enable sigaltstack processing for more architectures.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
linux-user sigaltstack() syscall, by Thayne Harbaugh.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
Build fix for PowerPC hosts, where "PPC" is a predefined macro name.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3251 c046a42c-6fe2-441c-8c8c-71466251a162
Implement size bit in PowerPC 64 comparisons.Allow 'weight' field in sync instruction.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3250 c046a42c-6fe2-441c-8c8c-71466251a162
Fixes for PowerPC 64 rotate and mask instructions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3247 c046a42c-6fe2-441c-8c8c-71466251a162
New ppc64-linux-user target.Allow use of PowerPC 970 for debugging (softmmu would not run, for now).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3246 c046a42c-6fe2-441c-8c8c-71466251a162
Avoid compilation warnings on 32 bits hosts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3203 c046a42c-6fe2-441c-8c8c-71466251a162
More PowerPC definitions, from POWER 2.04 specifications and misc sources.Check that at least instructions set and SPRs are correct for PowerPC 401, 403, 405 and 440 cores.Implement PowerPC 401 MMU model (real-mode only).Improve INSNs and SPRs dump to ease parse with standard shell tools....
Rework PowerPC 440 TLB management (thanks to Hollis Blanchard)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3200 c046a42c-6fe2-441c-8c8c-71466251a162
Make CPU hflags be a masked version of the PowerPC MSR.As a side effect, avoid potential bits shadowing in TB flags on 64 bits BookE.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3199 c046a42c-6fe2-441c-8c8c-71466251a162
Move likely and unlikely macros in a common place (Aurelien Jarno).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3192 c046a42c-6fe2-441c-8c8c-71466251a162
TARGET_FMT_lu may also be useful.Fix compilation warnings.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3190 c046a42c-6fe2-441c-8c8c-71466251a162
Code provision for PowerPC BookE MMU model support.Better MSR flags initialisation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3189 c046a42c-6fe2-441c-8c8c-71466251a162
Code provision for PowerPC 64 MMU model support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3186 c046a42c-6fe2-441c-8c8c-71466251a162
More PowerPC target cleanups:- remove unuseful historical macros and definitions- fix comments (bugs and cosmetics)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3185 c046a42c-6fe2-441c-8c8c-71466251a162
Fix PowerPC 32 emulation on 64 bits hosts:we can use 64 bits registers but not pretend page is 1kB longAs it seems most Linux programs assume page-size is 4kB, never allow1kB pages for user-mode only emulation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3182 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC flags update/use fixes:- fix confusion between overflow/summary overflow, as reported by S Bansal.- reset carry in addic. optimized case (as it was already done in addic).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3179 c046a42c-6fe2-441c-8c8c-71466251a162
Coding style fixes in PowerPC related code (no functional change):- avoid useless blanks at EOL.- avoid tabs.- fix wrapping lines on 80 chars terminals.- add missing ';' at macros EOL to avoid confusing auto-identers.- fix identation.- Remove historical macros in micro-ops (PARAM, SPARAM, PPC_OP, regs)...
find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
Fix tb->size mishandling, by Daniel Jacobowitz.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
Fix crash in set registers in PPC gdb-stub, by Jason Wessel.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3079 c046a42c-6fe2-441c-8c8c-71466251a162
Disable dead code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3071 c046a42c-6fe2-441c-8c8c-71466251a162
Fix PPCEMB for 32bit hosts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3059 c046a42c-6fe2-441c-8c8c-71466251a162
Spelling fixes, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3009 c046a42c-6fe2-441c-8c8c-71466251a162
Move target-specific defines to the target directories.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
Clean up of some target specifics in exec.c/cpu-exec.c.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
Spelling fix (Mark Glines)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2879 c046a42c-6fe2-441c-8c8c-71466251a162
Update PowerPC target status.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2724 c046a42c-6fe2-441c-8c8c-71466251a162
Debug traces fixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2721 c046a42c-6fe2-441c-8c8c-71466251a162
Code provision for new PowerPC embedded target support with:- 1 kB page size- 64 bits GPR- 64 bits physical address space- SPE extension support.Change TARGET_PPCSPE into TARGET_PPCEMB
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2718 c046a42c-6fe2-441c-8c8c-71466251a162
Improve PowerPC 405 MMU model / share more code for other embedded targetssupport.Fix PowerPC 405 MSR mask.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2717 c046a42c-6fe2-441c-8c8c-71466251a162
No functional changes:- compilation warning fixes- make loglevel tests consistent- use cpu_abort instead of printf(...); exit
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2706 c046a42c-6fe2-441c-8c8c-71466251a162
Duplicated SPR fix for BookE PowerPC by Guglielmo Morandin
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2704 c046a42c-6fe2-441c-8c8c-71466251a162
Move PowerPC 405 specific definitions into a separate filePreliminary code for -kernel option support for PowerPC 405 boardsFix DBSR in case of PowerPC 405 chip resetAdd enums for PowerPC 405 clocks.Fix IRQ numbers (IBM reversed bits numbering...)Fix SPRG4-7 read access right...
Add callbacks to allow dynamic change of PowerPC clocks (to be improved)Fix embedded PowerPC watchdog and timersFix PowerPC 405 SPRAdd generic PowerPC 405 core instanciation code + resets support.Implement simple peripherals shared by most PowerPC 405 implementations...
Cleanup and add more PowerPC core definitions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2684 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC 4xx software driven TLB fixes + debug traces.Add code provision for more MMU models support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2683 c046a42c-6fe2-441c-8c8c-71466251a162
Add reset callbacks for PowerPC CPU.Move cpu_ppc_init, cpu_ppc_close, cpu_ppc_reset and ppc_tlb_invalidateinto helper.c as they are to be called from outside of the translated code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2682 c046a42c-6fe2-441c-8c8c-71466251a162
Add bus model (or input pins) into PowerPC CPU flags.Add PowerPC 970 bus and exceptions model.Add code provision for PowerPC 970 instanciation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2680 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC emulation bugfixes:- don't generate multiple exit_tb at the end of conditional branches- disable TRACE exception as it is not correct for embedded PowerPC.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2679 c046a42c-6fe2-441c-8c8c-71466251a162
Fix a lot of debug traces for PowerPC emulation: use logfile instead of stdout
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2677 c046a42c-6fe2-441c-8c8c-71466251a162
Fix miscellaneous display warnings for PowerPC & alpha targetsand parallel CFI flash driver.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2661 c046a42c-6fe2-441c-8c8c-71466251a162
Add PowerPC 405 input pins (IRQ, resets, ...) model.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2654 c046a42c-6fe2-441c-8c8c-71466251a162
Embedded PowerPC Device Control Registers infrastructure.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2653 c046a42c-6fe2-441c-8c8c-71466251a162
Implement embedded IRQ controller for PowerPC 6xx/740 & 750.Fix PowerPC external interrupt input handling and lowering.Fix OpenPIC output pins management.Fix multiples bugs in OpenPIC IRQ management.Fix OpenPIC CPU reset function.Fix Mac99 machine to properly route OpenPIC outputs to the PowerPC input pins....
Unify IRQ handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC 64 fixes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2634 c046a42c-6fe2-441c-8c8c-71466251a162
cpu_get_phys_page_debug should return target_phys_addr_t instead of target_ulong to be consistent.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2633 c046a42c-6fe2-441c-8c8c-71466251a162
Fix for PowerPC 64 rotates.Fix for PowerPC 64 load & store with immediate index.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2617 c046a42c-6fe2-441c-8c8c-71466251a162
Support for PowerPC BookE exception model.No need to requeue timer exceptions.Fix nip saving for 64 bits PowerPC.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2556 c046a42c-6fe2-441c-8c8c-71466251a162
Merge PowerPC 405 MMU model.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2554 c046a42c-6fe2-441c-8c8c-71466251a162
As embedded PowerPC TLB model is very different from PowerPC 6xx ones,define ppc_tlb_t as an union of the two.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2553 c046a42c-6fe2-441c-8c8c-71466251a162
Fix rfi instruction: do not depend on current execution mode but on the execution mode that will be effective after the return.Add rfci, rfdi and rfmci for BookE PowerPC.Extend mfdcr / mtdcr and implement mfdrcx / mtdcrx.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2544 c046a42c-6fe2-441c-8c8c-71466251a162
Fix / update PowerPC BookE definitions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2543 c046a42c-6fe2-441c-8c8c-71466251a162
New model for PowerPC CPU hardware interrupt events:move all PowerPC specific code into target-ppc/helper.c to avoid pollutingthe common code in cpu-exec.c. This makes implementation of new features(ie embedded PowerPC timers, critical interrupts, ...) easier....
Solaris host compilation fix by Shaddy Baddah.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2541 c046a42c-6fe2-441c-8c8c-71466251a162
Add missing PowerPC 64 instructionsPowerPC 64 fixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2530 c046a42c-6fe2-441c-8c8c-71466251a162
Fix debug printf: we need different macros for target_ulong prints and GPR ones, as the lengths can be different.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2529 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC improvments:- add missing 64 bits rotate instructions- safely define TARGET_PPCSPE when 64 bits registers are used a separate target will be needed to use it in 32 bits mode on 32 bits hosts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2527 c046a42c-6fe2-441c-8c8c-71466251a162