kvm: Add missing bits to support live migration
This patch adds the missing hooks to allow live migration in KVM mode.It adds proper synchronization before/after saving/restoring the VCPUstates (note: PPC is untested), hooks intocpu_physical_memory_set_dirty_tracking() to enable dirty memory logging...
Convert machine registration to use module init functions
This cleans up quite a lot of #ifdefs, extern variables, and other ugliness.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
kvm: work around supported cpuid ioctl() brokenness
KVM_GET_SUPPORTED_CPUID has been known to fail to return -E2BIGwhen it runs out of entries. Detect this by always trying againwith a bigger table if the ioctl() fills the table.
Signed-off-by: Mark McLoughlin <markmc@redhat.com>
Include assert.h from qemu-common.h
Include assert.h from qemu-common.h and remove other direct uses.cpu-all.h still need to include it because of the dyngen-exec.h hacks
Signed-off-by: Paul Brook <paul@codesourcery.com>
Replace gcc variadic macro extension with C99 version
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Remove noisy printf when KVM masks CPU features
kvm: Add support for querying supported cpu features
kvm does not support all cpu features; add support for dunamically queryingthe supported feature set.
Signed-off-by: Avi Kivity <avi@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Make x86 cpuid feature names available in file scope
To be used later.
Fix x86 feature modifications for features that set multiple bits
QEMU allows adding or removing cpu features by using the syntax '-cpu +feature'or '-cpu -feature'. Some cpuid features cause more than one bit to be set orcleared; but QEMU stops after just one bit has been modified, causing the...
kvm: Trim cpu features not supported by kvm
Remove cpu features that are not supported by kvm from the cpuid featuresreported to the guest.
qemu: introduce qemu_init_vcpu (Marcelo Tosatti)
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162
qemu: per-arch cpu_has_work (Marcelo Tosatti)
Blue Swirl: fix Sparc32 breakage
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7238 c046a42c-6fe2-441c-8c8c-71466251a162
Fix i386-linux-user build (Laurent Desnogues)
This broke due to r7230.
Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7233 c046a42c-6fe2-441c-8c8c-71466251a162
put valid data into exit_int_info if needed (Gleb Natapov)
If fault happened during event delivery exit_int_info should containvalid info about the event on vm exit.
Signed-off-by: Gleb Natapov <gleb@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
xen: groundwork for xen support (Gerd Hoffmann)
- configure script and build system changes.- wind up new machine type.- add xen* command line options.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
kqemu: merge CONFIG_KQEMU and USE_KQEMU
Basically a recursive ":%s/USE_KQEMU/CONFIG_KQEMU/g".
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7189 c046a42c-6fe2-441c-8c8c-71466251a162
x86: Enhanced dump of segment registers (Jan Kiszka)
Parse the descriptor flags that segment registers refer to and show theresult in a more human-friendly format. The output of info registers eg.then looks like this:
[...]ES =007b 00000000 ffffffff 00cff300 DPL=3 DS [-WA]...
kvm: Fix cpuid initialization (Jan Kiszka)
Fix (more or less) spurious guest boot failures due to corrupted cpuidstates. The reason was insufficient initialization of cpuid entriesbefore passing them to the kernel.
At this chance also fix improper entry pointer progression and simplify...
Add new command line option -singlestep for tcg single stepping.
This replaces a compile time option for some targets and addsthis feature to targets which did not have a compile time option.
Add monitor command to enable or disable single step mode.
Modify monitor command "info status" to display single step mode....
Immediate versions of ro[lr]
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6968 c046a42c-6fe2-441c-8c8c-71466251a162
kvm: Drop kvm_patch_opcode_byte (Jan Kiszka)
As cpu_memory_rw_debug is now capable of modifying ROM, we can drop ourown patch function.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6906 c046a42c-6fe2-441c-8c8c-71466251a162
x86: Add NULL check to lsl (Jan Kiszka)
According to the Intel specs, lsl performs a check against NULL for theprovided selector, just like lar does. helper_lar() includes thecorresponding code, helper_lsl() was lacking it so far.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
target-i386: use the new bswap* TCG ops
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6836 c046a42c-6fe2-441c-8c8c-71466251a162
tcg: rename bswap_i32/i64 functions
Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162
Guest debugging support for KVM (Jan Kiszka)
This is a backport of the guest debugging support for the KVMaccelerator that is now part of the KVM tree. It implements the reworkedKVM kernel API for guest debugging (KVM_CAP_SET_GUEST_DEBUG) which isnot yet part of any mainline kernel but will probably be 2.6.30 stuff....
The _exit syscall is used for both thread termination in NPTL applications,and process termination in legacy applications. Try to guess which we wantbased on the presence of multiple threads.
Also implement locking when modifying the CPU list.
Signed-off-by: Paul Brook <paul@codesourcery.com>...
Fix cpuid KVM crash on i386 (Lubomir Rintel)
Cpuid should return into vec, not overwrite past address in count.Changeset 6565 broke this.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6689 c046a42c-6fe2-441c-8c8c-71466251a162
Fix "info registers" under kvm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6684 c046a42c-6fe2-441c-8c8c-71466251a162
x86: use qemu_log_mask on triple faults (Chris Wright)
replace open coded qemu_log_mask with proper macro
Signed-off-by: Chris Wright <chrisw@sous-sol.org>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6649 c046a42c-6fe2-441c-8c8c-71466251a162
KVM: cpuid function 2: store all values (Amit Shah)
Incrementing the array index was missed in the previous series which causesus to not store all the values.
Signed-off-by: Amit Shah <amit.shah@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
KVM: Get all cpuid values from function 2 (Amit Shah)
cpuid function 2 can have multiple values to describe cache behaviour.Loop till we have fetched all the values.
KVM: Fetch sub-leaf cpuid values for functions 4, 0xb, 0xd. (Amit Shah)
CPUID functions 4, 0xb and 0xd have sub-leaf values which depend on theinput value of ECX. Store these values as well.
KVM: CPUID takes ecx as input value for some functions (Amit Shah)
The CPUID instruction takes the value of ECX as an input parameterin addition to the value of EAX as the count for functions 4, 0xband 0xd. Make sure we pass the value to the instruction....
targets: remove error handling from qemu_malloc() callers (Avi Kivity)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6530 c046a42c-6fe2-441c-8c8c-71466251a162
Add phenom CPU descriptor (Alexander Graf)
As part of my ongoing effort to make nested SVM useful, I started working to getVMware ESX run inside KVM.
VMware couples itself pretty tightly to the CPUID, so it's a good idea to emulatea machine that officially supports SVM and should thus exploit the powers of...
Implement FFXSR (Alexander Graf)
Newer AMD CPUs have the FFXSR capability. This leaves out XMMregister in FXSAVE/FXRESTORE when in CPL=0 and 64-bit mode.
This is required for Hyper-V.
Signed-off-by: Alexander Graf <agraf@suse.de>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Replace noreturn with QEMU_NORETURN
Thanks to Robert Riebisch for analysis [1]
[1] http://marc.info/?l=qemu-devel&m=123352293319271&w=2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6492 c046a42c-6fe2-441c-8c8c-71466251a162
Fix a typo in ext2_feature_name (Carl-Daniel Hailfinger)
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6474 c046a42c-6fe2-441c-8c8c-71466251a162
Use new logging API in reset handling (Jan Kiszka)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6473 c046a42c-6fe2-441c-8c8c-71466251a162
MTRR support on x86, part 2 (Carl-Daniel Hailfinger)
Load and save MTRR state together with machine state.
Add support for the MTRRcap MSR which is used by the latest Bochs BIOSand some operating systems.
Fix a typo in ext2_feature_name.
With this patch, MTRR emulation should be good enough to not trigger any...
kvm-x86: Remove eflags conversion into emulator format (Jan Kiszka)
It seems that the conversion of the kernel-delivered eflags state intoqemu's internal split representation was once needed in an older kvmdesign (register read-back may have taken place from inside cpu_exec)....
x86: Issue reset on triple faults (Jan Kiszka)
As discussed a few times on this list: A triple fault causes a systemreset on x86, and some guests make use of this (e.g. 386BSD). To keepthe chance of tracing unexpected resets, log them if CPU_LOG_RESET is...
Log reset events (Jan Kiszka)
Original idea&code by Kevin Wolf, split-up in two patches and added morearchs.
This patch introduces a flag to log CPU resets. Useful for tracingunexpected resets (such as those triggered by x86 triple faults).
MTRR support on x86 (Carl-Daniel Hailfinger)
The current codebase ignores MTRR (Memory Type Range Register)configuration writes and reads because Qemu does not implement caching.All BIOS/firmware in know of for x86 do implement a mode calledCache-as-RAM (CAR) which locks down the CPU cache lines and uses the CPU...
global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
These are references to 'loglevel' that aren't on a simple 'if (loglevel &X) qemu_log()' statement.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Convert references to logfile/loglevel to use qemu_log*() macros
This is a large patch that changes all occurrences of logfile/loglevelglobal variables to use the new qemu_log*() macros.
Clean up debugging code #ifdefs (Eduardo Habkost)
Use macros to avoid #ifdefs on debugging code.
This patch doesn't try to merge logging macros from different files,but just unify the debugging code #ifdefs onto a macro on each file. Afurther cleanup can unify the debugging macros on a common header, later...
Suppress i386 warnings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6304 c046a42c-6fe2-441c-8c8c-71466251a162
Add noreturn function attribute
Introduce noreturn attribute and attach it to cpu_loop_exit as well asinterrupt/exception helpers for i386. This avoids a bunch of gcc4warnings.
[ Note that this patch comes with a workaround to include qemu-common.heven in cases where is currently causes conflicts with dyngen-exec.h....
Update FSF address in GPL/LGPL boilerplate
The attached patch updates the FSF address in the GPL/LGPL boilerplatein most GPL/LGPLed files, and also in COPYING.LIB.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>...
Use the ARRAY_SIZE() macro where appropriate.
Change from v1: Avoid changing the existing coding style in certain files.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
Initialize msr list size properly in KVM
Hollis Blanchard noticed that the last commit was not sufficient. We also needto initialize the msr size in our newly allocated list.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6018 c046a42c-6fe2-441c-8c8c-71466251a162
Correctly initialize msr list in KVM
I believe this was spotted by Gerd Hoffman but I can't find his patchnow. This will cause very subtle corruption on the heap because wedon't allocate the appropriately sized buffer.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Fix smsw for x86_64 guest and bigendian host case
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6009 c046a42c-6fe2-441c-8c8c-71466251a162
x86 cleanup
Remove some unnecessary includes, add needed includes, move prototypes tocpu.h to suppress missing prototype warnings.
Remove unused functions and prototypes (cpu_x86_flush_tlb, cpu_lock,cpu_unlock, restore_native_fp_state, save_native_fp_state)....
Fix crash in kvm.c (Stefan Weil)
Fix crash with kvm enabled.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5984 c046a42c-6fe2-441c-8c8c-71466251a162
target-i386: Fix jmp im on x86_64 when executing 32-bit code
When running grub-install (32-bit) on an x86_64 Linux system in qemu, ithangs on a pagefault forever, because an integer overflow occurs on theIP on "jmp im". This patch masks overflows for 32 bit IPs on a 64 bit...
Remove FORCE_RET() and RETURN
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5923 c046a42c-6fe2-441c-8c8c-71466251a162
target-i386: fix CVE-2007-1322
The icebp instruction can be abused to terminate the emulation,resulting in denial of service.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5921 c046a42c-6fe2-441c-8c8c-71466251a162
Fix register name typo in dumping debug registers (Jan Kiszka)
Signed-off-by: Jan Kiszka <jan.kiszka@web.de>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5855 c046a42c-6fe2-441c-8c8c-71466251a162
Fix pmovsx* / pmovzx* SSE instructions (original fix by Frank Mehnert).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5841 c046a42c-6fe2-441c-8c8c-71466251a162
Common cpu_loop_exit prototype
All archs use the same cpu_loop_exit, so move the prototype in a commonheader. i386 was carrying a __hidden attribute, but that was empty forthis arch anyway.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>...
Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying thecode and also fixing a use after release issue incpu_break/watchpoint_remove_all.
i386: remove unused function prototypes (Laurent Desnogues)
This patch removes two unused prototypes from i386 target exec.h file.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5795 c046a42c-6fe2-441c-8c8c-71466251a162
x86: Dump debug registers (Jan Kiszka)
As the debug registers are no longer dummies, let's include theircurrent state into the 'info registers' output and other register dumps.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
x86: Debug register emulation (Jan Kiszka)
Built on top of previously enhanced breakpoint/watchpoint support, thispatch adds full debug register emulation for the x86 architecture.
Many corner cases were considered, and the result was successfullytested inside a Linux guest with gdb, but I won't be surprised if one...
Refactor and enhance break/watchpoint API (Jan Kiszka)
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow thesucceeding enhancements this series comes with.
First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switchingto dynamically allocated data structures that are kept in linked lists....
Refactor translation block CPU state handling (Jan Kiszka)
This patch refactors the way the CPU state is handled that is associatedwith a TB. The basic motivation is to move more arch specific code outof generic files. Specifically the long #ifdef clutter in tb_find_fast()...
Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)
as macros should be avoided when possible.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162
TCG variable type checking.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
target-i386: fix helper_pmovmskb_mmx helper
(malc)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5728 c046a42c-6fe2-441c-8c8c-71466251a162
x86: fix warning without CONFIG_KVM (Mark McLoughlin)
Warning is:
target-i386/helper.c: In function `cpu_x86_cpuid': target-i386/helper.c:1373: warning: implicit declaration of function `host_cpuid'
Signed-off-by: Mark McLoughlin <markmc@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Fix CPUID ext2 features masking (Avi Kivity)
Typo. Exposes rdtscp which kills some guests.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5717 c046a42c-6fe2-441c-8c8c-71466251a162
Define kvm_ioctl in the same way as ioctl
The third argument to ioctl is a ... which allows any value to be passed. Inpractice, glibc always treats the argument as a void *.
Do the same thing for the kvm ioctls to keep things consistent with atraditional ioctl....
x86 CPUID extended family/model (Andre Przywara).
x86 CPUs feature extended family/model bits in CPUID leaf0000_0001|EAX. Refer to page 10 in:http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25481.pdf
Those bits are necessary to model newer AMD CPUs:...
Add missing files to KVM commit.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5629 c046a42c-6fe2-441c-8c8c-71466251a162
Add KVM support to QEMU
This patch adds very basic KVM support. KVM is a kernel module for Linux thatallows userspace programs to make use of hardware virtualization support. Itcurrent supports x86 hardware virtualization using Intel VT-x or AMD-V. It...
Split CPUID from op_helper
KVM needs to call CPUID from outside of the TCG code. This patchsplits out the CPUID logic into a separate helper that both the ophelper and KVM can call.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5626 c046a42c-6fe2-441c-8c8c-71466251a162
Add additional CPU flag definitions
Some x86 CPU definitions that KVM needs
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5625 c046a42c-6fe2-441c-8c8c-71466251a162
Fix restore of older snapshots for target-i386 on big endian hosts
A target_ulong may be 64-bit. Passing it to a function expecting a 32-bitpointer is wrong and unfortunately happens to work for x86. It won't work onbig endian hosts though. Change the code to work properly on all hosts....
Fix cpuid ext_features value for Atom N270 (Blue Swirl).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5558 c046a42c-6fe2-441c-8c8c-71466251a162
Fix undeclared symbol warnings from sparse
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
i386/SVM: return amount of ASIDs
With SVM the TLB supports tagging to distinguish TLB entries fromdifferent virtual CPUs. This tag is called an ASID. The amount of ASIDs isgiven in EBX of the SVM-CPUID-leaf. Currently we return 0, which mightbreak hypervisors. Let's better return something >0 here, say 0x10....
target-i386: Add Core Duo Definition
This patch adds a CPU definition for the Core Duo CPU. I tried toresemble the original as closely as possible and document what featuresare missing still. This patch enables the use of a recent CPU definitionon 32 bit platforms....
Fix crc32w decoding, fix a constant width in blendvpd.
Forced the constant's width to long long so that it doesn't overflow,problem spotted by C. W. Betts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5417 c046a42c-6fe2-441c-8c8c-71466251a162
x86 "popcnt" affects flags.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5412 c046a42c-6fe2-441c-8c8c-71466251a162
Implement SSE4.1, SSE4.2 (x86).
This adds support for CPUID_EXT_SSE41, CPUID_EXT_SSE42, CPUID_EXT_POPCNTextensions. Most instructions haven't been tested yet.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5411 c046a42c-6fe2-441c-8c8c-71466251a162
Do not use load_seg_vm to load CS in real mode iret handling
load_seg_vm calls cpu_x86_load_seg_cache which updates hflags ofcurrent env, real hardware doesn't do this, nor the code that handlesreal mode lret/lcall/ljmp.
This unbreaks "unreal mode" and makes QEMU the first emulator being...
Resurrect the safe part of r5274
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5401 c046a42c-6fe2-441c-8c8c-71466251a162
x86 pextrw destination operand can be r64.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5367 c046a42c-6fe2-441c-8c8c-71466251a162
Handle MSR_IA32_PERF_STATUS in rdmsr (Alexander Graf).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5366 c046a42c-6fe2-441c-8c8c-71466251a162
Fix save/restore regression introduced by r5318
sysenter_cs is a u32 and is loaded as a u32.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5351 c046a42c-6fe2-441c-8c8c-71466251a162
My core2duo patch introduced a vague statement of "missing features" inthe CPUID specification. This patch addresses this by specifying exactlywhat is missing.While going along the missing CPUID entries I also stumbled acrossinvalid and missing CPUID #defines while comparing them to the Intel...
Rename -cpu atom to -cpu n270.
As noticed by Alexander Graf Atom is a name of a series with varyingfeatures.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5341 c046a42c-6fe2-441c-8c8c-71466251a162
Fix definition of EMX bit in cpuid (Jens Axboe).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5330 c046a42c-6fe2-441c-8c8c-71466251a162
Revert r5274 which breaks savevm/loadvm
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5321 c046a42c-6fe2-441c-8c8c-71466251a162
Add Atom (x86) cpu identification.
Also add SSSE3 to Core2 features.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5319 c046a42c-6fe2-441c-8c8c-71466251a162
SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).
On Intel CPUs, sysenter and sysexit are valid in 64-bit mode. This patchmakes both 64-bit aware and enables them for Intel CPUs.Add cpu save/load for 64-bit wide sysenter variables.
Signed-off-by: Alexander Graf <agraf@suse.de>...
Core 2 Duo specification (Alexander Graf).
This patch adds a Core 2 Duo CPU to the available CPU types. The CPUdefinition tries to resemble a real CPU as good as possible, whilst notexposing features qemu does not implement.The patch also includes some minor additions that Core 2 Duo CPUs have:...
Clean up vendor identification (Alexander Graf).
Right now CPU vendor identification contains a lot of magic numbers. Thepatch cleans them up to defines, so we can identify the CPU later onwithout copying magic numbers.