Archipelago » qemu

    1024

};

    int exit;

    SDL_mutex *mutex;

    SDL_sem *sem;

        bdrv_close(bs->backing_hd);

}

static int vmdk_parent_open(BlockDriverState *bs, const char * filename)

{

    BDRVVmdkState *s = bs->opaque;

done

echo >> $output

echo "const char *const xml_builtin[][2] = {" >> $output

for input; do

#endif

/*----------------------------------------------------------------------------

| Raises the exceptions specified by `flags'.  Floating-point traps can be

| defined here if desired.  It is currently not possible for such a trap

| to substitute a result value.  If traps are not implemented, this routine

};

/* LMP layer emulation */

static void bt_submit_lmp(struct bt_device_s *bt, int length, uint8_t *data)

{

    int resp, resplen, error, op, tr;

    respdata[0] |= tr;

}

{

    struct bt_device_s *slave;

    if (length < 1)

        break;

    }

}

/* HCI layer emulation */

    bt_hci_lmp_mode_change_master(hci, link, acl_active, 0);

}

{

    hci->acl_len = 0;

    hci->last_cmd = 0;

        s->status |= 1 << 5;

}

{

    struct cbus_slave_s *slave = (struct cbus_slave_s *) retu;

    struct cbus_retu_s *s = (struct cbus_retu_s *) slave->opaque;

        s->result[retu_adc_head_det] = 123;

}

{

    struct cbus_slave_s *slave = (struct cbus_slave_s *) retu;

    struct cbus_retu_s *s = (struct cbus_retu_s *) slave->opaque;

    else

        s->result[retu_adc_hook_det] = 123;

}

/* Tahvo/Betty */

struct cbus_tahvo_s {

    }

}

static int pci_irq_levels[4];

static void pci_gt64120_set_irq(qemu_irq *pic, int irq_num, int level)

	}

}

	mst_fpga_readb,

	mst_fpga_readb,

	mst_fpga_readb,

};

	mst_fpga_writeb,

	mst_fpga_writeb,

	mst_fpga_writeb,

/* Wolfson 8750 I2C address */

#define MP_WM_ADDR              0x34

typedef struct musicpal_audio_state {

    uint32_t base;

# include "nand.c"

/* Information based on Linux drivers/mtd/nand/nand_ids.c */

    int size;

    int width;

    int page_shift;

    omap_badwidth_write8,

};

                target_phys_addr_t channel_base, qemu_irq irq, omap_clk clk,

                CharDriverState *chr)

{

/* If a clock is allowed to idle, it is disabled automatically when

 * all of clock domains using it are disabled.  */

{

    struct clk *chld;

    IRQ_INTERNAL = 0x02,

    IRQ_TIMER    = 0x04,

    IRQ_SPECIAL  = 0x08,

typedef struct IRQ_queue_t {

    uint32_t queue[BF_WIDTH(MAX_IRQ)];

int piix3_init(PCIBus *bus, int devfn);

void i440fx_init_memory_mappings(PCIDevice *d);

int piix4_init(PCIBus *bus, int devfn);

/* vga.c */

    int it_shift;

} KBDState;

/* update irq and KBD_STAT_[MOUSE_]OBF */

/* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be

/* PIIX3 PCI to ISA bridge */

PCIDevice *piix4_dev;

/* just used for simpler irq handling. */

}

/* Specific helpers for POWER & PowerPC 601 RTC */

{

    return cpu_ppc_tb_init(env, 7812500);

}

void cpu_ppc601_store_rtcu (CPUState *env, uint32_t value)

{

    return tmp;

}

{

    uint32_t i;

    uint16_t crc = 0xFFFF;

extern CPUWriteMemoryFunc *PPC_io_write[];

extern CPUReadMemoryFunc *PPC_io_read[];

void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);

/* ISA IO ports bridge */

#define PPC_IO_BASE 0x80000000

/* Speaker port 0x61 */

static void speaker_ioport_write (void *opaque, uint32_t addr, uint32_t val)

{

    return ret;

}

    &PPC_prep_io_writeb,

    &PPC_prep_io_writew,

    &PPC_prep_io_writel,

};

    &PPC_prep_io_readb,

    &PPC_prep_io_readw,

    &PPC_prep_io_readl,

    RTL8139TallyCounters_clear(&s->tally_counters);

}

{

    counters->TxOk = 0;

    counters->RxOk = 0;

#include "qemu-timer.h"

#include "soc_dma.h"

{

    memcpy(ch->paddr[0], ch->paddr[1], ch->bytes);

    ch->paddr[0] += ch->bytes;

    ch->paddr[1] += ch->bytes;

}

{

    ch->io_fn[1](ch->io_opaque[1], ch->paddr[0], ch->bytes);

    ch->paddr[0] += ch->bytes;

}

{

    ch->io_fn[0](ch->io_opaque[0], ch->paddr[1], ch->bytes);

    ch->paddr[1] += ch->bytes;

 * oprating systems may not need to use them.  */

static void *fifo_buf;

static int fifo_size;

{

    if (ch->bytes > fifo_size)

        fifo_buf = qemu_realloc(fifo_buf, fifo_size = ch->bytes);

    }

}

{

    switch (command) {

    case 0xff:

    }

}

{

    switch (dev->state) {

    case READ1:

    }

}

{

#if 0

    if (dev->address % 0x100000 == 0)

/* We never mark the device as busy, so interrupts cannot be triggered

   XXXXX */

{

    int dev;

#include "hw.h"

#include "qemu-timer.h"

#include "console.h"

#define TSC_CUT_RESOLUTION(value, p)	((value) >> (16 - (p ? 12 : 10)))

    tsc2005_pin_update(s);

}

{

    struct tsc2005_state_s *s = opaque;

    uint32_t ret = 0;

#include "qemu-timer.h"

#include "console.h"

#include "omap.h"	/* For struct i2s_codec_s and struct uwire_slave_s */

#define TSC_DATA_REGISTERS_PAGE		0x0

#define TSC_CONTROL_REGISTERS_PAGE	0x1

#include "usb.h"

#include "omap.h"

#include "irq.h"

struct tusb_s {

    int iomemtype[2];

    }

}

    scoop_readb,

    scoop_readb,

    scoop_readb,

};

    scoop_writeb,

    scoop_writeb,

    scoop_writeb,

#define MAGIC_CHG(a, b, c, d)	((d << 24) | (c << 16) | (b << 8) | a)

    uint32_t comadj_keyword;

    int32_t comadj;

    return p;

}

{

    void *buf;

    int ret;

/****************************************************************************/

/* ??? This does not handle endianness correctly.  */

{

#ifdef DEBUG

	char *segment[] = { "TEXT", "DATA", "BSS", "*UNKNOWN*" };

}

#ifdef TARGET_X86_64

static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,

                       uint64_t addr, unsigned int sel)

    set_gate64(idt_table + n * 2, 0, dpl, 0, 0);

}

#else

static void set_gate(void *ptr, unsigned int type, unsigned int dpl,

                     uint32_t addr, unsigned int sel)

#if defined(TARGET_I386)

/* NOTE: there is really one LDT for all the threads */

static abi_long read_ldt(abi_ulong ptr, unsigned long bytecount)

{

static void monitor_start_input(void);

void term_flush(void)

{

#define NBD_BUFFER_SIZE (1024*1024)

static void usage(const char *name)

{

/* Return the name for membar value VALUE or NULL if not found.  */

sparc_decode_membar (value)

     int value;

{

/* Return the name for prefetch value VALUE or NULL if not found.  */

sparc_decode_prefetch (value)

     int value;

{

/* Return the name for sparclet cpreg value VALUE or NULL if not found.  */

sparc_decode_sparclet_cpreg (value)

     int value;

{

/* thread support */

void cpu_lock(void)

{

    dead_tmp(tmp);

}

    1, /* and */

    1, /* xor */

    0, /* sub */

/* broken thread support */

void helper_lock(void)

{

      return;                                                 \

  }

{

#if 0

    fprintf(stderr, "Translating opcode 0x%04x\n", ctx->opcode);

    ctx->bstate = BS_EXCP;

}

{

    uint32_t old_flags = ctx->flags;

#undef DEF2

};

/* XXX: move that inside the context */

uint16_t *gen_opc_ptr;