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/*
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 * Renesas SH7751R R2D-PLUS emulation
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 *
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 * Copyright (c) 2007 Magnus Damm
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 * Copyright (c) 2008 Paul Mundt
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include "hw.h"
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#include "sh.h"
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#include "sysemu.h"
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#include "boards.h"
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#define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */
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#define SDRAM_SIZE 0x04000000
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#define PA_POWOFF        0x30
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#define PA_VERREG        0x32
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#define PA_OUTPORT        0x36
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typedef struct {
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    target_phys_addr_t base;
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    uint16_t bcr;
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    uint16_t irlmon;
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    uint16_t cfctl;
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    uint16_t cfpow;
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    uint16_t dispctl;
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    uint16_t sdmpow;
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    uint16_t rtcce;
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    uint16_t pcicd;
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    uint16_t voyagerrts;
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    uint16_t cfrst;
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    uint16_t admrts;
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    uint16_t extrst;
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    uint16_t cfcdintclr;
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    uint16_t keyctlclr;
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    uint16_t pad0;
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    uint16_t pad1;
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    uint16_t powoff;
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    uint16_t verreg;
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    uint16_t inport;
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    uint16_t outport;
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    uint16_t bverreg;
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} r2d_fpga_t;
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static uint32_t r2d_fpga_read(void *opaque, target_phys_addr_t addr)
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{
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    r2d_fpga_t *s = opaque;
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    addr -= s->base;
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    switch (addr) {
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    case PA_OUTPORT:
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        return s->outport;
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    case PA_POWOFF:
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        return s->powoff;
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    case PA_VERREG:
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        return 0x10;
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    }
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    return 0;
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}
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static void
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r2d_fpga_write(void *opaque, target_phys_addr_t addr, uint32_t value)
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{
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    r2d_fpga_t *s = opaque;
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    addr -= s->base;
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    switch (addr) {
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    case PA_OUTPORT:
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        s->outport = value;
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        break;
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    case PA_POWOFF:
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        s->powoff = value;
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        break;
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    case PA_VERREG:
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        /* Discard writes */
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        break;
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    }
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}
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static CPUReadMemoryFunc *r2d_fpga_readfn[] = {
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    r2d_fpga_read,
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    r2d_fpga_read,
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    NULL,
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};
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static CPUWriteMemoryFunc *r2d_fpga_writefn[] = {
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    r2d_fpga_write,
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    r2d_fpga_write,
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    NULL,
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};
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static void r2d_fpga_init(target_phys_addr_t base)
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{
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    int iomemtype;
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    r2d_fpga_t *s;
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    s = qemu_mallocz(sizeof(r2d_fpga_t));
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    if (!s)
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        return;
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    s->base = base;
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    iomemtype = cpu_register_io_memory(0, r2d_fpga_readfn,
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                                       r2d_fpga_writefn, s);
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    cpu_register_physical_memory(base, 0x40, iomemtype);
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}
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static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
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              const char *boot_device, DisplayState * ds,
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              const char *kernel_filename, const char *kernel_cmdline,
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              const char *initrd_filename, const char *cpu_model)
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{
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    CPUState *env;
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    struct SH7750State *s;
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    if (!cpu_model)
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        cpu_model = "SH7751R";
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    env = cpu_init(cpu_model);
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    if (!env) {
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        fprintf(stderr, "Unable to find CPU definition\n");
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        exit(1);
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    }
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    /* Allocate memory space */
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    cpu_register_physical_memory(SDRAM_BASE, SDRAM_SIZE, 0);
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    /* Register peripherals */
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    r2d_fpga_init(0x04000000);
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    s = sh7750_init(env);
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    /* Todo: register on board registers */
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    {
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      int kernel_size;
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      kernel_size = load_image(kernel_filename, phys_ram_base);
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      if (kernel_size < 0) {
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        fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename);
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        exit(1);
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      }
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      env->pc = SDRAM_BASE | 0xa0000000; /* Start from P2 area */
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    }
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}
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QEMUMachine r2d_machine = {
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    "r2d",
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    "r2d-plus board",
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    r2d_init,
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    SDRAM_SIZE | RAMSIZE_FIXED
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};