Revision b319feb7
| b/hw/r2d.c | ||
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* Renesas SH7751R R2D-PLUS emulation |
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* |
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* Copyright (c) 2007 Magnus Damm |
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* Copyright (c) 2008 Paul Mundt |
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* |
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* Permission is hereby granted, free of charge, to any person obtaining a copy |
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* of this software and associated documentation files (the "Software"), to deal |
| ... | ... | |
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#include "sh.h" |
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#include "sysemu.h" |
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#include "boards.h" |
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#include "assert.h" |
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#define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */ |
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#define SDRAM_SIZE 0x04000000 |
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#define PA_POWOFF 0x30 |
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#define PA_VERREG 0x32 |
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#define PA_OUTPORT 0x36 |
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typedef struct {
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target_phys_addr_t base; |
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uint16_t bcr; |
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uint16_t irlmon; |
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uint16_t cfctl; |
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uint16_t cfpow; |
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uint16_t dispctl; |
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uint16_t sdmpow; |
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uint16_t rtcce; |
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uint16_t pcicd; |
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uint16_t voyagerrts; |
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uint16_t cfrst; |
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uint16_t admrts; |
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uint16_t extrst; |
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uint16_t cfcdintclr; |
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uint16_t keyctlclr; |
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uint16_t pad0; |
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uint16_t pad1; |
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uint16_t powoff; |
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uint16_t verreg; |
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uint16_t inport; |
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uint16_t outport; |
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uint16_t bverreg; |
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} r2d_fpga_t; |
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static uint32_t r2d_fpga_read(void *opaque, target_phys_addr_t addr) |
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{
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r2d_fpga_t *s = opaque; |
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addr -= s->base; |
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switch (addr) {
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case PA_OUTPORT: |
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return s->outport; |
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case PA_POWOFF: |
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return s->powoff; |
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case PA_VERREG: |
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return 0x10; |
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} |
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return 0; |
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} |
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static void |
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r2d_fpga_write(void *opaque, target_phys_addr_t addr, uint32_t value) |
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{
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r2d_fpga_t *s = opaque; |
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addr -= s->base; |
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switch (addr) {
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case PA_OUTPORT: |
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s->outport = value; |
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break; |
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case PA_POWOFF: |
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s->powoff = value; |
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break; |
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case PA_VERREG: |
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/* Discard writes */ |
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break; |
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} |
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} |
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static uint32_t invalid_read(void *opaque, target_phys_addr_t addr) |
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{
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assert(0); |
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return 0; |
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} |
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static void invalid_write(void *opaque, target_phys_addr_t addr, |
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uint32_t mem_value) |
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{
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assert(0); |
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} |
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static CPUReadMemoryFunc *r2d_fpga_readfn[] = {
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r2d_fpga_read, |
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r2d_fpga_read, |
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invalid_read, |
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}; |
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static CPUWriteMemoryFunc *r2d_fpga_writefn[] = {
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r2d_fpga_write, |
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r2d_fpga_write, |
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invalid_write, |
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}; |
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static void r2d_fpga_init(target_phys_addr_t base) |
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{
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int iomemtype; |
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r2d_fpga_t *s; |
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s = qemu_mallocz(sizeof(r2d_fpga_t)); |
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if (!s) |
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return; |
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s->base = base; |
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iomemtype = cpu_register_io_memory(0, r2d_fpga_readfn, |
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r2d_fpga_writefn, s); |
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cpu_register_physical_memory(base, 0x40, iomemtype); |
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} |
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static void r2d_init(ram_addr_t ram_size, int vga_ram_size, |
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const char *boot_device, DisplayState * ds, |
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const char *kernel_filename, const char *kernel_cmdline, |
| ... | ... | |
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/* Allocate memory space */ |
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cpu_register_physical_memory(SDRAM_BASE, SDRAM_SIZE, 0); |
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/* Register peripherals */ |
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r2d_fpga_init(0x04000000); |
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s = sh7750_init(env); |
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/* Todo: register on board registers */ |
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{
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