Revision b33c17e1
b/hw/ppc.c | ||
---|---|---|
600 | 600 |
uint64_t diff; |
601 | 601 |
|
602 | 602 |
diff = qemu_get_clock(vm_clock) - tb_env->purr_start; |
603 |
|
|
603 |
|
|
604 | 604 |
return tb_env->purr_load + muldiv64(diff, tb_env->tb_freq, ticks_per_sec); |
605 | 605 |
} |
606 | 606 |
#endif /* defined(TARGET_PPC64H) */ |
... | ... | |
631 | 631 |
} |
632 | 632 |
|
633 | 633 |
static void __cpu_ppc_store_decr (CPUState *env, uint64_t *nextp, |
634 |
struct QEMUTimer *timer, |
|
635 |
void (*raise_excp)(CPUState *), |
|
636 |
uint32_t decr, uint32_t value, |
|
637 |
int is_excp) |
|
634 |
struct QEMUTimer *timer,
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|
635 |
void (*raise_excp)(CPUState *),
|
|
636 |
uint32_t decr, uint32_t value,
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|
637 |
int is_excp)
|
|
638 | 638 |
{ |
639 | 639 |
ppc_tb_t *tb_env = env->tb_env; |
640 | 640 |
uint64_t now, next; |
... | ... | |
1151 | 1151 |
return 0; |
1152 | 1152 |
} |
1153 | 1153 |
|
1154 |
|
|
1155 | 1154 |
#if 0 |
1156 | 1155 |
/*****************************************************************************/ |
1157 | 1156 |
/* Handle system reset (for now, just stop emulation) */ |
b/target-ppc/cpu.h | ||
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225 | 225 |
POWERPC_EXCP_SYSCALL_USER = 0x203, /* System call in user mode only */ |
226 | 226 |
}; |
227 | 227 |
|
228 |
|
|
229 | 228 |
/* Exceptions error codes */ |
230 | 229 |
enum { |
231 | 230 |
/* Exception subtypes for POWERPC_EXCP_ALIGN */ |
b/target-ppc/helper.c | ||
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626 | 626 |
tmp = ldl_phys(sr_base + 8); |
627 | 627 |
#if defined(DEBUG_SLB) |
628 | 628 |
if (loglevel != 0) { |
629 |
fprintf(logfile, "%s: seg %d " PADDRX " %016" PRIx64 " %08" PRIx32 "\n",
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|
630 |
__func__, n, sr_base, tmp64, tmp); |
|
629 |
fprintf(logfile, "%s: seg %d " PADDRX " %016" PRIx64 " %08"
|
|
630 |
PRIx32 "\n", __func__, n, sr_base, tmp64, tmp);
|
|
631 | 631 |
} |
632 | 632 |
#endif |
633 | 633 |
if (tmp64 & 0x0000000008000000ULL) { |
... | ... | |
869 | 869 |
} |
870 | 870 |
} |
871 | 871 |
#if defined (DEBUG_MMU) |
872 |
if (loglevel != 0) { |
|
873 |
target_phys_addr_t curaddr; |
|
874 |
uint32_t a0, a1, a2, a3; |
|
872 |
if (loglevel != 0) { |
|
873 |
target_phys_addr_t curaddr; |
|
874 |
uint32_t a0, a1, a2, a3; |
|
875 |
fprintf(logfile, |
|
876 |
"Page table: " PADDRX " len " PADDRX "\n", |
|
877 |
sdr, mask + 0x80); |
|
878 |
for (curaddr = sdr; curaddr < (sdr + mask + 0x80); |
|
879 |
curaddr += 16) { |
|
880 |
a0 = ldl_phys(curaddr); |
|
881 |
a1 = ldl_phys(curaddr + 4); |
|
882 |
a2 = ldl_phys(curaddr + 8); |
|
883 |
a3 = ldl_phys(curaddr + 12); |
|
884 |
if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) { |
|
875 | 885 |
fprintf(logfile, |
876 |
"Page table: " PADDRX " len " PADDRX "\n", |
|
877 |
sdr, mask + 0x80); |
|
878 |
for (curaddr = sdr; curaddr < (sdr + mask + 0x80); |
|
879 |
curaddr += 16) { |
|
880 |
a0 = ldl_phys(curaddr); |
|
881 |
a1 = ldl_phys(curaddr + 4); |
|
882 |
a2 = ldl_phys(curaddr + 8); |
|
883 |
a3 = ldl_phys(curaddr + 12); |
|
884 |
if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) { |
|
885 |
fprintf(logfile, |
|
886 |
PADDRX ": %08x %08x %08x %08x\n", |
|
887 |
curaddr, a0, a1, a2, a3); |
|
888 |
} |
|
889 |
} |
|
886 |
PADDRX ": %08x %08x %08x %08x\n", |
|
887 |
curaddr, a0, a1, a2, a3); |
|
890 | 888 |
} |
889 |
} |
|
890 |
} |
|
891 | 891 |
#endif |
892 | 892 |
} else { |
893 | 893 |
#if defined (DEBUG_MMU) |
... | ... | |
1714 | 1714 |
env->DBAT[1][nr] = value; |
1715 | 1715 |
} |
1716 | 1716 |
|
1717 |
|
|
1718 | 1717 |
/*****************************************************************************/ |
1719 | 1718 |
/* TLB management */ |
1720 | 1719 |
void ppc_tlb_invalidate_all (CPUPPCState *env) |
... | ... | |
1843 | 1842 |
} |
1844 | 1843 |
#endif |
1845 | 1844 |
|
1846 |
|
|
1847 | 1845 |
/*****************************************************************************/ |
1848 | 1846 |
/* Special registers manipulation */ |
1849 | 1847 |
#if defined(TARGET_PPC64) |
b/target-ppc/op.c | ||
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120 | 120 |
#define REG 31 |
121 | 121 |
#include "op_template.h" |
122 | 122 |
|
123 |
|
|
124 | 123 |
void OPPROTO op_print_mem_EA (void) |
125 | 124 |
{ |
126 | 125 |
do_print_mem_EA(T0); |
... | ... | |
1426 | 1425 |
} |
1427 | 1426 |
#endif |
1428 | 1427 |
|
1429 |
|
|
1430 | 1428 |
/* count leading zero */ |
1431 | 1429 |
void OPPROTO op_cntlzw (void) |
1432 | 1430 |
{ |
b/target-ppc/op_mem.h | ||
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482 | 482 |
glue(stl, MEMSUFFIX)(EA, u.u); |
483 | 483 |
} |
484 | 484 |
|
485 |
|
|
486 | 485 |
PPC_STF_OP(fd_le, stfqr); |
487 | 486 |
PPC_STF_OP(fs_le, stfsr); |
488 | 487 |
PPC_STF_OP(fiwx_le, stfiwxr); |
... | ... | |
1079 | 1078 |
_PPC_SPE_LD_OP(name, op) |
1080 | 1079 |
#endif |
1081 | 1080 |
|
1082 |
|
|
1083 | 1081 |
#define _PPC_SPE_ST_OP(name, op) \ |
1084 | 1082 |
void OPPROTO glue(glue(op_spe_st, name), MEMSUFFIX) (void) \ |
1085 | 1083 |
{ \ |
b/target-ppc/translate.c | ||
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6566 | 6566 |
branch_step = 1; |
6567 | 6567 |
else |
6568 | 6568 |
branch_step = 0; |
6569 |
ctx.singlestep_enabled = env->singlestep_enabled || single_step == 1;;
|
|
6569 |
ctx.singlestep_enabled = env->singlestep_enabled || single_step == 1; |
|
6570 | 6570 |
#if defined (DO_SINGLE_STEP) && 0 |
6571 | 6571 |
/* Single step trace mode */ |
6572 | 6572 |
msr_se = 1; |
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