root / hw / etraxfs.c @ b3c7724c
History | View | Annotate | Download (5.5 kB)
1 | 83fa1010 | ths | /*
|
---|---|---|---|
2 | 83fa1010 | ths | * QEMU ETRAX System Emulator
|
3 | 83fa1010 | ths | *
|
4 | 83fa1010 | ths | * Copyright (c) 2007 Edgar E. Iglesias, Axis Communications AB.
|
5 | 83fa1010 | ths | *
|
6 | 83fa1010 | ths | * Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 | 83fa1010 | ths | * of this software and associated documentation files (the "Software"), to deal
|
8 | 83fa1010 | ths | * in the Software without restriction, including without limitation the rights
|
9 | 83fa1010 | ths | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 | 83fa1010 | ths | * copies of the Software, and to permit persons to whom the Software is
|
11 | 83fa1010 | ths | * furnished to do so, subject to the following conditions:
|
12 | 83fa1010 | ths | *
|
13 | 83fa1010 | ths | * The above copyright notice and this permission notice shall be included in
|
14 | 83fa1010 | ths | * all copies or substantial portions of the Software.
|
15 | 83fa1010 | ths | *
|
16 | 83fa1010 | ths | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 | 83fa1010 | ths | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 | 83fa1010 | ths | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 | 83fa1010 | ths | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 | 83fa1010 | ths | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 | 83fa1010 | ths | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 | 83fa1010 | ths | * THE SOFTWARE.
|
23 | 83fa1010 | ths | */
|
24 | 83fa1010 | ths | #include <time.h> |
25 | 83fa1010 | ths | #include <sys/time.h> |
26 | 87ecb68b | pbrook | #include "hw.h" |
27 | 48318011 | edgar_igl | #include "net.h" |
28 | e62b5b13 | edgar_igl | #include "flash.h" |
29 | 48318011 | edgar_igl | #include "sysemu.h" |
30 | 48318011 | edgar_igl | #include "devices.h" |
31 | 87ecb68b | pbrook | #include "boards.h" |
32 | 83fa1010 | ths | |
33 | 5ef98b47 | edgar_igl | #include "etraxfs.h" |
34 | b01cde7b | edgar_igl | |
35 | b01cde7b | edgar_igl | #define FLASH_SIZE 0x2000000 |
36 | b01cde7b | edgar_igl | #define INTMEM_SIZE (128 * 1024) |
37 | 83fa1010 | ths | |
38 | 5439779e | edgar_igl | static uint32_t bootstrap_pc;
|
39 | 5439779e | edgar_igl | |
40 | 5439779e | edgar_igl | static void main_cpu_reset(void *opaque) |
41 | 5439779e | edgar_igl | { |
42 | 5439779e | edgar_igl | CPUState *env = opaque; |
43 | 5439779e | edgar_igl | cpu_reset(env); |
44 | 5439779e | edgar_igl | |
45 | 5439779e | edgar_igl | env->pregs[PR_CCS] &= ~I_FLAG; |
46 | 5439779e | edgar_igl | env->pc = bootstrap_pc; |
47 | 5439779e | edgar_igl | } |
48 | 48318011 | edgar_igl | |
49 | 83fa1010 | ths | static
|
50 | 00f82b8a | aurel32 | void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size, |
51 | b881c2c6 | blueswir1 | const char *boot_device, DisplayState *ds, |
52 | 83fa1010 | ths | const char *kernel_filename, const char *kernel_cmdline, |
53 | 83fa1010 | ths | const char *initrd_filename, const char *cpu_model) |
54 | 83fa1010 | ths | { |
55 | 83fa1010 | ths | CPUState *env; |
56 | 5ef98b47 | edgar_igl | struct etraxfs_pic *pic;
|
57 | fa1bdde4 | edgar_igl | void *etraxfs_dmac;
|
58 | 4eeed608 | edgar_igl | struct etraxfs_dma_client *eth[2] = {NULL, NULL}; |
59 | 83fa1010 | ths | int kernel_size;
|
60 | 48318011 | edgar_igl | int i;
|
61 | e62b5b13 | edgar_igl | ram_addr_t phys_ram; |
62 | 5439779e | edgar_igl | ram_addr_t phys_flash; |
63 | b01cde7b | edgar_igl | ram_addr_t phys_intmem; |
64 | 83fa1010 | ths | |
65 | 83fa1010 | ths | /* init CPUs */
|
66 | 83fa1010 | ths | if (cpu_model == NULL) { |
67 | 83fa1010 | ths | cpu_model = "crisv32";
|
68 | 83fa1010 | ths | } |
69 | aaed909a | bellard | env = cpu_init(cpu_model); |
70 | 83fa1010 | ths | qemu_register_reset(main_cpu_reset, env); |
71 | 83fa1010 | ths | |
72 | 83fa1010 | ths | /* allocate RAM */
|
73 | e62b5b13 | edgar_igl | phys_ram = qemu_ram_alloc(ram_size); |
74 | e62b5b13 | edgar_igl | cpu_register_physical_memory(0x40000000, ram_size, phys_ram | IO_MEM_RAM);
|
75 | e62b5b13 | edgar_igl | /* Unached mapping. */
|
76 | e62b5b13 | edgar_igl | cpu_register_physical_memory(0xc0000000, ram_size, phys_ram | IO_MEM_RAM);
|
77 | e62b5b13 | edgar_igl | |
78 | b01cde7b | edgar_igl | /* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the
|
79 | b01cde7b | edgar_igl | internal memory. Cached and uncached mappings. */
|
80 | b01cde7b | edgar_igl | phys_intmem = qemu_ram_alloc(INTMEM_SIZE); |
81 | 5439779e | edgar_igl | cpu_register_physical_memory(0xb8000000, INTMEM_SIZE,
|
82 | 5439779e | edgar_igl | phys_intmem | IO_MEM_RAM); |
83 | 5439779e | edgar_igl | cpu_register_physical_memory(0x38000000, INTMEM_SIZE,
|
84 | 5439779e | edgar_igl | phys_intmem | IO_MEM_RAM); |
85 | 5439779e | edgar_igl | |
86 | e62b5b13 | edgar_igl | |
87 | 5439779e | edgar_igl | phys_flash = qemu_ram_alloc(FLASH_SIZE); |
88 | 5439779e | edgar_igl | i = drive_get_index(IF_PFLASH, 0, 0); |
89 | 5439779e | edgar_igl | pflash_cfi02_register(0x80000000, phys_flash,
|
90 | 5439779e | edgar_igl | drives_table[i].bdrv, (64 * 1024), |
91 | 5439779e | edgar_igl | FLASH_SIZE >> 16,
|
92 | 5439779e | edgar_igl | 1, 2, 0x0000, 0x0000, 0x0000, 0x0000, |
93 | 5439779e | edgar_igl | 0x555, 0x2aa); |
94 | 5439779e | edgar_igl | pflash_cfi02_register(0x0, phys_flash,
|
95 | 5439779e | edgar_igl | drives_table[i].bdrv, (64 * 1024), |
96 | 5439779e | edgar_igl | FLASH_SIZE >> 16,
|
97 | 5439779e | edgar_igl | 1, 2, 0x0000, 0x0000, 0x0000, 0x0000, |
98 | 5439779e | edgar_igl | 0x555, 0x2aa); |
99 | e62b5b13 | edgar_igl | pic = etraxfs_pic_init(env, 0xb001c000);
|
100 | 48318011 | edgar_igl | etraxfs_dmac = etraxfs_dmac_init(env, 0xb0000000, 10); |
101 | 48318011 | edgar_igl | for (i = 0; i < 10; i++) { |
102 | 5439779e | edgar_igl | /* On ETRAX, odd numbered channels are inputs. */
|
103 | 5ef98b47 | edgar_igl | etraxfs_dmac_connect(etraxfs_dmac, i, pic->irq + 7 + i, i & 1); |
104 | 48318011 | edgar_igl | } |
105 | 48318011 | edgar_igl | |
106 | 4eeed608 | edgar_igl | /* Add the two ethernet blocks. */
|
107 | 5ef98b47 | edgar_igl | eth[0] = etraxfs_eth_init(&nd_table[0], env, pic->irq + 25, 0xb0034000); |
108 | 3ce7a69f | edgar_igl | if (nb_nics > 1) |
109 | 5ef98b47 | edgar_igl | eth[1] = etraxfs_eth_init(&nd_table[1], env, pic->irq + 26, 0xb0036000); |
110 | 5439779e | edgar_igl | |
111 | 48318011 | edgar_igl | /* The DMA Connector block is missing, hardwire things for now. */
|
112 | 4eeed608 | edgar_igl | etraxfs_dmac_connect_client(etraxfs_dmac, 0, eth[0]); |
113 | 4eeed608 | edgar_igl | etraxfs_dmac_connect_client(etraxfs_dmac, 1, eth[0] + 1); |
114 | 4eeed608 | edgar_igl | if (eth[1]) { |
115 | 5439779e | edgar_igl | etraxfs_dmac_connect_client(etraxfs_dmac, 6, eth[1]); |
116 | 5439779e | edgar_igl | etraxfs_dmac_connect_client(etraxfs_dmac, 7, eth[1] + 1); |
117 | 4eeed608 | edgar_igl | } |
118 | 48318011 | edgar_igl | |
119 | ca87d03b | edgar_igl | /* 2 timers. */
|
120 | 5ef98b47 | edgar_igl | etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0xb001e000); |
121 | 5ef98b47 | edgar_igl | etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0xb005e000); |
122 | 48318011 | edgar_igl | |
123 | 48318011 | edgar_igl | for (i = 0; i < 4; i++) { |
124 | 5439779e | edgar_igl | if (serial_hds[i]) {
|
125 | 5ef98b47 | edgar_igl | etraxfs_ser_init(env, pic->irq + 0x14 + i,
|
126 | 5439779e | edgar_igl | serial_hds[i], 0xb0026000 + i * 0x2000); |
127 | 5439779e | edgar_igl | } |
128 | 48318011 | edgar_igl | } |
129 | 83fa1010 | ths | |
130 | 5439779e | edgar_igl | if (kernel_filename) {
|
131 | fa1bdde4 | edgar_igl | uint64_t entry; |
132 | 5439779e | edgar_igl | /* Boots a kernel elf binary, os/linux-2.6/vmlinux from the axis
|
133 | 5439779e | edgar_igl | devboard SDK. */
|
134 | 5439779e | edgar_igl | kernel_size = load_elf(kernel_filename, 0,
|
135 | fa1bdde4 | edgar_igl | &entry, NULL, NULL); |
136 | fa1bdde4 | edgar_igl | bootstrap_pc = entry; |
137 | fa1bdde4 | edgar_igl | if (kernel_size < 0) { |
138 | fa1bdde4 | edgar_igl | /* Takes a kimage from the axis devboard SDK. */
|
139 | fa1bdde4 | edgar_igl | kernel_size = load_image(kernel_filename, phys_ram_base + 0x4000);
|
140 | fa1bdde4 | edgar_igl | bootstrap_pc = 0x40004000;
|
141 | fa1bdde4 | edgar_igl | /* magic for boot. */
|
142 | fa1bdde4 | edgar_igl | env->regs[8] = 0x56902387; |
143 | fa1bdde4 | edgar_igl | env->regs[9] = 0x40004000 + kernel_size; |
144 | fa1bdde4 | edgar_igl | } |
145 | 83fa1010 | ths | } |
146 | 5439779e | edgar_igl | env->pc = bootstrap_pc; |
147 | 83fa1010 | ths | |
148 | 83fa1010 | ths | printf ("pc =%x\n", env->pc);
|
149 | 48318011 | edgar_igl | printf ("ram size =%ld\n", ram_size);
|
150 | 83fa1010 | ths | } |
151 | 83fa1010 | ths | |
152 | 83fa1010 | ths | QEMUMachine bareetraxfs_machine = { |
153 | 83fa1010 | ths | "bareetraxfs",
|
154 | 83fa1010 | ths | "Bare ETRAX FS board",
|
155 | 83fa1010 | ths | bareetraxfs_init, |
156 | 5439779e | edgar_igl | 0x8000000,
|
157 | 83fa1010 | ths | }; |