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/*
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 * QEMU/mipssim emulation
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 *
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 * Emulates a very simple machine model similiar to the one use by the
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 * proprietary MIPS emulator.
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 * 
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 * Copyright (c) 2007 Thiemo Seufer
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include "hw.h"
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#include "mips.h"
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#include "pc.h"
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#include "isa.h"
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#include "net.h"
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#include "sysemu.h"
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#include "boards.h"
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#ifdef TARGET_WORDS_BIGENDIAN
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#define BIOS_FILENAME "mips_bios.bin"
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#else
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#define BIOS_FILENAME "mipsel_bios.bin"
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#endif
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#ifdef TARGET_MIPS64
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#define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffULL)
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#else
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#define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffU)
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#endif
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#define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
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static struct _loaderparams {
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    int ram_size;
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    const char *kernel_filename;
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    const char *kernel_cmdline;
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    const char *initrd_filename;
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} loaderparams;
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static void load_kernel (CPUState *env)
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{
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    int64_t entry, kernel_low, kernel_high;
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    long kernel_size;
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    long initrd_size;
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    ram_addr_t initrd_offset;
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    kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND,
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                           &entry, &kernel_low, &kernel_high);
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    if (kernel_size >= 0) {
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        if ((entry & ~0x7fffffffULL) == 0x80000000)
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            entry = (int32_t)entry;
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        env->active_tc.PC = entry;
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    } else {
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        fprintf(stderr, "qemu: could not load kernel '%s'\n",
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                loaderparams.kernel_filename);
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        exit(1);
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    }
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    /* load initrd */
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    initrd_size = 0;
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    initrd_offset = 0;
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    if (loaderparams.initrd_filename) {
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        initrd_size = get_image_size (loaderparams.initrd_filename);
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        if (initrd_size > 0) {
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            initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
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            if (initrd_offset + initrd_size > loaderparams.ram_size) {
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                fprintf(stderr,
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                        "qemu: memory too small for initial ram disk '%s'\n",
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                        loaderparams.initrd_filename);
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                exit(1);
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            }
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            initrd_size = load_image(loaderparams.initrd_filename,
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                                     phys_ram_base + initrd_offset);
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        }
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        if (initrd_size == (target_ulong) -1) {
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            fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
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                    loaderparams.initrd_filename);
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            exit(1);
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        }
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    }
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}
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static void main_cpu_reset(void *opaque)
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{
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    CPUState *env = opaque;
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    cpu_reset(env);
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    if (loaderparams.kernel_filename)
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        load_kernel (env);
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}
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static void
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mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size,
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                   const char *boot_device, DisplayState *ds,
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                   const char *kernel_filename, const char *kernel_cmdline,
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                   const char *initrd_filename, const char *cpu_model)
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{
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    char buf[1024];
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    unsigned long bios_offset;
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    CPUState *env;
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    int bios_size;
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    /* Init CPUs. */
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    if (cpu_model == NULL) {
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#ifdef TARGET_MIPS64
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        cpu_model = "5Kf";
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#else
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        cpu_model = "24Kf";
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#endif
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    }
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    env = cpu_init(cpu_model);
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    if (!env) {
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        fprintf(stderr, "Unable to find CPU definition\n");
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        exit(1);
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    }
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    qemu_register_reset(main_cpu_reset, env);
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    /* Allocate RAM. */
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    cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
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    /* Load a BIOS / boot exception handler image. */
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    bios_offset = ram_size + vga_ram_size;
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    if (bios_name == NULL)
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        bios_name = BIOS_FILENAME;
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    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
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    bios_size = load_image(buf, phys_ram_base + bios_offset);
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    if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
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        /* Bail out if we have neither a kernel image nor boot vector code. */
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        fprintf(stderr,
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                "qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n",
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                buf);
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        exit(1);
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    } else {
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        /* Map the BIOS / boot exception handler. */
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        cpu_register_physical_memory(0x1fc00000LL,
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                                     bios_size, bios_offset | IO_MEM_ROM);
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        /* We have a boot vector start address. */
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        env->active_tc.PC = (target_long)(int32_t)0xbfc00000;
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    }
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    if (kernel_filename) {
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        loaderparams.ram_size = ram_size;
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        loaderparams.kernel_filename = kernel_filename;
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        loaderparams.kernel_cmdline = kernel_cmdline;
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        loaderparams.initrd_filename = initrd_filename;
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        load_kernel(env);
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    }
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    /* Init CPU internal devices. */
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    cpu_mips_irq_init_cpu(env);
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    cpu_mips_clock_init(env);
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    cpu_mips_irqctrl_init();
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    /* Register 64 KB of ISA IO space at 0x1fd00000. */
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    isa_mmio_init(0x1fd00000, 0x00010000);
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    /* A single 16450 sits at offset 0x3f8. It is attached to
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       MIPS CPU INT2, which is interrupt 4. */
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    if (serial_hds[0])
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        serial_init(0x3f8, env->irq[4], 115200, serial_hds[0]);
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    if (nd_table[0].vlan) {
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        if (nd_table[0].model == NULL
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            || strcmp(nd_table[0].model, "mipsnet") == 0) {
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            /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
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            mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
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        } else if (strcmp(nd_table[0].model, "?") == 0) {
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            fprintf(stderr, "qemu: Supported NICs: mipsnet\n");
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            exit (1);
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        } else {
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            fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
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            exit (1);
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        }
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    }
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}
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QEMUMachine mips_mipssim_machine = {
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    "mipssim",
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    "MIPS MIPSsim platform",
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    mips_mipssim_init,
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    BIOS_SIZE + VGA_RAM_SIZE /* unused */,
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};