Revision b4095fed target-ppc/cpu.h
b/target-ppc/cpu.h | ||
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104 | 104 |
POWERPC_MMU_SOFT_4xx, |
105 | 105 |
/* PowerPC 4xx MMU with software TLB and zones protections */ |
106 | 106 |
POWERPC_MMU_SOFT_4xx_Z, |
107 |
/* PowerPC 4xx MMU in real mode only */ |
|
108 |
POWERPC_MMU_REAL_4xx, |
|
107 |
/* PowerPC MMU in real mode only */ |
|
108 |
POWERPC_MMU_REAL, |
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109 |
/* Freescale MPC8xx MMU model */ |
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110 |
POWERPC_MMU_MPC8xx, |
|
109 | 111 |
/* BookE MMU model */ |
110 | 112 |
POWERPC_MMU_BOOKE, |
111 | 113 |
/* BookE FSL MMU model */ |
... | ... | |
171 | 173 |
POWERPC_EXCP_DECR = 10, /* Decrementer exception */ |
172 | 174 |
POWERPC_EXCP_FIT = 11, /* Fixed-interval timer interrupt */ |
173 | 175 |
POWERPC_EXCP_WDT = 12, /* Watchdog timer interrupt */ |
174 |
POWERPC_EXCP_DTLB = 13, /* Data TLB error */
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175 |
POWERPC_EXCP_ITLB = 14, /* Instruction TLB error */
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|
176 |
POWERPC_EXCP_DTLB = 13, /* Data TLB miss */
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177 |
POWERPC_EXCP_ITLB = 14, /* Instruction TLB miss */
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|
176 | 178 |
POWERPC_EXCP_DEBUG = 15, /* Debug interrupt */ |
177 | 179 |
/* Vectors 16 to 31 are reserved */ |
178 | 180 |
POWERPC_EXCP_SPEU = 32, /* SPE/embedded floating-point unavailable */ |
... | ... | |
201 | 203 |
/* 602 specific exceptions */ |
202 | 204 |
POWERPC_EXCP_EMUL = 77, /* Emulation trap exception */ |
203 | 205 |
/* 602/603 specific exceptions */ |
204 |
POWERPC_EXCP_IFTLB = 78, /* Instruction fetch TLB error */
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|
206 |
POWERPC_EXCP_IFTLB = 78, /* Instruction fetch TLB miss */
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|
205 | 207 |
POWERPC_EXCP_DLTLB = 79, /* Data load TLB miss */ |
206 | 208 |
POWERPC_EXCP_DSTLB = 80, /* Data store TLB miss */ |
207 | 209 |
/* Exceptions available on most PowerPC */ |
208 | 210 |
POWERPC_EXCP_FPA = 81, /* Floating-point assist exception */ |
209 |
POWERPC_EXCP_IABR = 82, /* Instruction address breakpoint */ |
|
210 |
POWERPC_EXCP_SMI = 83, /* System management interrupt */ |
|
211 |
POWERPC_EXCP_PERFM = 84, /* Embedded performance monitor interrupt */ |
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211 |
POWERPC_EXCP_DABR = 82, /* Data address breakpoint */ |
|
212 |
POWERPC_EXCP_IABR = 83, /* Instruction address breakpoint */ |
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213 |
POWERPC_EXCP_SMI = 84, /* System management interrupt */ |
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214 |
POWERPC_EXCP_PERFM = 85, /* Embedded performance monitor interrupt */ |
|
212 | 215 |
/* 7xx/74xx specific exceptions */ |
213 |
POWERPC_EXCP_THERM = 85, /* Thermal interrupt */
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|
216 |
POWERPC_EXCP_THERM = 86, /* Thermal interrupt */
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|
214 | 217 |
/* 74xx specific exceptions */ |
215 |
POWERPC_EXCP_VPUA = 86, /* Vector assist exception */
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218 |
POWERPC_EXCP_VPUA = 87, /* Vector assist exception */
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|
216 | 219 |
/* 970FX specific exceptions */ |
217 |
POWERPC_EXCP_SOFTP = 87, /* Soft patch exception */ |
|
218 |
POWERPC_EXCP_MAINT = 88, /* Maintenance exception */ |
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220 |
POWERPC_EXCP_SOFTP = 88, /* Soft patch exception */ |
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221 |
POWERPC_EXCP_MAINT = 89, /* Maintenance exception */ |
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222 |
/* Freescale embeded cores specific exceptions */ |
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223 |
POWERPC_EXCP_MEXTBR = 90, /* Maskable external breakpoint */ |
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224 |
POWERPC_EXCP_NMEXTBR = 91, /* Non maskable external breakpoint */ |
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225 |
POWERPC_EXCP_ITLBE = 92, /* Instruction TLB error */ |
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226 |
POWERPC_EXCP_DTLBE = 93, /* Data TLB error */ |
|
219 | 227 |
/* EOL */ |
220 | 228 |
POWERPC_EXCP_NB = 96, |
221 | 229 |
/* Qemu exceptions: used internally during code translation */ |
... | ... | |
280 | 288 |
PPC_FLAGS_INPUT_970, |
281 | 289 |
/* PowerPC 401 bus */ |
282 | 290 |
PPC_FLAGS_INPUT_401, |
291 |
/* Freescale RCPU bus */ |
|
292 |
PPC_FLAGS_INPUT_RCPU, |
|
283 | 293 |
}; |
284 | 294 |
|
285 | 295 |
#define PPC_INPUT(env) (env->bus_model) |
... | ... | |
1259 | 1269 |
PPC40x_INPUT_NB, |
1260 | 1270 |
}; |
1261 | 1271 |
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1272 |
enum { |
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1273 |
/* RCPU input pins */ |
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1274 |
PPCRCPU_INPUT_PORESET = 0, |
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1275 |
PPCRCPU_INPUT_HRESET = 1, |
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1276 |
PPCRCPU_INPUT_SRESET = 2, |
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1277 |
PPCRCPU_INPUT_IRQ0 = 3, |
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1278 |
PPCRCPU_INPUT_IRQ1 = 4, |
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1279 |
PPCRCPU_INPUT_IRQ2 = 5, |
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1280 |
PPCRCPU_INPUT_IRQ3 = 6, |
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1281 |
PPCRCPU_INPUT_IRQ4 = 7, |
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1282 |
PPCRCPU_INPUT_IRQ5 = 8, |
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1283 |
PPCRCPU_INPUT_IRQ6 = 9, |
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1284 |
PPCRCPU_INPUT_IRQ7 = 10, |
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1285 |
PPCRCPU_INPUT_NB, |
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1286 |
}; |
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1287 |
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1262 | 1288 |
#if defined(TARGET_PPC64) |
1263 | 1289 |
enum { |
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/* PowerPC 970 input pins */ |
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