Revision b41a2cd1 hw/pc.c

b/hw/pc.c
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#include "cpu.h"
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#include "vl.h"
45 45

  
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/* output Bochs bios info messages */
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//#define DEBUG_BIOS
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#define BIOS_FILENAME "bios.bin"
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#define VGABIOS_FILENAME "vgabios.bin"
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#define LINUX_BOOT_FILENAME "linux_boot.bin"
......
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int speaker_data_on;
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int dummy_refresh_clock;
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static void ioport80_write(CPUState *env, uint32_t addr, uint32_t data)
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static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
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{
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}
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......
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{
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    RTCState *s = &rtc_state;
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    int val;
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    int fd0, fd1, nb;
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    /* various important CMOS locations needed by PC/Bochs bios */
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......
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        s->cmos_data[0x3d] = 0x03; /* CD-ROM boot */
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        break;
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    }
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}
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void cmos_register_fd (uint8_t fd0, uint8_t fd1)
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{
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    RTCState *s = &rtc_state;
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    int nb = 0;
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    /* floppy type */
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    fd0 = fdctrl_get_drive_type(0);
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    fd1 = fdctrl_get_drive_type(1);
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    s->cmos_data[0x10] = 0;
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    switch (fd0) {
......
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        s->cmos_data[0x10] |= 0x02;
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        break;
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    }
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    nb = 0;
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    if (fd0 < 3)
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        nb++;
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    if (fd1 < 3)
......
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    }
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}
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void speaker_ioport_write(CPUState *env, uint32_t addr, uint32_t val)
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static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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{
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    speaker_data_on = (val >> 1) & 1;
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    pit_set_gate(&pit_channels[2], val & 1);
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}
159 163

  
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uint32_t speaker_ioport_read(CPUState *env, uint32_t addr)
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static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
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{
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    int out;
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    out = pit_get_out(&pit_channels[2]);
......
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}
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/***********************************************************/
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/* PC floppy disk controler emulation glue */
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#define PC_FDC_DMA  0x2
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#define PC_FDC_IRQ  0x6
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#define PC_FDC_BASE 0x3F0
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static void fdctrl_register (unsigned char **disknames, int ro,
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                             char boot_device)
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{
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    int i;
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    fdctrl_init(PC_FDC_IRQ, PC_FDC_DMA, 0, PC_FDC_BASE, boot_device);
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    for (i = 0; i < MAX_FD; i++) {
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        if (disknames[i] != NULL)
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            fdctrl_disk_change(i, disknames[i], ro);
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    }
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}
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/***********************************************************/
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/* Bochs BIOS debug ports */
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void bochs_bios_write(CPUX86State *env, uint32_t addr, uint32_t val)
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void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
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{
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    switch(addr) {
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        /* Bochs BIOS messages */
......
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219 205
void bochs_bios_init(void)
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{
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    register_ioport_write(0x400, 1, bochs_bios_write, 2);
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    register_ioport_write(0x401, 1, bochs_bios_write, 2);
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    register_ioport_write(0x402, 1, bochs_bios_write, 1);
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    register_ioport_write(0x403, 1, bochs_bios_write, 1);
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    register_ioport_write(0x501, 1, bochs_bios_write, 2);
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    register_ioport_write(0x502, 1, bochs_bios_write, 2);
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    register_ioport_write(0x500, 1, bochs_bios_write, 1);
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    register_ioport_write(0x503, 1, bochs_bios_write, 1);
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    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
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    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
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    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
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    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
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    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
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    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
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    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
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    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
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}
231 217

  
232 218

  
......
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    return -1;
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}
263 249

  
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static const int ide_iobase[2] = { 0x1f0, 0x170 };
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static const int ide_iobase2[2] = { 0x3f6, 0x376 };
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static const int ide_irq[2] = { 14, 15 };
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#define NE2000_NB_MAX 6
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static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
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static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
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/* PC hardware initialisation */
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void pc_init(int ram_size, int vga_ram_size, int boot_device,
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             DisplayState *ds, const char **fd_filename, int snapshot,
......
268 263
             const char *initrd_filename)
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{
270 265
    char buf[1024];
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    int ret, linux_boot, initrd_size;
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    int ret, linux_boot, initrd_size, i, nb_nics1, fd;
272 267

  
273 268
    linux_boot = (kernel_filename != NULL);
274 269

  
......
344 339
    }
345 340

  
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    /* init basic PC hardware */
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    register_ioport_write(0x80, 1, ioport80_write, 1);
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    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
348 343

  
349 344
    vga_initialize(ds, phys_ram_base + ram_size, ram_size, 
350 345
                   vga_ram_size);
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352 347
    rtc_init(0x70, 8);
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    cmos_init(ram_size, boot_device);
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    register_ioport_read(0x61, 1, speaker_ioport_read, 1);
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    register_ioport_write(0x61, 1, speaker_ioport_write, 1);
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    register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
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    register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);
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357 351
    pic_init();
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    pit_init();
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    serial_init(0x3f8, 4);
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    ne2000_init(0x300, 9);
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    ide_init();
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    pit_init(0x40);
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    fd = serial_open_device();
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    serial_init(0x3f8, 4, fd);
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    nb_nics1 = nb_nics;
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    if (nb_nics1 > NE2000_NB_MAX)
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        nb_nics1 = NE2000_NB_MAX;
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    for(i = 0; i < nb_nics1; i++) {
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        ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
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    }
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    for(i = 0; i < 2; i++) {
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        ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
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                 bs_table[2 * i], bs_table[2 * i + 1]);
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    }
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    kbd_init();
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    AUD_init();
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    DMA_init();
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    SB16_init();
366 372

  
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    fdctrl_register((unsigned char **)fd_filename, snapshot, boot_device);
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    fdctrl_init(6, 2, 0, 0x3f0, fd_table);
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    cmos_init(ram_size, boot_device);
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}

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