Revision b48cfdff target-mips/mips-defs.h

b/target-mips/mips-defs.h
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#define TARGET_LONG_BITS 32
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#endif
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/* Strictly follow the architecture standard: Disallow "special"


  		





  
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   instruction handling for PMON/SPIM, force cycle-dependent


  		





  
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   Count/Compare maintenance. */


  		





  
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//#define MIPS_STRICT_STANDARD 1


  		





  
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#endif /* !defined (__QEMU_MIPS_DEFS_H__) */


  		












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