Revision b4bf0a9a hw/pflash_cfi01.c

b/hw/pflash_cfi01.c
72 72
    uint8_t cfi_len;
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    uint8_t cfi_table[0x52];
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    target_phys_addr_t counter;
75
    unsigned int writeblock_size;
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    QEMUTimer *timer;
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    ram_addr_t off;
77 78
    int fl_mem;
......
206 207
    switch (width) {
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    case 1:
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        p[offset] = value;
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        pflash_update(pfl, offset, 1);
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        break;
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    case 2:
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#if defined(TARGET_WORDS_BIGENDIAN)
......
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        p[offset] = value;
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        p[offset + 1] = value >> 8;
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#endif
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        pflash_update(pfl, offset, 2);
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        break;
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    case 4:
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#if defined(TARGET_WORDS_BIGENDIAN)
......
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        p[offset + 2] = value >> 16;
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        p[offset + 3] = value >> 24;
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#endif
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        pflash_update(pfl, offset, 4);
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        break;
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    }
236 234

  
......
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        case 0x40: /* Single Byte Program */
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            DPRINTF("%s: Single Byte Program\n", __func__);
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            pflash_data_write(pfl, offset, value, width);
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            pflash_update(pfl, offset, width);
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            pfl->status |= 0x80; /* Ready! */
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            pfl->wcycle = 0;
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        break;
......
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            pfl->status |= 0x80;
360 359

  
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            if (!pfl->counter) {
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                target_phys_addr_t mask = pfl->writeblock_size - 1;
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                mask = ~mask;
363

  
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                DPRINTF("%s: block write finished\n", __func__);
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                pfl->wcycle++;
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                /* Flush the entire write buffer onto backing storage.  */
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                pflash_update(pfl, offset & mask, pfl->writeblock_size);
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            }
365 369

  
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            pfl->counter--;
......
606 610
    } else {
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        pfl->cfi_table[0x2A] = 0x0B;
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    }
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    pfl->writeblock_size = 1 << pfl->cfi_table[0x2A];
614

  
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    pfl->cfi_table[0x2B] = 0x00;
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    /* Number of erase block regions (uniform) */
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    pfl->cfi_table[0x2C] = 0x01;

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