Revision b584726d hw/mips_jazz.c

b/hw/mips_jazz.c
142 142
    qemu_irq esp_reset;
143 143
    ram_addr_t ram_offset;
144 144
    ram_addr_t bios_offset;
145
    ram_addr_t vga_ram_offset;
146 145

  
147 146
    /* init CPUs */
148 147
    if (cpu_model == NULL) {
......
164 163
    ram_offset = qemu_ram_alloc(ram_size);
165 164
    cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
166 165

  
167
    vga_ram_offset = qemu_ram_alloc(vga_ram_size);
168 166
    bios_offset = qemu_ram_alloc(MAGNUM_BIOS_SIZE);
169 167
    cpu_register_physical_memory(0x1fc00000LL,
170 168
                                 MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
......
205 203
    /* Video card */
206 204
    switch (jazz_model) {
207 205
    case JAZZ_MAGNUM:
208
        g364fb_mm_init(phys_ram_base + vga_ram_offset, ram_size, vga_ram_size,
209
                        0x40000000, 0x60000000, 0, rc4030[3]);
206
        g364fb_mm_init(vga_ram_size, 0x40000000, 0x60000000, 0, rc4030[3]);
210 207
        break;
211 208
    case JAZZ_PICA61:
212
        isa_vga_mm_init(phys_ram_base + vga_ram_offset, ram_size, vga_ram_size,
213
                        0x40000000, 0x60000000, 0);
209
        isa_vga_mm_init(vga_ram_size, 0x40000000, 0x60000000, 0);
214 210
        break;
215 211
    default:
216 212
        break;

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