Revision b584726d hw/vga.c
| b/hw/vga.c | ||
|---|---|---|
| 2266 | 2266 |
vga_dirty_log_start(s); |
| 2267 | 2267 |
} |
| 2268 | 2268 |
|
| 2269 |
void vga_common_init(VGAState *s, uint8_t *vga_ram_base, |
|
| 2270 |
ram_addr_t vga_ram_offset, int vga_ram_size) |
|
| 2269 |
void vga_common_init(VGAState *s, int vga_ram_size) |
|
| 2271 | 2270 |
{
|
| 2272 | 2271 |
int i, j, v, b; |
| 2273 | 2272 |
|
| ... | ... | |
| 2294 | 2293 |
expand4to8[i] = v; |
| 2295 | 2294 |
} |
| 2296 | 2295 |
|
| 2297 |
s->vram_ptr = vga_ram_base;
|
|
| 2298 |
s->vram_offset = vga_ram_offset;
|
|
| 2296 |
s->vram_offset = qemu_ram_alloc(vga_ram_size);
|
|
| 2297 |
s->vram_ptr = qemu_get_ram_ptr(s->vram_offset);
|
|
| 2299 | 2298 |
s->vram_size = vga_ram_size; |
| 2300 | 2299 |
s->get_bpp = vga_get_bpp; |
| 2301 | 2300 |
s->get_offsets = vga_get_offsets; |
| ... | ... | |
| 2445 | 2444 |
qemu_register_coalesced_mmio(vram_base + 0x000a0000, 0x20000); |
| 2446 | 2445 |
} |
| 2447 | 2446 |
|
| 2448 |
int isa_vga_init(uint8_t *vga_ram_base, |
|
| 2449 |
unsigned long vga_ram_offset, int vga_ram_size) |
|
| 2447 |
int isa_vga_init(int vga_ram_size) |
|
| 2450 | 2448 |
{
|
| 2451 | 2449 |
VGAState *s; |
| 2452 | 2450 |
|
| 2453 | 2451 |
s = qemu_mallocz(sizeof(VGAState)); |
| 2454 | 2452 |
|
| 2455 |
vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
|
|
| 2453 |
vga_common_init(s, vga_ram_size); |
|
| 2456 | 2454 |
vga_init(s); |
| 2457 | 2455 |
|
| 2458 | 2456 |
s->ds = graphic_console_init(s->update, s->invalidate, |
| ... | ... | |
| 2461 | 2459 |
#ifdef CONFIG_BOCHS_VBE |
| 2462 | 2460 |
/* XXX: use optimized standard vga accesses */ |
| 2463 | 2461 |
cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS, |
| 2464 |
vga_ram_size, vga_ram_offset);
|
|
| 2462 |
vga_ram_size, s->vram_offset);
|
|
| 2465 | 2463 |
#endif |
| 2466 | 2464 |
return 0; |
| 2467 | 2465 |
} |
| 2468 | 2466 |
|
| 2469 |
int isa_vga_mm_init(uint8_t *vga_ram_base, |
|
| 2470 |
unsigned long vga_ram_offset, int vga_ram_size, |
|
| 2471 |
target_phys_addr_t vram_base, target_phys_addr_t ctrl_base, |
|
| 2472 |
int it_shift) |
|
| 2467 |
int isa_vga_mm_init(int vga_ram_size, target_phys_addr_t vram_base, |
|
| 2468 |
target_phys_addr_t ctrl_base, int it_shift) |
|
| 2473 | 2469 |
{
|
| 2474 | 2470 |
VGAState *s; |
| 2475 | 2471 |
|
| 2476 | 2472 |
s = qemu_mallocz(sizeof(VGAState)); |
| 2477 | 2473 |
|
| 2478 |
vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
|
|
| 2474 |
vga_common_init(s, vga_ram_size); |
|
| 2479 | 2475 |
vga_mm_init(s, vram_base, ctrl_base, it_shift); |
| 2480 | 2476 |
|
| 2481 | 2477 |
s->ds = graphic_console_init(s->update, s->invalidate, |
| ... | ... | |
| 2484 | 2480 |
#ifdef CONFIG_BOCHS_VBE |
| 2485 | 2481 |
/* XXX: use optimized standard vga accesses */ |
| 2486 | 2482 |
cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS, |
| 2487 |
vga_ram_size, vga_ram_offset);
|
|
| 2483 |
vga_ram_size, s->vram_offset);
|
|
| 2488 | 2484 |
#endif |
| 2489 | 2485 |
return 0; |
| 2490 | 2486 |
} |
| ... | ... | |
| 2500 | 2496 |
vga_dirty_log_start(s); |
| 2501 | 2497 |
} |
| 2502 | 2498 |
|
| 2503 |
int pci_vga_init(PCIBus *bus, uint8_t *vga_ram_base, |
|
| 2504 |
unsigned long vga_ram_offset, int vga_ram_size, |
|
| 2499 |
int pci_vga_init(PCIBus *bus, int vga_ram_size, |
|
| 2505 | 2500 |
unsigned long vga_bios_offset, int vga_bios_size) |
| 2506 | 2501 |
{
|
| 2507 | 2502 |
PCIVGAState *d; |
| ... | ... | |
| 2515 | 2510 |
return -1; |
| 2516 | 2511 |
s = &d->vga_state; |
| 2517 | 2512 |
|
| 2518 |
vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
|
|
| 2513 |
vga_common_init(s, vga_ram_size); |
|
| 2519 | 2514 |
vga_init(s); |
| 2520 | 2515 |
|
| 2521 | 2516 |
s->ds = graphic_console_init(s->update, s->invalidate, |
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