Revision b584726d hw/vmware_vga.c
| b/hw/vmware_vga.c | ||
|---|---|---|
| 59 | 59 |
DisplayState *ds; |
| 60 | 60 |
int vram_size; |
| 61 | 61 |
ram_addr_t vram_offset; |
| 62 |
uint8_t *vram_ptr; |
|
| 62 | 63 |
#endif |
| 63 |
uint8_t *vram; |
|
| 64 | 64 |
target_phys_addr_t vram_base; |
| 65 | 65 |
|
| 66 | 66 |
int index; |
| ... | ... | |
| 326 | 326 |
bypl = s->bypp * s->width; |
| 327 | 327 |
width = s->bypp * w; |
| 328 | 328 |
start = s->bypp * x + bypl * y; |
| 329 |
src = s->vram + start; |
|
| 329 |
src = s->vram_ptr + start;
|
|
| 330 | 330 |
dst = ds_get_data(s->ds) + start; |
| 331 | 331 |
|
| 332 | 332 |
for (; line > 0; line --, src += bypl, dst += bypl) |
| ... | ... | |
| 339 | 339 |
static inline void vmsvga_update_screen(struct vmsvga_state_s *s) |
| 340 | 340 |
{
|
| 341 | 341 |
#ifndef DIRECT_VRAM |
| 342 |
memcpy(ds_get_data(s->ds), s->vram, s->bypp * s->width * s->height); |
|
| 342 |
memcpy(ds_get_data(s->ds), s->vram_ptr, s->bypp * s->width * s->height);
|
|
| 343 | 343 |
#endif |
| 344 | 344 |
|
| 345 | 345 |
dpy_update(s->ds, 0, 0, s->width, s->height); |
| ... | ... | |
| 383 | 383 |
# ifdef DIRECT_VRAM |
| 384 | 384 |
uint8_t *vram = ds_get_data(s->ds); |
| 385 | 385 |
# else |
| 386 |
uint8_t *vram = s->vram; |
|
| 386 |
uint8_t *vram = s->vram_ptr;
|
|
| 387 | 387 |
# endif |
| 388 | 388 |
int bypl = s->bypp * s->width; |
| 389 | 389 |
int width = s->bypp * w; |
| ... | ... | |
| 420 | 420 |
# ifdef DIRECT_VRAM |
| 421 | 421 |
uint8_t *vram = ds_get_data(s->ds); |
| 422 | 422 |
# else |
| 423 |
uint8_t *vram = s->vram; |
|
| 423 |
uint8_t *vram = s->vram_ptr;
|
|
| 424 | 424 |
# endif |
| 425 | 425 |
int bypp = s->bypp; |
| 426 | 426 |
int bypl = bypp * s->width; |
| ... | ... | |
| 801 | 801 |
|
| 802 | 802 |
case SVGA_REG_CONFIG_DONE: |
| 803 | 803 |
if (value) {
|
| 804 |
s->fifo = (uint32_t *) &s->vram[s->vram_size - SVGA_FIFO_SIZE]; |
|
| 804 |
s->fifo = (uint32_t *) &s->vram_ptr[s->vram_size - SVGA_FIFO_SIZE];
|
|
| 805 | 805 |
/* Check range and alignment. */ |
| 806 | 806 |
if ((CMD(min) | CMD(max) | |
| 807 | 807 |
CMD(next_cmd) | CMD(stop)) & 3) |
| ... | ... | |
| 985 | 985 |
|
| 986 | 986 |
if (s->depth == 32) {
|
| 987 | 987 |
DisplaySurface *ds = qemu_create_displaysurface_from(s->width, |
| 988 |
s->height, 32, ds_get_linesize(s->ds), s->vram); |
|
| 988 |
s->height, 32, ds_get_linesize(s->ds), s->vram_ptr);
|
|
| 989 | 989 |
ppm_save(filename, ds); |
| 990 | 990 |
qemu_free(ds); |
| 991 | 991 |
} |
| ... | ... | |
| 1006 | 1006 |
if (addr < s->fb_size) |
| 1007 | 1007 |
return *(uint8_t *) (ds_get_data(s->ds) + addr); |
| 1008 | 1008 |
else |
| 1009 |
return *(uint8_t *) (s->vram + addr); |
|
| 1009 |
return *(uint8_t *) (s->vram_ptr + addr);
|
|
| 1010 | 1010 |
} |
| 1011 | 1011 |
|
| 1012 | 1012 |
static uint32_t vmsvga_vram_readw(void *opaque, target_phys_addr_t addr) |
| ... | ... | |
| 1015 | 1015 |
if (addr < s->fb_size) |
| 1016 | 1016 |
return *(uint16_t *) (ds_get_data(s->ds) + addr); |
| 1017 | 1017 |
else |
| 1018 |
return *(uint16_t *) (s->vram + addr); |
|
| 1018 |
return *(uint16_t *) (s->vram_ptr + addr);
|
|
| 1019 | 1019 |
} |
| 1020 | 1020 |
|
| 1021 | 1021 |
static uint32_t vmsvga_vram_readl(void *opaque, target_phys_addr_t addr) |
| ... | ... | |
| 1024 | 1024 |
if (addr < s->fb_size) |
| 1025 | 1025 |
return *(uint32_t *) (ds_get_data(s->ds) + addr); |
| 1026 | 1026 |
else |
| 1027 |
return *(uint32_t *) (s->vram + addr); |
|
| 1027 |
return *(uint32_t *) (s->vram_ptr + addr);
|
|
| 1028 | 1028 |
} |
| 1029 | 1029 |
|
| 1030 | 1030 |
static void vmsvga_vram_writeb(void *opaque, target_phys_addr_t addr, |
| ... | ... | |
| 1034 | 1034 |
if (addr < s->fb_size) |
| 1035 | 1035 |
*(uint8_t *) (ds_get_data(s->ds) + addr) = value; |
| 1036 | 1036 |
else |
| 1037 |
*(uint8_t *) (s->vram + addr) = value; |
|
| 1037 |
*(uint8_t *) (s->vram_ptr + addr) = value;
|
|
| 1038 | 1038 |
} |
| 1039 | 1039 |
|
| 1040 | 1040 |
static void vmsvga_vram_writew(void *opaque, target_phys_addr_t addr, |
| ... | ... | |
| 1044 | 1044 |
if (addr < s->fb_size) |
| 1045 | 1045 |
*(uint16_t *) (ds_get_data(s->ds) + addr) = value; |
| 1046 | 1046 |
else |
| 1047 |
*(uint16_t *) (s->vram + addr) = value; |
|
| 1047 |
*(uint16_t *) (s->vram_ptr + addr) = value;
|
|
| 1048 | 1048 |
} |
| 1049 | 1049 |
|
| 1050 | 1050 |
static void vmsvga_vram_writel(void *opaque, target_phys_addr_t addr, |
| ... | ... | |
| 1054 | 1054 |
if (addr < s->fb_size) |
| 1055 | 1055 |
*(uint32_t *) (ds_get_data(s->ds) + addr) = value; |
| 1056 | 1056 |
else |
| 1057 |
*(uint32_t *) (s->vram + addr) = value; |
|
| 1057 |
*(uint32_t *) (s->vram_ptr + addr) = value;
|
|
| 1058 | 1058 |
} |
| 1059 | 1059 |
|
| 1060 | 1060 |
static CPUReadMemoryFunc *vmsvga_vram_read[] = {
|
| ... | ... | |
| 1116 | 1116 |
|
| 1117 | 1117 |
s->invalidated = 1; |
| 1118 | 1118 |
if (s->config) |
| 1119 |
s->fifo = (uint32_t *) &s->vram[s->vram_size - SVGA_FIFO_SIZE]; |
|
| 1119 |
s->fifo = (uint32_t *) &s->vram_ptr[s->vram_size - SVGA_FIFO_SIZE];
|
|
| 1120 | 1120 |
|
| 1121 | 1121 |
return 0; |
| 1122 | 1122 |
} |
| 1123 | 1123 |
|
| 1124 |
static void vmsvga_init(struct vmsvga_state_s *s, |
|
| 1125 |
uint8_t *vga_ram_base, unsigned long vga_ram_offset, |
|
| 1126 |
int vga_ram_size) |
|
| 1124 |
static void vmsvga_init(struct vmsvga_state_s *s, int vga_ram_size) |
|
| 1127 | 1125 |
{
|
| 1128 |
s->vram = vga_ram_base; |
|
| 1129 |
s->vram_size = vga_ram_size; |
|
| 1130 |
s->vram_offset = vga_ram_offset; |
|
| 1131 |
|
|
| 1132 | 1126 |
s->scratch_size = SVGA_SCRATCH_SIZE; |
| 1133 | 1127 |
s->scratch = (uint32_t *) qemu_malloc(s->scratch_size * 4); |
| 1134 | 1128 |
|
| 1135 | 1129 |
vmsvga_reset(s); |
| 1136 | 1130 |
|
| 1137 | 1131 |
#ifdef EMBED_STDVGA |
| 1138 |
vga_common_init((VGAState *) s, |
|
| 1139 |
vga_ram_base, vga_ram_offset, vga_ram_size); |
|
| 1132 |
vga_common_init((VGAState *) s, vga_ram_size); |
|
| 1140 | 1133 |
vga_init((VGAState *) s); |
| 1134 |
#else |
|
| 1135 |
s->vram_size = vga_ram_size; |
|
| 1136 |
s->vram_offset = qemu_ram_alloc(vga_ram_size); |
|
| 1137 |
s->vram_ptr = qemu_get_ram_ptr(s->vram_offset); |
|
| 1141 | 1138 |
#endif |
| 1142 | 1139 |
|
| 1143 | 1140 |
s->ds = graphic_console_init(vmsvga_update_display, |
| ... | ... | |
| 1148 | 1145 |
#ifdef CONFIG_BOCHS_VBE |
| 1149 | 1146 |
/* XXX: use optimized standard vga accesses */ |
| 1150 | 1147 |
cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS, |
| 1151 |
vga_ram_size, vga_ram_offset);
|
|
| 1148 |
vga_ram_size, s->vram_offset);
|
|
| 1152 | 1149 |
#endif |
| 1153 | 1150 |
} |
| 1154 | 1151 |
|
| ... | ... | |
| 1215 | 1212 |
|
| 1216 | 1213 |
#define PCI_CLASS_HEADERTYPE_00h 0x00 |
| 1217 | 1214 |
|
| 1218 |
void pci_vmsvga_init(PCIBus *bus, uint8_t *vga_ram_base, |
|
| 1219 |
unsigned long vga_ram_offset, int vga_ram_size) |
|
| 1215 |
void pci_vmsvga_init(PCIBus *bus, int vga_ram_size) |
|
| 1220 | 1216 |
{
|
| 1221 | 1217 |
struct pci_vmsvga_state_s *s; |
| 1222 | 1218 |
|
| ... | ... | |
| 1242 | 1238 |
pci_register_io_region(&s->card, 1, vga_ram_size, |
| 1243 | 1239 |
PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_vmsvga_map_mem); |
| 1244 | 1240 |
|
| 1245 |
vmsvga_init(&s->chip, vga_ram_base, vga_ram_offset, vga_ram_size);
|
|
| 1241 |
vmsvga_init(&s->chip, vga_ram_size); |
|
| 1246 | 1242 |
|
| 1247 | 1243 |
register_savevm("vmware_vga", 0, 0, pci_vmsvga_save, pci_vmsvga_load, s);
|
| 1248 | 1244 |
} |
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