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Revision b5a12aa2

IDb5a12aa204f842c8010ac9d2e4b115114dbf09f0

Added by Blue Swirl over 12 years ago

Merge branch 'rth/vis2' of git://repo.or.cz/qemu/rth

  • 'rth/vis2' of git://repo.or.cz/qemu/rth:
    target-sparc: Implement FALIGNDATA inline.
    target-sparc: Implement BMASK/BSHUFFLE.
    target-sparc: Implement ALIGNADDR* inline.
    target-sparc: Implement EDGE* instructions.
    target-sparc: Implement fpack{16,32,fix}.
    target-sparc: Implement PDIST.
    target-sparc: Do exceptions management fully inside the helpers.
    target-sparc: Change fpr representation to doubles.
    target-sparc: Undo cpu_fpr rename.
    target-sparc: Extract float128 move to a function.
    target-sparc: Extract common code for floating-point operations.
    target-sparc: Make FPU/VIS helpers const when possible.
    target-sparc: Pass float64 parameters instead of dt0/1 temporaries.
    target-sparc: Add accessors for double-precision fpr access.
    target-sparc: Mark fprs dirty in store accessor.
    target-sparc: Add accessors for single-precision fpr access.

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