Revision b5cec4c5 hw/spapr.c
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#include "hw/spapr.h" |
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#include "hw/spapr_vio.h" |
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#include "hw/xics.h" |
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#include <libfdt.h> |
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... | ... | |
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#define TIMEBASE_FREQ 512000000ULL |
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#define MAX_CPUS 32 |
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#define XICS_IRQS 1024 |
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sPAPREnvironment *spapr; |
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... | ... | |
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uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size); |
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uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)}; |
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char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr"; |
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uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)}; |
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int i; |
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char *modelname; |
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int ret; |
... | ... | |
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for (i = 0; i < smp_cpus; i++) { |
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CPUState *env = envs[i]; |
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uint32_t gserver_prop[] = {cpu_to_be32(i), 0}; /* HACK! */ |
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char *nodename; |
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uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), |
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0xffffffff, 0xffffffff}; |
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pft_size_prop, sizeof(pft_size_prop)))); |
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_FDT((fdt_property_string(fdt, "status", "okay"))); |
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_FDT((fdt_property(fdt, "64-bit", NULL, 0))); |
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_FDT((fdt_property_cell(fdt, "ibm,ppc-interrupt-server#s", i))); |
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_FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s", |
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gserver_prop, sizeof(gserver_prop)))); |
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if (envs[i]->mmu_model & POWERPC_MMU_1TSEG) { |
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_FDT((fdt_property(fdt, "ibm,processor-segment-sizes", |
... | ... | |
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_FDT((fdt_end_node(fdt))); |
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/* interrupt controller */ |
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_FDT((fdt_begin_node(fdt, "interrupt-controller@0"))); |
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_FDT((fdt_property_string(fdt, "device_type", |
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"PowerPC-External-Interrupt-Presentation"))); |
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_FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp"))); |
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_FDT((fdt_property_cell(fdt, "reg", 0))); |
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_FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
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_FDT((fdt_property(fdt, "ibm,interrupt-server-ranges", |
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interrupt_server_ranges_prop, |
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sizeof(interrupt_server_ranges_prop)))); |
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_FDT((fdt_end_node(fdt))); |
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/* vdevice */ |
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_FDT((fdt_begin_node(fdt, "vdevice"))); |
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... | ... | |
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_FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice"))); |
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_FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
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_FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
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_FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2))); |
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_FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
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_FDT((fdt_end_node(fdt))); |
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... | ... | |
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} |
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qemu_free(filename); |
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/* Set up Interrupt Controller */ |
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spapr->icp = xics_system_init(smp_cpus, envs, XICS_IRQS); |
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/* Set up VIO bus */ |
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spapr->vio_bus = spapr_vio_bus_init(); |
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for (i = 0; i < MAX_SERIAL_PORTS; i++) { |
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