Revision b5d51029 target-alpha/translate.c

b/target-alpha/translate.c
1793 1793 
                tcg_gen_movi_i64(addr, disp12);
1794 1794 
            switch ((insn >> 12) & 0xF) {
1795 1795 
            case 0x0:
1796 
                /* Longword physical access */
1796 
                /* Longword physical access (hw_ldl/p) */
1797 1797 
                gen_helper_ldl_raw(cpu_ir[ra], addr);
1798 1798 
                break;
1799 1799 
            case 0x1:
1800 
                /* Quadword physical access */
1800 
                /* Quadword physical access (hw_ldq/p) */
1801 1801 
                gen_helper_ldq_raw(cpu_ir[ra], addr);
1802 1802 
                break;
1803 1803 
            case 0x2:
1804 
                /* Longword physical access with lock */
1804 
                /* Longword physical access with lock (hw_ldl_l/p) */
1805 1805 
                gen_helper_ldl_l_raw(cpu_ir[ra], addr);
1806 1806 
                break;
1807 1807 
            case 0x3:
1808 
                /* Quadword physical access with lock */
1808 
                /* Quadword physical access with lock (hw_ldq_l/p) */
1809 1809 
                gen_helper_ldq_l_raw(cpu_ir[ra], addr);
1810 1810 
                break;
1811 1811 
            case 0x4:
1812 
                /* Longword virtual PTE fetch */
1813 
                gen_helper_ldl_kernel(cpu_ir[ra], addr);
1812 
                /* Longword virtual PTE fetch (hw_ldl/v) */
1813 
                tcg_gen_qemu_ld32s(cpu_ir[ra], addr, 0);
1814 1814 
                break;
1815 1815 
            case 0x5:
1816 
                /* Quadword virtual PTE fetch */
1817 
                gen_helper_ldq_kernel(cpu_ir[ra], addr);
1816 
                /* Quadword virtual PTE fetch (hw_ldq/v) */
1817 
                tcg_gen_qemu_ld64(cpu_ir[ra], addr, 0);
1818 1818 
                break;
1819 1819 
            case 0x6:
1820 1820 
                /* Incpu_ir[ra]id */
1821 
                goto incpu_ir[ra]id_opc;
1821 
                goto invalid_opc;
1822 1822 
            case 0x7:
1823 1823 
                /* Incpu_ir[ra]id */
1824 
                goto incpu_ir[ra]id_opc;
1824 
                goto invalid_opc;
1825 1825 
            case 0x8:
1826 
                /* Longword virtual access */
1826 
                /* Longword virtual access (hw_ldl) */
1827 1827 
                gen_helper_st_virt_to_phys(addr, addr);
1828 1828 
                gen_helper_ldl_raw(cpu_ir[ra], addr);
1829 1829 
                break;
1830 1830 
            case 0x9:
1831 
                /* Quadword virtual access */
1831 
                /* Quadword virtual access (hw_ldq) */
1832 1832 
                gen_helper_st_virt_to_phys(addr, addr);
1833 1833 
                gen_helper_ldq_raw(cpu_ir[ra], addr);
1834 1834 
                break;
1835 1835 
            case 0xA:
1836 
                /* Longword virtual access with protection check */
1837 
                tcg_gen_qemu_ld32s(cpu_ir[ra], addr, ctx->flags);
1836 
                /* Longword virtual access with protection check (hw_ldl/w) */
1837 
                tcg_gen_qemu_ld32s(cpu_ir[ra], addr, 0);
1838 1838 
                break;
1839 1839 
            case 0xB:
1840 
                /* Quadword virtual access with protection check */
1841 
                tcg_gen_qemu_ld64(cpu_ir[ra], addr, ctx->flags);
1840 
                /* Quadword virtual access with protection check (hw_ldq/w) */
1841 
                tcg_gen_qemu_ld64(cpu_ir[ra], addr, 0);
1842 1842 
                break;
1843 1843 
            case 0xC:
1844 
                /* Longword virtual access with altenate access mode */
1844 
                /* Longword virtual access with alt access mode (hw_ldl/a)*/
1845 1845 
                gen_helper_set_alt_mode();
1846 1846 
                gen_helper_st_virt_to_phys(addr, addr);
1847 1847 
                gen_helper_ldl_raw(cpu_ir[ra], addr);
1848 1848 
                gen_helper_restore_mode();
1849 1849 
                break;
1850 1850 
            case 0xD:
1851 
                /* Quadword virtual access with altenate access mode */
1851 
                /* Quadword virtual access with alt access mode (hw_ldq/a) */
1852 1852 
                gen_helper_set_alt_mode();
1853 1853 
                gen_helper_st_virt_to_phys(addr, addr);
1854 1854 
                gen_helper_ldq_raw(cpu_ir[ra], addr);
......
1856 1856 
                break;
1857 1857 
            case 0xE:
1858 1858 
                /* Longword virtual access with alternate access mode and
1859 
                 * protection checks
1859 
                 * protection checks (hw_ldl/wa)
1860 1860 
                 */
1861 1861 
                gen_helper_set_alt_mode();
1862 1862 
                gen_helper_ldl_data(cpu_ir[ra], addr);
......
1864 1864 
                break;
1865 1865 
            case 0xF:
1866 1866 
                /* Quadword virtual access with alternate access mode and
1867 
                 * protection checks
1867 
                 * protection checks (hw_ldq/wa)
1868 1868 
                 */
1869 1869 
                gen_helper_set_alt_mode();
1870 1870 
                gen_helper_ldq_data(cpu_ir[ra], addr);

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