Revision b651fc6f
| b/hw/mainstone.c | ||
|---|---|---|
| 149 | 149 |
/* MMC/SD host */ |
| 150 | 150 |
pxa2xx_mmci_handlers(cpu->mmc, NULL, qdev_get_gpio_in(mst_irq, MMC_IRQ)); |
| 151 | 151 |
|
| 152 |
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], |
|
| 153 |
qdev_get_gpio_in(mst_irq, S0_IRQ), |
|
| 154 |
qdev_get_gpio_in(mst_irq, S0_CD_IRQ)); |
|
| 155 |
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], |
|
| 156 |
qdev_get_gpio_in(mst_irq, S1_IRQ), |
|
| 157 |
qdev_get_gpio_in(mst_irq, S1_CD_IRQ)); |
|
| 158 |
|
|
| 152 | 159 |
smc91c111_init(&nd_table[0], MST_ETH_PHYS, |
| 153 | 160 |
qdev_get_gpio_in(mst_irq, ETHERNET_IRQ)); |
| 154 | 161 |
|
| b/hw/mst_fpga.c | ||
|---|---|---|
| 26 | 26 |
#define MST_PCMCIA0 0xe0 |
| 27 | 27 |
#define MST_PCMCIA1 0xe4 |
| 28 | 28 |
|
| 29 |
#define MST_PCMCIAx_READY (1 << 10) |
|
| 30 |
#define MST_PCMCIAx_nCD (1 << 5) |
|
| 31 |
|
|
| 32 |
#define MST_PCMCIA_CD0_IRQ 9 |
|
| 33 |
#define MST_PCMCIA_CD1_IRQ 13 |
|
| 34 |
|
|
| 29 | 35 |
typedef struct mst_irq_state{
|
| 30 | 36 |
SysBusDevice busdev; |
| 31 | 37 |
|
| ... | ... | |
| 57 | 63 |
else |
| 58 | 64 |
s->prev_level &= ~(1u << irq); |
| 59 | 65 |
|
| 66 |
switch(irq) {
|
|
| 67 |
case MST_PCMCIA_CD0_IRQ: |
|
| 68 |
if (level) |
|
| 69 |
s->pcmcia0 &= ~MST_PCMCIAx_nCD; |
|
| 70 |
else |
|
| 71 |
s->pcmcia0 |= MST_PCMCIAx_nCD; |
|
| 72 |
break; |
|
| 73 |
case MST_PCMCIA_CD1_IRQ: |
|
| 74 |
if (level) |
|
| 75 |
s->pcmcia1 &= ~MST_PCMCIAx_nCD; |
|
| 76 |
else |
|
| 77 |
s->pcmcia1 |= MST_PCMCIAx_nCD; |
|
| 78 |
break; |
|
| 79 |
} |
|
| 80 |
|
|
| 60 | 81 |
if ((s->intmskena & (1u << irq)) && level) |
| 61 | 82 |
s->intsetclr |= 1u << irq; |
| 62 | 83 |
|
| ... | ... | |
| 141 | 162 |
s->intsetclr = (value & 0xFEEFF); |
| 142 | 163 |
qemu_set_irq(s->parent, s->intsetclr & s->intmskena); |
| 143 | 164 |
break; |
| 165 |
/* For PCMCIAx allow the to change only power and reset */ |
|
| 144 | 166 |
case MST_PCMCIA0: |
| 145 |
s->pcmcia0 = value;
|
|
| 167 |
s->pcmcia0 = (value & 0x1f) | (s->pcmcia0 & ~0x1f);
|
|
| 146 | 168 |
break; |
| 147 | 169 |
case MST_PCMCIA1: |
| 148 |
s->pcmcia1 = value;
|
|
| 170 |
s->pcmcia1 = (value & 0x1f) | (s->pcmcia1 & ~0x1f);
|
|
| 149 | 171 |
break; |
| 150 | 172 |
default: |
| 151 | 173 |
printf("Mainstone - mst_fpga_writeb: Bad register offset "
|
| ... | ... | |
| 180 | 202 |
|
| 181 | 203 |
s = FROM_SYSBUS(mst_irq_state, dev); |
| 182 | 204 |
|
| 205 |
s->pcmcia0 = MST_PCMCIAx_READY | MST_PCMCIAx_nCD; |
|
| 206 |
s->pcmcia1 = MST_PCMCIAx_READY | MST_PCMCIAx_nCD; |
|
| 207 |
|
|
| 183 | 208 |
sysbus_init_irq(dev, &s->parent); |
| 184 | 209 |
|
| 185 | 210 |
/* alloc the external 16 irqs */ |
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