Revision b6b8bd18 hw/ppc_prep.c
| b/hw/ppc_prep.c | ||
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| 26 | 26 |
//#define HARD_DEBUG_PPC_IO |
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//#define DEBUG_PPC_IO |
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#define KERNEL_LOAD_ADDR 0x01000000; |
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#define INITRD_LOAD_ADDR 0x01800000; |
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#define BIOS_FILENAME "ppc_rom.bin" |
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#define KERNEL_LOAD_ADDR 0x01000000 |
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#define INITRD_LOAD_ADDR 0x01800000 |
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extern int loglevel; |
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extern FILE *logfile; |
| ... | ... | |
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#if defined (HARD_DEBUG_PPC_IO) |
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#define PPC_IO_DPRINTF(fmt, args...) \ |
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do { \
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if (loglevel > 0) { \
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if (loglevel & CPU_LOG_IOPORT) { \
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fprintf(logfile, "%s: " fmt, __func__ , ##args); \ |
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} else { \
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printf("%s : " fmt, __func__ , ##args); \
|
| ... | ... | |
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#elif defined (DEBUG_PPC_IO) |
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#define PPC_IO_DPRINTF(fmt, args...) \ |
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do { \
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if (loglevel > 0) { \
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if (loglevel & CPU_LOG_IOPORT) { \
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fprintf(logfile, "%s: " fmt, __func__ , ##args); \ |
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} \ |
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} while (0) |
| ... | ... | |
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#define PPC_IO_DPRINTF(fmt, args...) do { } while (0)
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#endif |
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#define BIOS_FILENAME "ppc_rom.bin" |
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/* Constants for devices init */ |
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static const int ide_iobase[2] = { 0x1f0, 0x170 };
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static const int ide_iobase2[2] = { 0x3f6, 0x376 };
|
| ... | ... | |
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uint32_t eemck1; |
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/* Error diagnostic */ |
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} XCSR; |
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#endif |
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|
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static void PPC_XCSR_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) |
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{
|
| ... | ... | |
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&PPC_XCSR_readw, |
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&PPC_XCSR_readl, |
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}; |
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#endif |
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|
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/* Fake super-io ports for PREP platform (Intel 82378ZB) */ |
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typedef struct sysctrl_t {
|
| ... | ... | |
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const char *initrd_filename) |
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{
|
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char buf[1024]; |
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// void *openpic; |
|
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m48t59_t *nvram; |
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int PPC_io_memory; |
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int ret, linux_boot, i, nb_nics1, fd; |
| ... | ... | |
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bs_table[2 * i], bs_table[2 * i + 1]); |
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} |
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kbd_init(); |
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DMA_init(); |
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DMA_init(1);
|
|
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// AUD_init(); |
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// SB16_init(); |
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|
| ... | ... | |
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PPC_intack_write, NULL); |
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cpu_register_physical_memory(0xBFFFFFF0, 0x4, PPC_io_memory); |
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/* PowerPC control and status register group */ |
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#if 0 |
|
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PPC_io_memory = cpu_register_io_memory(0, PPC_XCSR_read, PPC_XCSR_write, NULL); |
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cpu_register_physical_memory(0xFEFF0000, 0x1000, PPC_io_memory); |
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#endif |
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nvram = m48t59_init(8, 0x0074, NVRAM_SIZE); |
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nvram = m48t59_init(8, 0, 0x0074, NVRAM_SIZE);
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if (nvram == NULL) |
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return; |
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sysctrl->nvram = nvram; |
| ... | ... | |
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/* Initialise NVRAM */ |
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PPC_NVRAM_set_params(nvram, NVRAM_SIZE, "PREP", ram_size, boot_device, |
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kernel_base, kernel_size, |
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(uint32_t)(long)kernel_cmdline, |
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strlen(kernel_cmdline), |
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kernel_cmdline, |
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initrd_base, initrd_size, |
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/* XXX: need an option to load a NVRAM image */ |
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0 |
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); |
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|
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/* Special port to get debug messages from Open-Firmware */ |
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register_ioport_write(0xFF00, 0x04, 1, &PREP_debug_write, NULL); |
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register_ioport_write(0xFF00, 0x04, 2, &PREP_debug_write, NULL); |
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0, |
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graphic_width, graphic_height, graphic_depth); |
|
| 552 | 548 |
|
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pci_ppc_bios_init(); |
| 554 | 550 |
} |
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