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Name Size
cpu.h 16.8 kB
exec.h 1.6 kB
helper.c 76.5 kB
helpers.h 17.1 kB
iwmmxt_helper.c 24.7 kB
machine.c 6.6 kB
neon_helper.c 51.2 kB
op_addsub.h 1.8 kB
op_helper.c 9.5 kB
translate.c 317.4 kB

Latest revisions

# Date Author Comment
4bd4ee07 02/20/2011 06:43 pm Christophe Lyon

target-arm: Fix rounding constant addition for Neon shifts

Handle cases where adding the rounding constant could overflow in Neon
shift instructions: VRSHR, VRSRA, VQRSHRN, VQRSHRUN, VRSHRN.

Signed-off-by: Christophe Lyon <>
[: fix handling of large shifts in rshl_s32,...
0670a7b6 02/20/2011 06:43 pm Peter Maydell

target-arm: Fix signed VRSHL by large shift counts

Correctly handle VRSHL of signed values by a shift count of the
width of the data type or larger, which must be special-cased in the
rshl_s* helper functions.

Signed-off-by: Peter Maydell <>...
b6c63b98 02/20/2011 06:43 pm Christophe Lyon

target-arm: Fix unsigned VRSHL.s8 and .s16 right shifts by type width

Fix handling of unsigned VRSHL.s8 and .s16 right shifts by the type
width.

Signed-off-by: Christophe Lyon <>
Reviewed-by: Peter Maydell <>...
d68a6f3a 02/20/2011 06:31 pm Peter Maydell

target-arm: Move Neon VZIP to helper functions

Move the implementation of the Neon VUZP unzip instruction from inline
code to helper functions. (At 50+ TCG ops it was well over the
recommended limit for coding inline.) The helper implementations also
give the correct answers where the inline implementation did not....
02acedf9 02/20/2011 06:31 pm Peter Maydell

target-arm: Move Neon VUZP to helper functions

Move the implementation of the Neon VUZP unzip instruction from inline
code to helper functions. (At 50+ TCG ops it was well over the
recommended limit for coding inline.) The helper implementations also
fix the handling of the quadword version of the instruction....
f06053e3 02/20/2011 06:30 pm Juha Riihimäki

target-arm: Correct conversion of Thumb Neon dp encodings into ARM

We handle Thumb Neon data processing instructions by converting them
into the equivalent ARM encoding, as the two are very close. However
the ARM encoding should have bit 28 set, not clear. This wasn't causing...
4dc064e6 02/20/2011 06:28 pm Peter Maydell

target-arm: Fix Neon VQDMLSL instruction

For VQDMLSL, negation has to occur after saturation, not before.

Signed-off-by: Peter Maydell <>
Signed-off-by: Aurelien Jarno <>
ebcd88ce 02/20/2011 06:28 pm Peter Maydell

target-arm: Refactor handling of VQDMULL

Refactor the handling of VQDMULL so that it is dealt with in
its own if() case rather than together with the accumulating
instructions.

Signed-off-by: Peter Maydell <>
Signed-off-by: Aurelien Jarno <>
e5ca24cb 02/20/2011 06:26 pm Peter Maydell

target-arm: Implement VMULL.P8

Implement VMULL.P8 (the 32x32->64 version of the polynomial multiply
instruction).

Signed-off-by: Peter Maydell <>
Signed-off-by: Aurelien Jarno <>
3213883e 02/11/2011 02:10 am Dmitry Eremin-Solenikov

arm: drop unused irq-related part of CPUARMState

These two fields were added as a part of ARMv7 support patch (back in
2007), were never used by any code, so can be dropped.

Signed-off-by: Dmitry Eremin-Solenikov <>
Reviewed-by: Peter Maydell <>...

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