Revision b7bcbe95 target-arm/cpu.h
b/target-arm/cpu.h | ||
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#define EXCP_PREFETCH_ABORT 3 |
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#define EXCP_DATA_ABORT 4 |
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/* We currently assume float and double are IEEE single and double |
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precision respectively. |
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Doing runtime conversions is tricky because VFP registers may contain |
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integer values (eg. as the result of a FTOSI instruction). |
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A double precision register load/store must also load/store the |
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corresponding single precision pair, although it is undefined how |
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these overlap. */ |
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typedef struct CPUARMState { |
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uint32_t regs[16]; |
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uint32_t cpsr; |
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int interrupt_request; |
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struct TranslationBlock *current_tb; |
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int user_mode_only; |
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uint32_t address; |
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/* in order to avoid passing too many arguments to the memory |
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write helpers, we store some rarely used information in the CPU |
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written */ |
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unsigned long mem_write_vaddr; /* target virtual addr at which the |
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memory was written */ |
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/* VFP coprocessor state. */ |
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struct { |
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union { |
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float s[32]; |
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double d[16]; |
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} regs; |
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/* We store these fpcsr fields separately for convenience. */ |
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int vec_len; |
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int vec_stride; |
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uint32_t fpscr; |
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/* Temporary variables if we don't have spare fp regs. */ |
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float tmp0s, tmp1s; |
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double tmp0d, tmp1d; |
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} vfp; |
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/* user data */ |
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void *opaque; |
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} CPUARMState; |
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