root / target-arm / op_helper.c @ b7bcbe95
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/*
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* ARM helper routines
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*
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* Copyright (c) 2005 CodeSourcery, LLC
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <math.h> |
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#include <fenv.h> |
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#include "exec.h" |
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/* If the host doesn't define C99 math intrinsics then use the normal
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operators. This may generate excess exceptions, but it's probably
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near enough for most things. */
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#ifndef isless
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#define isless(x, y) (x < y)
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#endif
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#ifndef isgreater
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#define isgreater(x, y) (x > y)
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#endif
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#ifndef isunordered
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#define isunordered(x, y) (!((x < y) || (x >= y)))
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#endif
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void raise_exception(int tt) |
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{ |
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env->exception_index = tt; |
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cpu_loop_exit(); |
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} |
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/* thread support */
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spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED; |
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void cpu_lock(void) |
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{ |
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spin_lock(&global_cpu_lock); |
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} |
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void cpu_unlock(void) |
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{ |
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spin_unlock(&global_cpu_lock); |
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} |
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/* VFP support. */
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void do_vfp_abss(void) |
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{ |
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FT0s = fabsf(FT0s); |
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} |
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void do_vfp_absd(void) |
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{ |
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FT0d = fabs(FT0d); |
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} |
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void do_vfp_sqrts(void) |
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{ |
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FT0s = sqrtf(FT0s); |
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} |
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void do_vfp_sqrtd(void) |
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{ |
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FT0d = sqrt(FT0d); |
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} |
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/* We use an == operator first to generate teh correct floating point
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exception. Subsequent comparisons use the exception-safe macros. */
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#define DO_VFP_cmp(p) \
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void do_vfp_cmp##p(void) \ |
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{ \ |
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uint32_t flags; \ |
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if (FT0##p == FT1##p) \ |
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flags = 0xc; \
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else if (isless (FT0##p, FT1##p)) \ |
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flags = 0x8; \
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else if (isgreater (FT0##p, FT1##p)) \ |
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flags = 0x2; \
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else /* unordered */ \ |
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flags = 0x3; \
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env->vfp.fpscr = (flags << 28) | (env->vfp.fpscr & 0x0fffffff); \ |
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FORCE_RET(); \ |
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} |
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DO_VFP_cmp(s) |
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DO_VFP_cmp(d) |
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#undef DO_VFP_cmp
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/* We use a > operator first to get FP exceptions right. */
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#define DO_VFP_cmpe(p) \
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void do_vfp_cmpe##p(void) \ |
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{ \ |
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uint32_t flags; \ |
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if (FT0##p > FT1##p) \ |
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flags = 0x2; \
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else if (isless (FT0##p, FT1##p)) \ |
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flags = 0x8; \
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else if (isunordered (FT0##p, FT1##p)) \ |
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flags = 0x3; \
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else /* equal */ \ |
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flags = 0xc; \
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env->vfp.fpscr = (flags << 28) | (env->vfp.fpscr & 0x0fffffff); \ |
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FORCE_RET(); \ |
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} |
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DO_VFP_cmpe(s) |
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DO_VFP_cmpe(d) |
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#undef DO_VFP_cmpe
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/* Convert host exception flags to vfp form. */
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int vfp_exceptbits_from_host(int host_bits) |
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{ |
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int target_bits = 0; |
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#ifdef FE_INVALID
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if (host_bits & FE_INVALID)
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target_bits |= 1;
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#endif
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#ifdef FE_DIVBYZERO
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if (host_bits & FE_DIVBYZERO)
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target_bits |= 2;
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#endif
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#ifdef FE_OVERFLOW
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if (host_bits & FE_OVERFLOW)
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target_bits |= 4;
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#endif
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#ifdef FE_UNDERFLOW
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if (host_bits & FE_UNDERFLOW)
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target_bits |= 8;
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#endif
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#ifdef FE_INEXACT
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if (host_bits & FE_INEXACT)
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target_bits |= 0x10;
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#endif
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/* C doesn't define an inexact exception. */
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return target_bits;
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} |
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/* Convert vfp exception flags to target form. */
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int vfp_host_exceptbits_to_host(int target_bits) |
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{ |
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int host_bits = 0; |
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#ifdef FE_INVALID
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if (target_bits & 1) |
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host_bits |= FE_INVALID; |
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#endif
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#ifdef FE_DIVBYZERO
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if (target_bits & 2) |
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host_bits |= FE_DIVBYZERO; |
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#endif
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#ifdef FE_OVERFLOW
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if (target_bits & 4) |
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host_bits |= FE_OVERFLOW; |
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#endif
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#ifdef FE_UNDERFLOW
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if (target_bits & 8) |
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host_bits |= FE_UNDERFLOW; |
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#endif
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#ifdef FE_INEXACT
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if (target_bits & 0x10) |
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host_bits |= FE_INEXACT; |
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#endif
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return host_bits;
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} |
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void do_vfp_set_fpscr(void) |
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{ |
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int i;
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uint32_t changed; |
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changed = env->vfp.fpscr; |
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env->vfp.fpscr = (T0 & 0xffc8ffff);
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env->vfp.vec_len = (T0 >> 16) & 7; |
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env->vfp.vec_stride = (T0 >> 20) & 3; |
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changed ^= T0; |
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if (changed & (3 << 22)) { |
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i = (T0 >> 22) & 3; |
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switch (i) {
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case 0: |
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i = FE_TONEAREST; |
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break;
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case 1: |
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i = FE_UPWARD; |
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break;
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case 2: |
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i = FE_DOWNWARD; |
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break;
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case 3: |
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i = FE_TOWARDZERO; |
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break;
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} |
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fesetround (i); |
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} |
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/* Clear host exception flags. */
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feclearexcept(FE_ALL_EXCEPT); |
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#ifdef feenableexcept
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if (changed & 0x1f00) { |
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i = vfp_exceptbits_to_host((T0 >> 8) & 0x1f); |
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feenableexcept (i); |
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fedisableexcept (FE_ALL_EXCEPT & ~i); |
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} |
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#endif
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/* XXX: FZ and DN are not implemented. */
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} |
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void do_vfp_get_fpscr(void) |
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{ |
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int i;
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T0 = (env->vfp.fpscr & 0xffc8ffff) | (env->vfp.vec_len << 16) |
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| (env->vfp.vec_stride << 20);
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i = fetestexcept(FE_ALL_EXCEPT); |
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T0 |= vfp_exceptbits_from_host(i); |
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} |