Revision b7f0f463

b/target-i386/helper2.c
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static const char *cc_op_str[] = {
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    "DYNAMIC",
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    "EFLAGS",
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    "MUL",
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    "MULB",
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    "MULW",
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    "MULL",
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    "ADDB",
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    "ADDW",
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    "ADDL",
......
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{
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    a20_state = (a20_state != 0);
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    if (a20_state != a20_enabled) {
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#if defined(DEBUG_MMU)
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        printf("A20 update: a20=%d\n", a20_state);
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#endif
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        /* if the cpu is currently executing code, we must unlink it and
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           all the potentially executing TB */
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        cpu_interrupt(env, 0);
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        /* when a20 is changed, all the MMU mappings are invalid, so
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           we must flush everything */
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        page_unmap();
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        tlb_flush(env);
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        a20_enabled = a20_state;
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        if (a20_enabled)
......
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{
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    int pg_state, pe_state;
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#ifdef DEBUG_MMU
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#if defined(DEBUG_MMU)
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    printf("CR0 update: CR0=0x%08x\n", env->cr[0]);
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#endif
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    pg_state = env->cr[0] & CR0_PG_MASK;
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    if (pg_state != last_pg_state) {
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        page_unmap();
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        tlb_flush(env);
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        last_pg_state = pg_state;
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    }
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    pe_state = env->cr[0] & CR0_PE_MASK;
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    if (last_pe_state != pe_state) {
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        tb_flush();
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        tb_flush(env);
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        last_pe_state = pe_state;
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    }
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}
......
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#if defined(DEBUG_MMU)
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        printf("CR3 update: CR3=%08x\n", env->cr[3]);
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#endif
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        page_unmap();
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        tlb_flush(env);
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    }
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}
......
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/* XXX: also flush 4MB pages */
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void cpu_x86_flush_tlb(CPUX86State *env, uint32_t addr)
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{
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    int flags;
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    unsigned long virt_addr;
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    tlb_flush_page(env, addr);
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    flags = page_get_flags(addr);
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    if (flags & PAGE_VALID) {
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        virt_addr = addr & ~0xfff;
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#if !defined(CONFIG_SOFTMMU)
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        munmap((void *)virt_addr, 4096);
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#endif
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        page_set_flags(virt_addr, virt_addr + 4096, 0);
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    }
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}
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/* return value:

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