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Revision b96ac3e4

IDb96ac3e4cccf0ed92ffad4803d8558ebb6cdbad5

Added by Max Filippov about 12 years ago

target-xtensa: define TLB_TEMPLATE for MMU-less cores

TLB_TEMPLATE macro specifies TLB geometry in the core configuration.
Make TLB_TEMPLATE available for region protection core variants,
defining 1 way ITLB and DTLB with 8 entries each.

Signed-off-by: Max Filippov <>

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