Revision ba3c64fb hw/sun4m.c
b/hw/sun4m.c | ||
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56 | 56 |
#define PHYS_JJ_FDC 0x71400000 /* Floppy */ |
57 | 57 |
#define PHYS_JJ_FLOPPY_IRQ 22 |
58 | 58 |
#define PHYS_JJ_ME_IRQ 30 /* Module error, power fail */ |
59 |
#define MAX_CPUS 16 |
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59 | 60 |
|
60 | 61 |
/* TSC handling */ |
61 | 62 |
|
... | ... | |
128 | 129 |
nvram_set_string(nvram, 0x00, "QEMU_BIOS", 16); |
129 | 130 |
nvram_set_lword(nvram, 0x10, 0x00000001); /* structure v1 */ |
130 | 131 |
// NVRAM_size, arch not applicable |
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m48t59_write(nvram, 0x2D, smp_cpus & 0xff); |
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m48t59_write(nvram, 0x2E, 0); |
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131 | 134 |
m48t59_write(nvram, 0x2F, nographic & 0xff); |
132 | 135 |
nvram_set_lword(nvram, 0x30, RAM_size); |
133 | 136 |
m48t59_write(nvram, 0x34, boot_device & 0xff); |
... | ... | |
179 | 182 |
slavio_pic_set_irq(slavio_intctl, irq, level); |
180 | 183 |
} |
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void pic_set_irq_cpu(int irq, int level, unsigned int cpu) |
|
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{ |
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slavio_pic_set_irq_cpu(slavio_intctl, irq, level, cpu); |
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} |
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static void *tcx; |
183 | 191 |
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184 | 192 |
void vga_update_display() |
... | ... | |
222 | 230 |
const char *kernel_filename, const char *kernel_cmdline, |
223 | 231 |
const char *initrd_filename) |
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{ |
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CPUState *env; |
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CPUState *env, *envs[MAX_CPUS];
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|
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char buf[1024]; |
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int ret, linux_boot; |
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unsigned int i; |
... | ... | |
230 | 238 |
|
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linux_boot = (kernel_filename != NULL); |
232 | 240 |
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env = cpu_init(); |
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register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); |
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qemu_register_reset(main_cpu_reset, env); |
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|
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/* init CPUs */ |
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for(i = 0; i < smp_cpus; i++) { |
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env = cpu_init(); |
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envs[i] = env; |
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if (i != 0) |
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env->halted = 1; |
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register_savevm("cpu", i, 3, cpu_save, cpu_load, env); |
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qemu_register_reset(main_cpu_reset, env); |
|
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} |
|
237 | 250 |
/* allocate RAM */ |
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cpu_register_physical_memory(0, ram_size, 0); |
239 | 252 |
|
240 | 253 |
iommu = iommu_init(PHYS_JJ_IOMMU); |
241 | 254 |
slavio_intctl = slavio_intctl_init(PHYS_JJ_INTR0, PHYS_JJ_INTR_G); |
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for(i = 0; i < smp_cpus; i++) { |
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slavio_intctl_set_cpu(slavio_intctl, i, envs[i]); |
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} |
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tcx = tcx_init(ds, PHYS_JJ_TCX_FB, phys_ram_base + ram_size, ram_size, vram_size, graphic_width, graphic_height); |
243 | 260 |
lance_init(&nd_table[0], PHYS_JJ_LE_IRQ, PHYS_JJ_LE, PHYS_JJ_LEDMA); |
244 | 261 |
nvram = m48t59_init(0, PHYS_JJ_EEPROM, 0, PHYS_JJ_EEPROM_SIZE, 8); |
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slavio_timer_init(PHYS_JJ_CLOCK, PHYS_JJ_CLOCK_IRQ, PHYS_JJ_CLOCK1, PHYS_JJ_CLOCK1_IRQ); |
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for (i = 0; i < MAX_CPUS; i++) { |
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slavio_timer_init(PHYS_JJ_CLOCK + i * TARGET_PAGE_SIZE, PHYS_JJ_CLOCK_IRQ, 0, i); |
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} |
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slavio_timer_init(PHYS_JJ_CLOCK1, PHYS_JJ_CLOCK1_IRQ, 2, (unsigned int)-1); |
|
246 | 266 |
slavio_serial_ms_kbd_init(PHYS_JJ_MS_KBD, PHYS_JJ_MS_KBD_IRQ); |
247 | 267 |
// Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device |
248 | 268 |
// Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device |
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