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/*
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 * gdb server stub
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 *
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 * Copyright (c) 2003-2005 Fabrice Bellard
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 *
6
 * This library is free software; you can redistribute it and/or
7
 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include "config.h"
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#ifdef CONFIG_USER_ONLY
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <errno.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include "qemu.h"
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#else
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#include "qemu-common.h"
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#include "qemu-char.h"
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#include "sysemu.h"
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#include "gdbstub.h"
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#endif
37

    
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#include "qemu_socket.h"
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#ifdef _WIN32
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/* XXX: these constants may be independent of the host ones even for Unix */
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#ifndef SIGTRAP
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#define SIGTRAP 5
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#endif
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#ifndef SIGINT
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#define SIGINT 2
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#endif
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#else
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#include <signal.h>
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#endif
50

    
51
//#define DEBUG_GDB
52

    
53
enum RSState {
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    RS_IDLE,
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    RS_GETLINE,
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    RS_CHKSUM1,
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    RS_CHKSUM2,
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    RS_SYSCALL,
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};
60
typedef struct GDBState {
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    CPUState *env; /* current CPU */
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    enum RSState state; /* parsing state */
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    char line_buf[4096];
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    int line_buf_index;
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    int line_csum;
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    uint8_t last_packet[4100];
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    int last_packet_len;
68
#ifdef CONFIG_USER_ONLY
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    int fd;
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    int running_state;
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#else
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    CharDriverState *chr;
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#endif
74
} GDBState;
75

    
76
#ifdef CONFIG_USER_ONLY
77
/* XXX: This is not thread safe.  Do we care?  */
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static int gdbserver_fd = -1;
79

    
80
/* XXX: remove this hack.  */
81
static GDBState gdbserver_state;
82

    
83
static int get_char(GDBState *s)
84
{
85
    uint8_t ch;
86
    int ret;
87

    
88
    for(;;) {
89
        ret = recv(s->fd, &ch, 1, 0);
90
        if (ret < 0) {
91
            if (errno != EINTR && errno != EAGAIN)
92
                return -1;
93
        } else if (ret == 0) {
94
            return -1;
95
        } else {
96
            break;
97
        }
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    }
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    return ch;
100
}
101
#endif
102

    
103
/* GDB stub state for use by semihosting syscalls.  */
104
static GDBState *gdb_syscall_state;
105
static gdb_syscall_complete_cb gdb_current_syscall_cb;
106

    
107
enum {
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    GDB_SYS_UNKNOWN,
109
    GDB_SYS_ENABLED,
110
    GDB_SYS_DISABLED,
111
} gdb_syscall_mode;
112

    
113
/* If gdb is connected when the first semihosting syscall occurs then use
114
   remote gdb syscalls.  Otherwise use native file IO.  */
115
int use_gdb_syscalls(void)
116
{
117
    if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
118
        gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
119
                                              : GDB_SYS_DISABLED);
120
    }
121
    return gdb_syscall_mode == GDB_SYS_ENABLED;
122
}
123

    
124
/* Resume execution.  */
125
static inline void gdb_continue(GDBState *s)
126
{
127
#ifdef CONFIG_USER_ONLY
128
    s->running_state = 1;
129
#else
130
    vm_start();
131
#endif
132
}
133

    
134
static void put_buffer(GDBState *s, const uint8_t *buf, int len)
135
{
136
#ifdef CONFIG_USER_ONLY
137
    int ret;
138

    
139
    while (len > 0) {
140
        ret = send(s->fd, buf, len, 0);
141
        if (ret < 0) {
142
            if (errno != EINTR && errno != EAGAIN)
143
                return;
144
        } else {
145
            buf += ret;
146
            len -= ret;
147
        }
148
    }
149
#else
150
    qemu_chr_write(s->chr, buf, len);
151
#endif
152
}
153

    
154
static inline int fromhex(int v)
155
{
156
    if (v >= '0' && v <= '9')
157
        return v - '0';
158
    else if (v >= 'A' && v <= 'F')
159
        return v - 'A' + 10;
160
    else if (v >= 'a' && v <= 'f')
161
        return v - 'a' + 10;
162
    else
163
        return 0;
164
}
165

    
166
static inline int tohex(int v)
167
{
168
    if (v < 10)
169
        return v + '0';
170
    else
171
        return v - 10 + 'a';
172
}
173

    
174
static void memtohex(char *buf, const uint8_t *mem, int len)
175
{
176
    int i, c;
177
    char *q;
178
    q = buf;
179
    for(i = 0; i < len; i++) {
180
        c = mem[i];
181
        *q++ = tohex(c >> 4);
182
        *q++ = tohex(c & 0xf);
183
    }
184
    *q = '\0';
185
}
186

    
187
static void hextomem(uint8_t *mem, const char *buf, int len)
188
{
189
    int i;
190

    
191
    for(i = 0; i < len; i++) {
192
        mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
193
        buf += 2;
194
    }
195
}
196

    
197
/* return -1 if error, 0 if OK */
198
static int put_packet(GDBState *s, char *buf)
199
{
200
    int len, csum, i;
201
    uint8_t *p;
202

    
203
#ifdef DEBUG_GDB
204
    printf("reply='%s'\n", buf);
205
#endif
206

    
207
    for(;;) {
208
        p = s->last_packet;
209
        *(p++) = '$';
210
        len = strlen(buf);
211
        memcpy(p, buf, len);
212
        p += len;
213
        csum = 0;
214
        for(i = 0; i < len; i++) {
215
            csum += buf[i];
216
        }
217
        *(p++) = '#';
218
        *(p++) = tohex((csum >> 4) & 0xf);
219
        *(p++) = tohex((csum) & 0xf);
220

    
221
        s->last_packet_len = p - s->last_packet;
222
        put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
223

    
224
#ifdef CONFIG_USER_ONLY
225
        i = get_char(s);
226
        if (i < 0)
227
            return -1;
228
        if (i == '+')
229
            break;
230
#else
231
        break;
232
#endif
233
    }
234
    return 0;
235
}
236

    
237
#if defined(TARGET_I386)
238

    
239
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
240
{
241
    int i, fpus;
242
    uint32_t *registers = (uint32_t *)mem_buf;
243

    
244
#ifdef TARGET_X86_64
245
    /* This corresponds with amd64_register_info[] in gdb/amd64-tdep.c */
246
    uint64_t *registers64 = (uint64_t *)mem_buf;
247

    
248
    if (env->hflags & HF_CS64_MASK) {
249
        registers64[0] = tswap64(env->regs[R_EAX]);
250
        registers64[1] = tswap64(env->regs[R_EBX]);
251
        registers64[2] = tswap64(env->regs[R_ECX]);
252
        registers64[3] = tswap64(env->regs[R_EDX]);
253
        registers64[4] = tswap64(env->regs[R_ESI]);
254
        registers64[5] = tswap64(env->regs[R_EDI]);
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        registers64[6] = tswap64(env->regs[R_EBP]);
256
        registers64[7] = tswap64(env->regs[R_ESP]);
257
        for(i = 8; i < 16; i++) {
258
            registers64[i] = tswap64(env->regs[i]);
259
        }
260
        registers64[16] = tswap64(env->eip);
261

    
262
        registers = (uint32_t *)&registers64[17];
263
        registers[0] = tswap32(env->eflags);
264
        registers[1] = tswap32(env->segs[R_CS].selector);
265
        registers[2] = tswap32(env->segs[R_SS].selector);
266
        registers[3] = tswap32(env->segs[R_DS].selector);
267
        registers[4] = tswap32(env->segs[R_ES].selector);
268
        registers[5] = tswap32(env->segs[R_FS].selector);
269
        registers[6] = tswap32(env->segs[R_GS].selector);
270
        /* XXX: convert floats */
271
        for(i = 0; i < 8; i++) {
272
            memcpy(mem_buf + 16 * 8 + 7 * 4 + i * 10, &env->fpregs[i], 10);
273
        }
274
        registers[27] = tswap32(env->fpuc); /* fctrl */
275
        fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
276
        registers[28] = tswap32(fpus); /* fstat */
277
        registers[29] = 0; /* ftag */
278
        registers[30] = 0; /* fiseg */
279
        registers[31] = 0; /* fioff */
280
        registers[32] = 0; /* foseg */
281
        registers[33] = 0; /* fooff */
282
        registers[34] = 0; /* fop */
283
        for(i = 0; i < 16; i++) {
284
            memcpy(mem_buf + 16 * 8 + 35 * 4 + i * 16, &env->xmm_regs[i], 16);
285
        }
286
        registers[99] = tswap32(env->mxcsr);
287

    
288
        return 8 * 17 + 4 * 7 + 10 * 8 + 4 * 8 + 16 * 16 + 4;
289
    }
290
#endif
291

    
292
    for(i = 0; i < 8; i++) {
293
        registers[i] = env->regs[i];
294
    }
295
    registers[8] = env->eip;
296
    registers[9] = env->eflags;
297
    registers[10] = env->segs[R_CS].selector;
298
    registers[11] = env->segs[R_SS].selector;
299
    registers[12] = env->segs[R_DS].selector;
300
    registers[13] = env->segs[R_ES].selector;
301
    registers[14] = env->segs[R_FS].selector;
302
    registers[15] = env->segs[R_GS].selector;
303
    /* XXX: convert floats */
304
    for(i = 0; i < 8; i++) {
305
        memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
306
    }
307
    registers[36] = env->fpuc;
308
    fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
309
    registers[37] = fpus;
310
    registers[38] = 0; /* XXX: convert tags */
311
    registers[39] = 0; /* fiseg */
312
    registers[40] = 0; /* fioff */
313
    registers[41] = 0; /* foseg */
314
    registers[42] = 0; /* fooff */
315
    registers[43] = 0; /* fop */
316

    
317
    for(i = 0; i < 16; i++)
318
        tswapls(&registers[i]);
319
    for(i = 36; i < 44; i++)
320
        tswapls(&registers[i]);
321
    return 44 * 4;
322
}
323

    
324
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
325
{
326
    uint32_t *registers = (uint32_t *)mem_buf;
327
    int i;
328

    
329
    for(i = 0; i < 8; i++) {
330
        env->regs[i] = tswapl(registers[i]);
331
    }
332
    env->eip = tswapl(registers[8]);
333
    env->eflags = tswapl(registers[9]);
334
#if defined(CONFIG_USER_ONLY)
335
#define LOAD_SEG(index, sreg)\
336
            if (tswapl(registers[index]) != env->segs[sreg].selector)\
337
                cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
338
            LOAD_SEG(10, R_CS);
339
            LOAD_SEG(11, R_SS);
340
            LOAD_SEG(12, R_DS);
341
            LOAD_SEG(13, R_ES);
342
            LOAD_SEG(14, R_FS);
343
            LOAD_SEG(15, R_GS);
344
#endif
345
}
346

    
347
#elif defined (TARGET_PPC)
348
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
349
{
350
    uint32_t *registers = (uint32_t *)mem_buf, tmp;
351
    int i;
352

    
353
    /* fill in gprs */
354
    for(i = 0; i < 32; i++) {
355
        registers[i] = tswapl(env->gpr[i]);
356
    }
357
    /* fill in fprs */
358
    for (i = 0; i < 32; i++) {
359
        registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
360
        registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
361
    }
362
    /* nip, msr, ccr, lnk, ctr, xer, mq */
363
    registers[96] = tswapl(env->nip);
364
    registers[97] = tswapl(env->msr);
365
    tmp = 0;
366
    for (i = 0; i < 8; i++)
367
        tmp |= env->crf[i] << (32 - ((i + 1) * 4));
368
    registers[98] = tswapl(tmp);
369
    registers[99] = tswapl(env->lr);
370
    registers[100] = tswapl(env->ctr);
371
    registers[101] = tswapl(ppc_load_xer(env));
372
    registers[102] = 0;
373

    
374
    return 103 * 4;
375
}
376

    
377
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
378
{
379
    uint32_t *registers = (uint32_t *)mem_buf;
380
    int i;
381

    
382
    /* fill in gprs */
383
    for (i = 0; i < 32; i++) {
384
        env->gpr[i] = tswapl(registers[i]);
385
    }
386
    /* fill in fprs */
387
    for (i = 0; i < 32; i++) {
388
        *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
389
        *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
390
    }
391
    /* nip, msr, ccr, lnk, ctr, xer, mq */
392
    env->nip = tswapl(registers[96]);
393
    ppc_store_msr(env, tswapl(registers[97]));
394
    registers[98] = tswapl(registers[98]);
395
    for (i = 0; i < 8; i++)
396
        env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
397
    env->lr = tswapl(registers[99]);
398
    env->ctr = tswapl(registers[100]);
399
    ppc_store_xer(env, tswapl(registers[101]));
400
}
401
#elif defined (TARGET_SPARC)
402
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
403
{
404
    target_ulong *registers = (target_ulong *)mem_buf;
405
    int i;
406

    
407
    /* fill in g0..g7 */
408
    for(i = 0; i < 8; i++) {
409
        registers[i] = tswapl(env->gregs[i]);
410
    }
411
    /* fill in register window */
412
    for(i = 0; i < 24; i++) {
413
        registers[i + 8] = tswapl(env->regwptr[i]);
414
    }
415
#ifndef TARGET_SPARC64
416
    /* fill in fprs */
417
    for (i = 0; i < 32; i++) {
418
        registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
419
    }
420
    /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
421
    registers[64] = tswapl(env->y);
422
    {
423
        target_ulong tmp;
424

    
425
        tmp = GET_PSR(env);
426
        registers[65] = tswapl(tmp);
427
    }
428
    registers[66] = tswapl(env->wim);
429
    registers[67] = tswapl(env->tbr);
430
    registers[68] = tswapl(env->pc);
431
    registers[69] = tswapl(env->npc);
432
    registers[70] = tswapl(env->fsr);
433
    registers[71] = 0; /* csr */
434
    registers[72] = 0;
435
    return 73 * sizeof(target_ulong);
436
#else
437
    /* fill in fprs */
438
    for (i = 0; i < 64; i += 2) {
439
        uint64_t tmp;
440

    
441
        tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
442
        tmp |= *(uint32_t *)&env->fpr[i + 1];
443
        registers[i / 2 + 32] = tswap64(tmp);
444
    }
445
    registers[64] = tswapl(env->pc);
446
    registers[65] = tswapl(env->npc);
447
    registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
448
                           ((env->asi & 0xff) << 24) |
449
                           ((env->pstate & 0xfff) << 8) |
450
                           GET_CWP64(env));
451
    registers[67] = tswapl(env->fsr);
452
    registers[68] = tswapl(env->fprs);
453
    registers[69] = tswapl(env->y);
454
    return 70 * sizeof(target_ulong);
455
#endif
456
}
457

    
458
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
459
{
460
    target_ulong *registers = (target_ulong *)mem_buf;
461
    int i;
462

    
463
    /* fill in g0..g7 */
464
    for(i = 0; i < 7; i++) {
465
        env->gregs[i] = tswapl(registers[i]);
466
    }
467
    /* fill in register window */
468
    for(i = 0; i < 24; i++) {
469
        env->regwptr[i] = tswapl(registers[i + 8]);
470
    }
471
#ifndef TARGET_SPARC64
472
    /* fill in fprs */
473
    for (i = 0; i < 32; i++) {
474
        *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
475
    }
476
    /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
477
    env->y = tswapl(registers[64]);
478
    PUT_PSR(env, tswapl(registers[65]));
479
    env->wim = tswapl(registers[66]);
480
    env->tbr = tswapl(registers[67]);
481
    env->pc = tswapl(registers[68]);
482
    env->npc = tswapl(registers[69]);
483
    env->fsr = tswapl(registers[70]);
484
#else
485
    for (i = 0; i < 64; i += 2) {
486
        uint64_t tmp;
487

    
488
        tmp = tswap64(registers[i / 2 + 32]);
489
        *((uint32_t *)&env->fpr[i]) = tmp >> 32;
490
        *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
491
    }
492
    env->pc = tswapl(registers[64]);
493
    env->npc = tswapl(registers[65]);
494
    {
495
        uint64_t tmp = tswapl(registers[66]);
496

    
497
        PUT_CCR(env, tmp >> 32);
498
        env->asi = (tmp >> 24) & 0xff;
499
        env->pstate = (tmp >> 8) & 0xfff;
500
        PUT_CWP64(env, tmp & 0xff);
501
    }
502
    env->fsr = tswapl(registers[67]);
503
    env->fprs = tswapl(registers[68]);
504
    env->y = tswapl(registers[69]);
505
#endif
506
}
507
#elif defined (TARGET_ARM)
508
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
509
{
510
    int i;
511
    uint8_t *ptr;
512

    
513
    ptr = mem_buf;
514
    /* 16 core integer registers (4 bytes each).  */
515
    for (i = 0; i < 16; i++)
516
      {
517
        *(uint32_t *)ptr = tswapl(env->regs[i]);
518
        ptr += 4;
519
      }
520
    /* 8 FPA registers (12 bytes each), FPS (4 bytes).
521
       Not yet implemented.  */
522
    memset (ptr, 0, 8 * 12 + 4);
523
    ptr += 8 * 12 + 4;
524
    /* CPSR (4 bytes).  */
525
    *(uint32_t *)ptr = tswapl (cpsr_read(env));
526
    ptr += 4;
527

    
528
    return ptr - mem_buf;
529
}
530

    
531
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
532
{
533
    int i;
534
    uint8_t *ptr;
535

    
536
    ptr = mem_buf;
537
    /* Core integer registers.  */
538
    for (i = 0; i < 16; i++)
539
      {
540
        env->regs[i] = tswapl(*(uint32_t *)ptr);
541
        ptr += 4;
542
      }
543
    /* Ignore FPA regs and scr.  */
544
    ptr += 8 * 12 + 4;
545
    cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
546
}
547
#elif defined (TARGET_M68K)
548
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
549
{
550
    int i;
551
    uint8_t *ptr;
552
    CPU_DoubleU u;
553

    
554
    ptr = mem_buf;
555
    /* D0-D7 */
556
    for (i = 0; i < 8; i++) {
557
        *(uint32_t *)ptr = tswapl(env->dregs[i]);
558
        ptr += 4;
559
    }
560
    /* A0-A7 */
561
    for (i = 0; i < 8; i++) {
562
        *(uint32_t *)ptr = tswapl(env->aregs[i]);
563
        ptr += 4;
564
    }
565
    *(uint32_t *)ptr = tswapl(env->sr);
566
    ptr += 4;
567
    *(uint32_t *)ptr = tswapl(env->pc);
568
    ptr += 4;
569
    /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
570
       ColdFire has 8-bit double precision registers.  */
571
    for (i = 0; i < 8; i++) {
572
        u.d = env->fregs[i];
573
        *(uint32_t *)ptr = tswap32(u.l.upper);
574
        *(uint32_t *)ptr = tswap32(u.l.lower);
575
    }
576
    /* FP control regs (not implemented).  */
577
    memset (ptr, 0, 3 * 4);
578
    ptr += 3 * 4;
579

    
580
    return ptr - mem_buf;
581
}
582

    
583
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
584
{
585
    int i;
586
    uint8_t *ptr;
587
    CPU_DoubleU u;
588

    
589
    ptr = mem_buf;
590
    /* D0-D7 */
591
    for (i = 0; i < 8; i++) {
592
        env->dregs[i] = tswapl(*(uint32_t *)ptr);
593
        ptr += 4;
594
    }
595
    /* A0-A7 */
596
    for (i = 0; i < 8; i++) {
597
        env->aregs[i] = tswapl(*(uint32_t *)ptr);
598
        ptr += 4;
599
    }
600
    env->sr = tswapl(*(uint32_t *)ptr);
601
    ptr += 4;
602
    env->pc = tswapl(*(uint32_t *)ptr);
603
    ptr += 4;
604
    /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
605
       ColdFire has 8-bit double precision registers.  */
606
    for (i = 0; i < 8; i++) {
607
        u.l.upper = tswap32(*(uint32_t *)ptr);
608
        u.l.lower = tswap32(*(uint32_t *)ptr);
609
        env->fregs[i] = u.d;
610
    }
611
    /* FP control regs (not implemented).  */
612
    ptr += 3 * 4;
613
}
614
#elif defined (TARGET_MIPS)
615
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
616
{
617
    int i;
618
    uint8_t *ptr;
619

    
620
    ptr = mem_buf;
621
    for (i = 0; i < 32; i++)
622
      {
623
        *(target_ulong *)ptr = tswapl(env->gpr[env->current_tc][i]);
624
        ptr += sizeof(target_ulong);
625
      }
626

    
627
    *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status);
628
    ptr += sizeof(target_ulong);
629

    
630
    *(target_ulong *)ptr = tswapl(env->LO[env->current_tc][0]);
631
    ptr += sizeof(target_ulong);
632

    
633
    *(target_ulong *)ptr = tswapl(env->HI[env->current_tc][0]);
634
    ptr += sizeof(target_ulong);
635

    
636
    *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
637
    ptr += sizeof(target_ulong);
638

    
639
    *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Cause);
640
    ptr += sizeof(target_ulong);
641

    
642
    *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);
643
    ptr += sizeof(target_ulong);
644

    
645
    if (env->CP0_Config1 & (1 << CP0C1_FP))
646
      {
647
        for (i = 0; i < 32; i++)
648
          {
649
            if (env->CP0_Status & (1 << CP0St_FR))
650
              *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].d);
651
            else
652
              *(target_ulong *)ptr = tswap32(env->fpu->fpr[i].w[FP_ENDIAN_IDX]);
653
            ptr += sizeof(target_ulong);
654
          }
655

    
656
        *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr31);
657
        ptr += sizeof(target_ulong);
658

    
659
        *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr0);
660
        ptr += sizeof(target_ulong);
661
      }
662

    
663
    /* "fp", pseudo frame pointer. Not yet implemented in gdb. */
664
    *(target_ulong *)ptr = 0;
665
    ptr += sizeof(target_ulong);
666

    
667
    /* Registers for embedded use, we just pad them. */
668
    for (i = 0; i < 16; i++)
669
      {
670
        *(target_ulong *)ptr = 0;
671
        ptr += sizeof(target_ulong);
672
      }
673

    
674
    /* Processor ID. */
675
    *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_PRid);
676
    ptr += sizeof(target_ulong);
677

    
678
    return ptr - mem_buf;
679
}
680

    
681
/* convert MIPS rounding mode in FCR31 to IEEE library */
682
static unsigned int ieee_rm[] =
683
  {
684
    float_round_nearest_even,
685
    float_round_to_zero,
686
    float_round_up,
687
    float_round_down
688
  };
689
#define RESTORE_ROUNDING_MODE \
690
    set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
691

    
692
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
693
{
694
    int i;
695
    uint8_t *ptr;
696

    
697
    ptr = mem_buf;
698
    for (i = 0; i < 32; i++)
699
      {
700
        env->gpr[env->current_tc][i] = tswapl(*(target_ulong *)ptr);
701
        ptr += sizeof(target_ulong);
702
      }
703

    
704
    env->CP0_Status = tswapl(*(target_ulong *)ptr);
705
    ptr += sizeof(target_ulong);
706

    
707
    env->LO[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
708
    ptr += sizeof(target_ulong);
709

    
710
    env->HI[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
711
    ptr += sizeof(target_ulong);
712

    
713
    env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
714
    ptr += sizeof(target_ulong);
715

    
716
    env->CP0_Cause = tswapl(*(target_ulong *)ptr);
717
    ptr += sizeof(target_ulong);
718

    
719
    env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);
720
    ptr += sizeof(target_ulong);
721

    
722
    if (env->CP0_Config1 & (1 << CP0C1_FP))
723
      {
724
        for (i = 0; i < 32; i++)
725
          {
726
            if (env->CP0_Status & (1 << CP0St_FR))
727
              env->fpu->fpr[i].d = tswapl(*(target_ulong *)ptr);
728
            else
729
              env->fpu->fpr[i].w[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
730
            ptr += sizeof(target_ulong);
731
          }
732

    
733
        env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0xFF83FFFF;
734
        ptr += sizeof(target_ulong);
735

    
736
        /* The remaining registers are assumed to be read-only. */
737

    
738
        /* set rounding mode */
739
        RESTORE_ROUNDING_MODE;
740

    
741
#ifndef CONFIG_SOFTFLOAT
742
        /* no floating point exception for native float */
743
        SET_FP_ENABLE(env->fcr31, 0);
744
#endif
745
      }
746
}
747
#elif defined (TARGET_SH4)
748

    
749
/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
750

    
751
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
752
{
753
  uint32_t *ptr = (uint32_t *)mem_buf;
754
  int i;
755

    
756
#define SAVE(x) *ptr++=tswapl(x)
757
  if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
758
      for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
759
  } else {
760
      for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
761
  }
762
  for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
763
  SAVE (env->pc);
764
  SAVE (env->pr);
765
  SAVE (env->gbr);
766
  SAVE (env->vbr);
767
  SAVE (env->mach);
768
  SAVE (env->macl);
769
  SAVE (env->sr);
770
  SAVE (env->fpul);
771
  SAVE (env->fpscr);
772
  for (i = 0; i < 16; i++)
773
      SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
774
  SAVE (env->ssr);
775
  SAVE (env->spc);
776
  for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
777
  for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
778
  return ((uint8_t *)ptr - mem_buf);
779
}
780

    
781
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
782
{
783
  uint32_t *ptr = (uint32_t *)mem_buf;
784
  int i;
785

    
786
#define LOAD(x) (x)=*ptr++;
787
  if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
788
      for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
789
  } else {
790
      for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
791
  }
792
  for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
793
  LOAD (env->pc);
794
  LOAD (env->pr);
795
  LOAD (env->gbr);
796
  LOAD (env->vbr);
797
  LOAD (env->mach);
798
  LOAD (env->macl);
799
  LOAD (env->sr);
800
  LOAD (env->fpul);
801
  LOAD (env->fpscr);
802
  for (i = 0; i < 16; i++)
803
      LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
804
  LOAD (env->ssr);
805
  LOAD (env->spc);
806
  for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
807
  for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
808
}
809
#elif defined (TARGET_CRIS)
810

    
811
static int cris_save_32 (unsigned char *d, uint32_t value)
812
{
813
        *d++ = (value);
814
        *d++ = (value >>= 8);
815
        *d++ = (value >>= 8);
816
        *d++ = (value >>= 8);
817
        return 4;
818
}
819
static int cris_save_16 (unsigned char *d, uint32_t value)
820
{
821
        *d++ = (value);
822
        *d++ = (value >>= 8);
823
        return 2;
824
}
825
static int cris_save_8 (unsigned char *d, uint32_t value)
826
{
827
        *d++ = (value);
828
        return 1;
829
}
830

    
831
/* FIXME: this will bug on archs not supporting unaligned word accesses.  */
832
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
833
{
834
  uint8_t *ptr = mem_buf;
835
  uint8_t srs;
836
  int i;
837

    
838
  for (i = 0; i < 16; i++)
839
          ptr += cris_save_32 (ptr, env->regs[i]);
840

    
841
  srs = env->pregs[PR_SRS];
842

    
843
  ptr += cris_save_8 (ptr, env->pregs[0]);
844
  ptr += cris_save_8 (ptr, env->pregs[1]);
845
  ptr += cris_save_32 (ptr, env->pregs[2]);
846
  ptr += cris_save_8 (ptr, srs);
847
  ptr += cris_save_16 (ptr, env->pregs[4]);
848

    
849
  for (i = 5; i < 16; i++)
850
          ptr += cris_save_32 (ptr, env->pregs[i]);
851

    
852
  ptr += cris_save_32 (ptr, env->pc);
853

    
854
  for (i = 0; i < 16; i++)
855
          ptr += cris_save_32 (ptr, env->sregs[srs][i]);
856

    
857
  return ((uint8_t *)ptr - mem_buf);
858
}
859

    
860
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
861
{
862
  uint32_t *ptr = (uint32_t *)mem_buf;
863
  int i;
864

    
865
#define LOAD(x) (x)=*ptr++;
866
  for (i = 0; i < 16; i++) LOAD(env->regs[i]);
867
  LOAD (env->pc);
868
}
869
#else
870
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
871
{
872
    return 0;
873
}
874

    
875
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
876
{
877
}
878

    
879
#endif
880

    
881
static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
882
{
883
    const char *p;
884
    int ch, reg_size, type;
885
    char buf[4096];
886
    uint8_t mem_buf[4096];
887
    uint32_t *registers;
888
    target_ulong addr, len;
889

    
890
#ifdef DEBUG_GDB
891
    printf("command='%s'\n", line_buf);
892
#endif
893
    p = line_buf;
894
    ch = *p++;
895
    switch(ch) {
896
    case '?':
897
        /* TODO: Make this return the correct value for user-mode.  */
898
        snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
899
        put_packet(s, buf);
900
        break;
901
    case 'c':
902
        if (*p != '\0') {
903
            addr = strtoull(p, (char **)&p, 16);
904
#if defined(TARGET_I386)
905
            env->eip = addr;
906
#elif defined (TARGET_PPC)
907
            env->nip = addr;
908
#elif defined (TARGET_SPARC)
909
            env->pc = addr;
910
            env->npc = addr + 4;
911
#elif defined (TARGET_ARM)
912
            env->regs[15] = addr;
913
#elif defined (TARGET_SH4)
914
            env->pc = addr;
915
#elif defined (TARGET_MIPS)
916
            env->PC[env->current_tc] = addr;
917
#elif defined (TARGET_CRIS)
918
            env->pc = addr;
919
#endif
920
        }
921
        gdb_continue(s);
922
        return RS_IDLE;
923
    case 's':
924
        if (*p != '\0') {
925
            addr = strtoull(p, (char **)&p, 16);
926
#if defined(TARGET_I386)
927
            env->eip = addr;
928
#elif defined (TARGET_PPC)
929
            env->nip = addr;
930
#elif defined (TARGET_SPARC)
931
            env->pc = addr;
932
            env->npc = addr + 4;
933
#elif defined (TARGET_ARM)
934
            env->regs[15] = addr;
935
#elif defined (TARGET_SH4)
936
            env->pc = addr;
937
#elif defined (TARGET_MIPS)
938
            env->PC[env->current_tc] = addr;
939
#elif defined (TARGET_CRIS)
940
            env->pc = addr;
941
#endif
942
        }
943
        cpu_single_step(env, 1);
944
        gdb_continue(s);
945
        return RS_IDLE;
946
    case 'F':
947
        {
948
            target_ulong ret;
949
            target_ulong err;
950

    
951
            ret = strtoull(p, (char **)&p, 16);
952
            if (*p == ',') {
953
                p++;
954
                err = strtoull(p, (char **)&p, 16);
955
            } else {
956
                err = 0;
957
            }
958
            if (*p == ',')
959
                p++;
960
            type = *p;
961
            if (gdb_current_syscall_cb)
962
                gdb_current_syscall_cb(s->env, ret, err);
963
            if (type == 'C') {
964
                put_packet(s, "T02");
965
            } else {
966
                gdb_continue(s);
967
            }
968
        }
969
        break;
970
    case 'g':
971
        reg_size = cpu_gdb_read_registers(env, mem_buf);
972
        memtohex(buf, mem_buf, reg_size);
973
        put_packet(s, buf);
974
        break;
975
    case 'G':
976
        registers = (void *)mem_buf;
977
        len = strlen(p) / 2;
978
        hextomem((uint8_t *)registers, p, len);
979
        cpu_gdb_write_registers(env, mem_buf, len);
980
        put_packet(s, "OK");
981
        break;
982
    case 'm':
983
        addr = strtoull(p, (char **)&p, 16);
984
        if (*p == ',')
985
            p++;
986
        len = strtoull(p, NULL, 16);
987
        if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
988
            put_packet (s, "E14");
989
        } else {
990
            memtohex(buf, mem_buf, len);
991
            put_packet(s, buf);
992
        }
993
        break;
994
    case 'M':
995
        addr = strtoull(p, (char **)&p, 16);
996
        if (*p == ',')
997
            p++;
998
        len = strtoull(p, (char **)&p, 16);
999
        if (*p == ':')
1000
            p++;
1001
        hextomem(mem_buf, p, len);
1002
        if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
1003
            put_packet(s, "E14");
1004
        else
1005
            put_packet(s, "OK");
1006
        break;
1007
    case 'Z':
1008
        type = strtoul(p, (char **)&p, 16);
1009
        if (*p == ',')
1010
            p++;
1011
        addr = strtoull(p, (char **)&p, 16);
1012
        if (*p == ',')
1013
            p++;
1014
        len = strtoull(p, (char **)&p, 16);
1015
        if (type == 0 || type == 1) {
1016
            if (cpu_breakpoint_insert(env, addr) < 0)
1017
                goto breakpoint_error;
1018
            put_packet(s, "OK");
1019
#ifndef CONFIG_USER_ONLY
1020
        } else if (type == 2) {
1021
            if (cpu_watchpoint_insert(env, addr) < 0)
1022
                goto breakpoint_error;
1023
            put_packet(s, "OK");
1024
#endif
1025
        } else {
1026
        breakpoint_error:
1027
            put_packet(s, "E22");
1028
        }
1029
        break;
1030
    case 'z':
1031
        type = strtoul(p, (char **)&p, 16);
1032
        if (*p == ',')
1033
            p++;
1034
        addr = strtoull(p, (char **)&p, 16);
1035
        if (*p == ',')
1036
            p++;
1037
        len = strtoull(p, (char **)&p, 16);
1038
        if (type == 0 || type == 1) {
1039
            cpu_breakpoint_remove(env, addr);
1040
            put_packet(s, "OK");
1041
#ifndef CONFIG_USER_ONLY
1042
        } else if (type == 2) {
1043
            cpu_watchpoint_remove(env, addr);
1044
            put_packet(s, "OK");
1045
#endif
1046
        } else {
1047
            goto breakpoint_error;
1048
        }
1049
        break;
1050
#ifdef CONFIG_LINUX_USER
1051
    case 'q':
1052
        if (strncmp(p, "Offsets", 7) == 0) {
1053
            TaskState *ts = env->opaque;
1054

    
1055
            sprintf(buf,
1056
                    "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1057
                    ";Bss=" TARGET_ABI_FMT_lx,
1058
                    ts->info->code_offset,
1059
                    ts->info->data_offset,
1060
                    ts->info->data_offset);
1061
            put_packet(s, buf);
1062
            break;
1063
        }
1064
        /* Fall through.  */
1065
#endif
1066
    default:
1067
        //        unknown_command:
1068
        /* put empty packet */
1069
        buf[0] = '\0';
1070
        put_packet(s, buf);
1071
        break;
1072
    }
1073
    return RS_IDLE;
1074
}
1075

    
1076
extern void tb_flush(CPUState *env);
1077

    
1078
#ifndef CONFIG_USER_ONLY
1079
static void gdb_vm_stopped(void *opaque, int reason)
1080
{
1081
    GDBState *s = opaque;
1082
    char buf[256];
1083
    int ret;
1084

    
1085
    if (s->state == RS_SYSCALL)
1086
        return;
1087

    
1088
    /* disable single step if it was enable */
1089
    cpu_single_step(s->env, 0);
1090

    
1091
    if (reason == EXCP_DEBUG) {
1092
        if (s->env->watchpoint_hit) {
1093
            snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
1094
                     SIGTRAP,
1095
                     s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
1096
            put_packet(s, buf);
1097
            s->env->watchpoint_hit = 0;
1098
            return;
1099
        }
1100
        tb_flush(s->env);
1101
        ret = SIGTRAP;
1102
    } else if (reason == EXCP_INTERRUPT) {
1103
        ret = SIGINT;
1104
    } else {
1105
        ret = 0;
1106
    }
1107
    snprintf(buf, sizeof(buf), "S%02x", ret);
1108
    put_packet(s, buf);
1109
}
1110
#endif
1111

    
1112
/* Send a gdb syscall request.
1113
   This accepts limited printf-style format specifiers, specifically:
1114
    %x  - target_ulong argument printed in hex.
1115
    %lx - 64-bit argument printed in hex.
1116
    %s  - string pointer (target_ulong) and length (int) pair.  */
1117
void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1118
{
1119
    va_list va;
1120
    char buf[256];
1121
    char *p;
1122
    target_ulong addr;
1123
    uint64_t i64;
1124
    GDBState *s;
1125

    
1126
    s = gdb_syscall_state;
1127
    if (!s)
1128
        return;
1129
    gdb_current_syscall_cb = cb;
1130
    s->state = RS_SYSCALL;
1131
#ifndef CONFIG_USER_ONLY
1132
    vm_stop(EXCP_DEBUG);
1133
#endif
1134
    s->state = RS_IDLE;
1135
    va_start(va, fmt);
1136
    p = buf;
1137
    *(p++) = 'F';
1138
    while (*fmt) {
1139
        if (*fmt == '%') {
1140
            fmt++;
1141
            switch (*fmt++) {
1142
            case 'x':
1143
                addr = va_arg(va, target_ulong);
1144
                p += sprintf(p, TARGET_FMT_lx, addr);
1145
                break;
1146
            case 'l':
1147
                if (*(fmt++) != 'x')
1148
                    goto bad_format;
1149
                i64 = va_arg(va, uint64_t);
1150
                p += sprintf(p, "%" PRIx64, i64);
1151
                break;
1152
            case 's':
1153
                addr = va_arg(va, target_ulong);
1154
                p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1155
                break;
1156
            default:
1157
            bad_format:
1158
                fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1159
                        fmt - 1);
1160
                break;
1161
            }
1162
        } else {
1163
            *(p++) = *(fmt++);
1164
        }
1165
    }
1166
    *p = 0;
1167
    va_end(va);
1168
    put_packet(s, buf);
1169
#ifdef CONFIG_USER_ONLY
1170
    gdb_handlesig(s->env, 0);
1171
#else
1172
    cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1173
#endif
1174
}
1175

    
1176
static void gdb_read_byte(GDBState *s, int ch)
1177
{
1178
    CPUState *env = s->env;
1179
    int i, csum;
1180
    uint8_t reply;
1181

    
1182
#ifndef CONFIG_USER_ONLY
1183
    if (s->last_packet_len) {
1184
        /* Waiting for a response to the last packet.  If we see the start
1185
           of a new command then abandon the previous response.  */
1186
        if (ch == '-') {
1187
#ifdef DEBUG_GDB
1188
            printf("Got NACK, retransmitting\n");
1189
#endif
1190
            put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
1191
        }
1192
#ifdef DEBUG_GDB
1193
        else if (ch == '+')
1194
            printf("Got ACK\n");
1195
        else
1196
            printf("Got '%c' when expecting ACK/NACK\n", ch);
1197
#endif
1198
        if (ch == '+' || ch == '$')
1199
            s->last_packet_len = 0;
1200
        if (ch != '$')
1201
            return;
1202
    }
1203
    if (vm_running) {
1204
        /* when the CPU is running, we cannot do anything except stop
1205
           it when receiving a char */
1206
        vm_stop(EXCP_INTERRUPT);
1207
    } else
1208
#endif
1209
    {
1210
        switch(s->state) {
1211
        case RS_IDLE:
1212
            if (ch == '$') {
1213
                s->line_buf_index = 0;
1214
                s->state = RS_GETLINE;
1215
            }
1216
            break;
1217
        case RS_GETLINE:
1218
            if (ch == '#') {
1219
            s->state = RS_CHKSUM1;
1220
            } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1221
                s->state = RS_IDLE;
1222
            } else {
1223
            s->line_buf[s->line_buf_index++] = ch;
1224
            }
1225
            break;
1226
        case RS_CHKSUM1:
1227
            s->line_buf[s->line_buf_index] = '\0';
1228
            s->line_csum = fromhex(ch) << 4;
1229
            s->state = RS_CHKSUM2;
1230
            break;
1231
        case RS_CHKSUM2:
1232
            s->line_csum |= fromhex(ch);
1233
            csum = 0;
1234
            for(i = 0; i < s->line_buf_index; i++) {
1235
                csum += s->line_buf[i];
1236
            }
1237
            if (s->line_csum != (csum & 0xff)) {
1238
                reply = '-';
1239
                put_buffer(s, &reply, 1);
1240
                s->state = RS_IDLE;
1241
            } else {
1242
                reply = '+';
1243
                put_buffer(s, &reply, 1);
1244
                s->state = gdb_handle_packet(s, env, s->line_buf);
1245
            }
1246
            break;
1247
        default:
1248
            abort();
1249
        }
1250
    }
1251
}
1252

    
1253
#ifdef CONFIG_USER_ONLY
1254
int
1255
gdb_handlesig (CPUState *env, int sig)
1256
{
1257
  GDBState *s;
1258
  char buf[256];
1259
  int n;
1260

    
1261
  if (gdbserver_fd < 0)
1262
    return sig;
1263

    
1264
  s = &gdbserver_state;
1265

    
1266
  /* disable single step if it was enabled */
1267
  cpu_single_step(env, 0);
1268
  tb_flush(env);
1269

    
1270
  if (sig != 0)
1271
    {
1272
      snprintf(buf, sizeof(buf), "S%02x", sig);
1273
      put_packet(s, buf);
1274
    }
1275

    
1276
  sig = 0;
1277
  s->state = RS_IDLE;
1278
  s->running_state = 0;
1279
  while (s->running_state == 0) {
1280
      n = read (s->fd, buf, 256);
1281
      if (n > 0)
1282
        {
1283
          int i;
1284

    
1285
          for (i = 0; i < n; i++)
1286
            gdb_read_byte (s, buf[i]);
1287
        }
1288
      else if (n == 0 || errno != EAGAIN)
1289
        {
1290
          /* XXX: Connection closed.  Should probably wait for annother
1291
             connection before continuing.  */
1292
          return sig;
1293
        }
1294
  }
1295
  return sig;
1296
}
1297

    
1298
/* Tell the remote gdb that the process has exited.  */
1299
void gdb_exit(CPUState *env, int code)
1300
{
1301
  GDBState *s;
1302
  char buf[4];
1303

    
1304
  if (gdbserver_fd < 0)
1305
    return;
1306

    
1307
  s = &gdbserver_state;
1308

    
1309
  snprintf(buf, sizeof(buf), "W%02x", code);
1310
  put_packet(s, buf);
1311
}
1312

    
1313

    
1314
static void gdb_accept(void *opaque)
1315
{
1316
    GDBState *s;
1317
    struct sockaddr_in sockaddr;
1318
    socklen_t len;
1319
    int val, fd;
1320

    
1321
    for(;;) {
1322
        len = sizeof(sockaddr);
1323
        fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1324
        if (fd < 0 && errno != EINTR) {
1325
            perror("accept");
1326
            return;
1327
        } else if (fd >= 0) {
1328
            break;
1329
        }
1330
    }
1331

    
1332
    /* set short latency */
1333
    val = 1;
1334
    setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1335

    
1336
    s = &gdbserver_state;
1337
    memset (s, 0, sizeof (GDBState));
1338
    s->env = first_cpu; /* XXX: allow to change CPU */
1339
    s->fd = fd;
1340

    
1341
    gdb_syscall_state = s;
1342

    
1343
    fcntl(fd, F_SETFL, O_NONBLOCK);
1344
}
1345

    
1346
static int gdbserver_open(int port)
1347
{
1348
    struct sockaddr_in sockaddr;
1349
    int fd, val, ret;
1350

    
1351
    fd = socket(PF_INET, SOCK_STREAM, 0);
1352
    if (fd < 0) {
1353
        perror("socket");
1354
        return -1;
1355
    }
1356

    
1357
    /* allow fast reuse */
1358
    val = 1;
1359
    setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1360

    
1361
    sockaddr.sin_family = AF_INET;
1362
    sockaddr.sin_port = htons(port);
1363
    sockaddr.sin_addr.s_addr = 0;
1364
    ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1365
    if (ret < 0) {
1366
        perror("bind");
1367
        return -1;
1368
    }
1369
    ret = listen(fd, 0);
1370
    if (ret < 0) {
1371
        perror("listen");
1372
        return -1;
1373
    }
1374
    return fd;
1375
}
1376

    
1377
int gdbserver_start(int port)
1378
{
1379
    gdbserver_fd = gdbserver_open(port);
1380
    if (gdbserver_fd < 0)
1381
        return -1;
1382
    /* accept connections */
1383
    gdb_accept (NULL);
1384
    return 0;
1385
}
1386
#else
1387
static int gdb_chr_can_receive(void *opaque)
1388
{
1389
  return 1;
1390
}
1391

    
1392
static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
1393
{
1394
    GDBState *s = opaque;
1395
    int i;
1396

    
1397
    for (i = 0; i < size; i++) {
1398
        gdb_read_byte(s, buf[i]);
1399
    }
1400
}
1401

    
1402
static void gdb_chr_event(void *opaque, int event)
1403
{
1404
    switch (event) {
1405
    case CHR_EVENT_RESET:
1406
        vm_stop(EXCP_INTERRUPT);
1407
        gdb_syscall_state = opaque;
1408
        break;
1409
    default:
1410
        break;
1411
    }
1412
}
1413

    
1414
int gdbserver_start(const char *port)
1415
{
1416
    GDBState *s;
1417
    char gdbstub_port_name[128];
1418
    int port_num;
1419
    char *p;
1420
    CharDriverState *chr;
1421

    
1422
    if (!port || !*port)
1423
      return -1;
1424

    
1425
    port_num = strtol(port, &p, 10);
1426
    if (*p == 0) {
1427
        /* A numeric value is interpreted as a port number.  */
1428
        snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1429
                 "tcp::%d,nowait,nodelay,server", port_num);
1430
        port = gdbstub_port_name;
1431
    }
1432

    
1433
    chr = qemu_chr_open(port);
1434
    if (!chr)
1435
        return -1;
1436

    
1437
    s = qemu_mallocz(sizeof(GDBState));
1438
    if (!s) {
1439
        return -1;
1440
    }
1441
    s->env = first_cpu; /* XXX: allow to change CPU */
1442
    s->chr = chr;
1443
    qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
1444
                          gdb_chr_event, s);
1445
    qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1446
    return 0;
1447
}
1448
#endif