kvm: Consider EXIT_DEBUG unknown without CAP_SET_GUEST_DEBUG
Without KVM_CAP_SET_GUEST_DEBUG, we neither motivate the kernel toreport KVM_EXIT_DEBUG nor do we expect such exits. So fall through tothe arch code which will simply report an unknown exit reason....
kvm: Keep KVM_RUN return value in separate variable
Avoid using 'ret' both for the return value of KVM_RUN as well as thecode kvm_cpu_exec is supposed to return. Both have no direct relation.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
kvm: Reorder error handling of KVM_RUN
Test for general errors first as this is the slower path.
kvm: Rework inner loop of kvm_cpu_exec
Let kvm_cpu_exec return EXCP_* values consistently and generate thosecodes already inside its inner loop. This means we will now re-enter thekernel while ret == 0.
Update kvm_handle_internal_error accordingly, but keep...
kvm: Align kvm_arch_handle_exit to kvm_cpu_exec changes
Make the return code of kvm_arch_handle_exit directly usable forkvm_cpu_exec. This is straightforward for x86 and ppc, just s390would require more work. Avoid this for now by pushing the return code...
kvm: Add in-kernel irqchip awareness to cpu_thread_is_idle
With in-kernel irqchip support enabled, the vcpu threads sleep in kernelspace while halted. Account for this difference in cpu_thread_is_idle.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
kvm: x86: Do not leave halt if interrupts are disabled
When an external interrupt is pending but IF is cleared, we must notleave the halt state prematurely.
kvm: Mark VCPU state dirty on creation
This avoids that early cpu_synchronize_state calls try to retrieve anuninitialized state from the kernel. That even causes a deadlock ifio-thread is enabled.
x86: Properly reset PAT MSR
Conforming to the Intel spec, set the power-on value of PAT also onreset, but save it across INIT.
x86: Save/restore PAT MSR
kvm: x86: Synchronize PAT MSR with the kernel
Implement qemu_kvm_eat_signals only for CONFIG_LINUX
qemu_kvm_eat_signals requires POSIX support with realtime extensions forsigtimedwait. Not all our target platforms provide this. Moreover,undefined sigbus_reraise was referenced on non-Linux as well....
x86: Unbreak TCG support for hardware breakpoints
Commit 83f338f73e broke x86 hardware breakpoint emulation by moving thedebug exception handling out of cpu_exec. Fix this by moving all TCGrelated bits back, only leaving the generic guest debugging parts in...
s390: Detect invalid invocations of qemu_ram_free/remap
This both detects invalid invocations of qemu_ram_free andqemu_ram_remap when mem_path is non-NULL and fixes a build error ons390 ("'area' may be used uninitialized in this function").
kvm: x86: Consolidate TCG and KVM MCE injection code
This switches KVM's MCE injection path to cpu_x86_inject_mce, both forSIGBUS and monitor initiated events. This means we prepare the MCA MSRsin the VCPUState also for KVM.
We have to drop the MSRs writeback restrictions for this purpose which...
kvm: x86: Clean up kvm_setup_mce
There is nothing to abstract here. Fold kvm_setup_mce into its callerand fix up the error reporting (return code of kvm_vcpu_ioctl holds theerror value).
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>CC: Huang Ying <ying.huang@intel.com>...
kvm: x86: Fail kvm_arch_init_vcpu if MCE initialization fails
There is no reason to continue if the kernel claims to support MCE butthen fails to process our request.
Add qemu_ram_remap
qemu_ram_remap() unmaps the specified RAM pages, then re-maps thesepages again. This is used by KVM HWPoison support to clear HWPoisonedpage tables across guest rebooting, so that a new page may beallocated later to recover the memory error....
KVM, MCE, unpoison memory address across reboot
In Linux kernel HWPoison processing implementation, the virtualaddress in processes mapping the error physical memory page is markedas HWPoison. So that, the further accessing to the virtualaddress will kill corresponding processes with SIGBUS....
x86: Account for MCE in cpu_has_work
MCEs can be injected asynchronously, so they can also terminate the haltstate.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>CC: Huang Ying <ying.huang@intel.com>CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>...
x86: Perform implicit mcg_status reset
Reorder mcg_status in CPUState to achieve automatic clearing on reset.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>CC: Huang Ying <ying.huang@intel.com>CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>CC: Jin Dongming <jin.dongming@np.css.fujitsu.com>...
x86: Small cleanups of MCE helpers
Fix some code style issues, use proper headers, and align to cpu_x86naming scheme. No functional changes.
x86: Refine error reporting of MCE injection services
As this service is used by the human monitor, make sure that errors getreported to the right channel, and also raise the verbosity.
This requires to move Monitor typedef in qemu-common.h to resolve the...
x86: Optionally avoid injecting AO MCEs while others are pending
Allow to tell cpu_x86_inject_mce that it should ignore Action OptionalMCE events when the target VCPU is still processing another one. Thiswill be used by KVM soon.
Synchronize VCPU states before reset
This is required to support keeping VCPU states across a system reset.If we do not read the current state before the reset,cpu_synchronize_all_post_reset may write back incorrect stateinformation.
The first user of this will be MCE MSR synchronization which currently...
kvm: x86: Move MCE functions together
Pure function suffling to avoid multiple #ifdef KVM_CAP_MCE sections,no functional changes. While at it, annotate some #ifdef sections.
kvm: Rename kvm_arch_process_irqchip_events to async_events
We will broaden the scope of this function on x86 beyond irqchip events.
kvm: x86: Inject pending MCE events on state writeback
The current way of injecting MCE events without updating of andsynchronizing with the CPUState is broken and causes spuriouscorruptions of the MCE-related parts of the CPUState.
As a first step towards a fix, enhance the state writeback code with...
x86: Run qemu_inject_x86_mce on target VCPU
We will use the current TCG-only MCE injection path for KVM as well, andthen this read-modify-write of the target VCPU state has to be performedsynchronously in the corresponding thread.
kvm: ppc: Fix breakage of kvm_arch_pre_run/process_irqchip_events
Commit 7a39fe5882 failed to convert the right arch function.
kvm: Fix build warning when KVM_CAP_SET_GUEST_DEBUG is lacking
Original fix by David Gibson.
CC: David Gibson <david@gibson.dropbear.id.au>Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
do not use timedwait on qemu_halt_cond
The following conditions can cause cpu_has_work(env) to become true:
- env->queued_work_first: run_on_cpu is already kicking the VCPU
- env->stop = 1: pause_all_vcpus is already kicking the VCPU
- env->stopped = 0: resume_all_vcpus is already kicking the VCPU...
do not use timedwait on qemu_system_cond
qemu_main_loop_start is the only place where qemu_system_ready is setto 1.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
do not use timedwait on qemu_pause_cond
all_vcpus_paused can start returning true after penv->stopped changesfrom 0 to 1. When this is done, qemu_pause_cond is always signaled.
do not use timedwait on qemu_cpu_cond
Whenever env->created becomes true, qemu_cpu_cond is signaled by {kvm,tcg}_cpu_thread_fn.
iothread stops the vcpu thread via IPI
merge all signal initialization with qemu_signalfd_init, rename
provide dummy signal init functions for win32
protect qemu_cpu_kick_self for Win32
add Win32 IPI service
Refactor thread retrieval and check
We have qemu_cpu_self and qemu_thread_self. The latter is retrieving thecurrent thread, the former is checking for equality (using CPUState). Wealso have qemu_thread_equal which is only used like qemu_cpu_self.
This refactors the interfaces, creating qemu_cpu_is_self and...
add win32 qemu-thread implementation
For now, qemu_cond_timedwait and qemu_mutex_timedlock are left asPOSIX-only functions. They can be removed later, once the patchesthat remove their uses are in.
include qemu-thread.h early
add assertions on the owner of a QemuMutex
These are already present in the Win32 implementation, add them tothe pthread wrappers as well. Use PTHREAD_MUTEX_ERRORCHECK for mutexoperations. Later we'll add tracking of the owner for cond_signal/broadcast....
remove CONFIG_THREAD
inline cpu_halted into sole caller
All implementations are now the same, and there is only one caller,so inline the function there.
always qemu_cpu_kick after unhalting a cpu
This ensures env->halt_cond is broadcast, and the loop inqemu_tcg_wait_io_event and qemu_kvm_wait_io_event is exitednaturally rather than through a timeout.
exit round-robin vcpu loop if cpu->stopped is true
Sometimes vcpus are stopped directly without going through ->stop = 1.Exit the VCPU execution loop in this case as well.
always signal pause_cond after stopping a VCPU
unlock iothread during WaitForMultipleObjects
implement win32 dynticks timer
use win32 timer queues
Multimedia timers are only useful for compatibility with Windows NT 4.0and earlier. Plus, the implementation in Wine is extremely heavyweight.
hw/fmopl: Fix buffer access out-of-bounds errors
Index 75 is one too large for AR_TABLE75, DR_TABLE75.This error was reported by cppcheck.
hw/fmopl.c:600: error: Buffer access out-of-bounds: OPL.AR_TABLEhw/fmopl.c:601: error: Buffer access out-of-bounds: OPL.DR_TABLE...
moving eeprom initialization
The initialization should not be only on reset but also when initializingthe device.It resolves a bug when hot plugging a pci network device: the mac addresswas always null.
Signed-off-by: William Dauchy <wdauchy@gmail.com>...
pc: fix wrong CMOS values for floppy drives
Before commit 63ffb564dca94f8bda01ed6d209784104630a4d2, states forfloppy drives were calculated in fdc.c:fd_revalidate(). There it isalso considered whether a disk is inserted or not. The commit didn't copythe logic completely to pc.c, which caused a regression....
microblaze: Fix PetaLogix company name
trivial fix.
Signed-off-by: Michal Simek <monstr@monstr.eu>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
microblaze: Add PVR for writeback cache, endians
Specify PVR for writeback cache, endians and others.
Merge remote branch 'stefanha/tracing' into staging
vmstate: Fix varrays with uint8 indexes
Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
vmstate: add UINT32 VARRAYS
vmstate: add VMSTATE_STRUCT_VARRAY_INT32
vmstate: add VMSTATE_INT64_ARRAY
vmstate: add VMSTATE_STRUCT_VARRAY_UINT32
vmstate: Add a way to send a partial array
vmstate: be able to store/save a pci device from a pointer
vmstate: move timers to use test instead of version
vnc: Fix stack corruption and other bitmap related bugs
Commit bc2429b9174ac2d3c56b7fd35884b0d89ec7fb02 introduceda severe bug (stack corruption).
bitmap_clear was called with a wrong argumentwhich caused out-of-bound writes to the local variable width_mask....
vmstate: add VMSTATE_UINT32_EQUAL
Fix performance regression in qemu_get_ram_ptr
When the commit f471a17e9d869df3c6573f7ec02c4725676d6f3a converted theram_blocks structure to QLIST, it also removed the conditional check beforeswitching the current block at the beginning of the list.
In the common use case where ram_blocks has a few blocks with only one...
hmp-commands.hx: fix badly merged client_migrate_info command
client_migrate_info was merged badly, placing it between the commandand the documentation for another command. In addition it did notrespect the general rule of hmp-commands.hx, of having command...
xilinx-ethlite: Simplify byteswapping to/from brams
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
mainstone: PCMCIA support
Extend mst_fpga and mainstone with logic to support PCMCIAattachment (IRQs, status regs).
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
mainstone: use gpio 0 for connection of FPGA instead of hooking into PIC directly
pxa2xx_timer: Get rid of .level in PXA2xxTimer0.
pxa2xx_pic: fixup initialisation
This is based on Dmitry Eremin-Solenikov's patch but simplified.
pxa2xx_timer: separate irq for pxa27x handling
First, sysbus_init_irq shan't be called on on-stack variables. Indeed,it only stores a passed pointer in qdev and the stored irq is laterpopulated, so we get a nice write-to-stack bug.Second, irq for pxa27x should probably be handled in a more gentler way,...
trace: Trace posix-aio-compat.c completion and cancellation
This patch adds paio_complete() and paio_cancel() trace events tocomplement the paio_submit() event.
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
trace: Trace bdrv_aio_flush()
Add a trace event for bdrv_aio_flush() to complement the existingbdrv_aio_readv() and bdrv_aio_writev() events.
simpletrace: Thread-safe tracing
Trace events outside the global mutex cannot be used with the simpletrace backend since it is not thread-safe. There is no check to preventthem being enabled so people sometimes learn this the hard way.
This patch restructures the simple trace backend with a ring buffer...
Add lm32 target to configure
Signed-off-by: Michael Walle <michael@walle.cc>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
MAINTAINERS: add LatticeMico32 maintainer
Add me as the lm32-target and machines maintainer.
lm32: system control model
This patch add support for a system control block. It is supposed toact as helper for the emulated program. E.g. shutting down the VM orprinting test results. This model is intended for testing purposes only anddoesn't fit to any real hardware. Therefore, it is not added to any board...
lm32: support for creating device tree
This patch adds helper functions to create a ROM, which contains a hardwaredescription of a board. This is used in Theobromas LM32 Linux port.
lm32: EVR32 and uclinux BSP
This patch adds support for the following two BSPs: - LM32 EVR32 BSP (as used by RTEMS) - uclinux BSP by Theobroma Systems
lm32: todo and documentation
This patch adds general target documentation and a todo list.
lm32: opcode testsuite
This patch creates tests/lm32 directory and adds tests for everyLatticeMico32 opcode.
LatticeMico32 target support
This patch adds support for the LatticeMico32 softcore processor by LatticeSemiconductor.
lm32: translation routines
This patch adds the main translation routine. All opcodes of theLatticeMico32 processor are supported and translated to TCG ops.
lm32: translation code helper
This patch adds translation helper functions.
lm32: machine state loading/saving
This patch adds support for saving and loading the processor state.
lm32: gdbstub support
This patch adds lm32 support to the gdbstub.
lm32: interrupt controller model
This patch adds the interrupt controller of the lm32. Because the PIC isaccessed through special control registers and opcodes, there are callbacksfrom the lm32 translation code to this model.
Signed-off-by: Michael Walle <michael@walle.cc>...
lm32: juart model
This patch adds the JTAG UART model. It is accessed through special controlregisters and opcodes. Therefore the translation uses callbacks to thismodel.
lm32: pic and juart helper functions
This patch adds init functions for the PIC and JTAG UART commonly usedin the board initialization.
lm32: timer model
This patch adds support for the LatticeMico32 system timer.
lm32: uart model
This patch add support for the LatticeMico32 UART.
target-arm: Implement a minimal set of cp14 debug registers
Newer ARM kernels try to probe for whether the CPU has hardware breakpointsupport. For this to work QEMU has to implement a minimal set of the cp14debug registers. The architecture requires v7 cores to implement debug...
target-arm: Use TCG temporary leak debugging facilities
Use the new TCG temporary leak debugging facilities tocheck that each ARM instruction does not leak temporaries.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-arm: Remove ad-hoc leak checking code
This commit removes the ad-hoc resource leak checking code fromtarget-arm. This includes replacing all uses of new_tmp() withtcg_temp_new_i32() and all uses of dead_tmp() withtcg_temp_free_i32().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
tcg: Add support for debugging leakage of temporaries
Add support (if CONFIG_DEBUG_TCG is defined) for debugging leakageof temporary variables. Generally any temporaries created bya target while it is translating an instruction should be freedby the end of that instruction; otherwise carefully crafted...