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# Date Author Comment
bb4ea393 03/16/2011 10:11 pm Jan Kiszka

kvm: Align kvm_arch_handle_exit to kvm_cpu_exec changes

Make the return code of kvm_arch_handle_exit directly usable for
kvm_cpu_exec. This is straightforward for x86 and ppc, just s390
would require more work. Avoid this for now by pushing the return code...

99036865 03/15/2011 06:19 am Jan Kiszka

kvm: Rename kvm_arch_process_irqchip_events to async_events

We will broaden the scope of this function on x86 beyond irqchip events.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Marcelo Tosatti <>

bdcbd3e2 03/15/2011 06:19 am Jan Kiszka

kvm: ppc: Fix breakage of kvm_arch_pre_run/process_irqchip_events

Commit 7a39fe5882 failed to convert the right arch function.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Marcelo Tosatti <>

eda48c34 03/13/2011 04:44 pm Paolo Bonzini

inline cpu_halted into sole caller

All implementations are now the same, and there is only one caller,
so inline the function there.

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Blue Swirl <>

c5d69e6b 02/16/2011 04:47 pm Anthony Liguori

Merge remote branch 'qemu-kvm/uq/master' into staging

630ecca0 02/16/2011 04:35 pm Tristan Gingold

Handle icount for powerpc tbl/tbu/decr load and store.

Handle option '-icount X' on powerpc targets.

Signed-off-by: Tristan Gingold <>
Signed-off-by: Edgar E. Iglesias <>

7a39fe58 02/14/2011 04:39 pm Jan Kiszka

kvm: Drop return values from kvm_arch_pre/post_run

We do not check them, and the only arch with non-empty implementations
always returns 0 (this is also true for qemu-kvm).

Signed-off-by: Jan Kiszka <>
CC: Alexander Graf <>...

a1b87fe0 02/14/2011 04:39 pm Jan Kiszka

kvm: Provide sigbus services arch-independently

Provide arch-independent kvm_on_sigbus* stubs to remove the #ifdef'ery
from cpus.c. This patch also fixes --disable-kvm build by providing the
missing kvm_on_sigbus_vcpu kvm-stub.

Signed-off-by: Jan Kiszka <>...

b3a98367 02/01/2011 11:32 pm Anthony Liguori

Merge remote branch 'qemu-kvm/uq/master' into staging

aliguori: fix build with !defined(KVM_CAP_ASYNC_PF)

Signed-off-by: Anthony Liguori <>

94a8d39a 01/23/2011 06:27 am Jan Kiszka

kvm: Consolidate must-have capability checks

Instead of splattering the code with #ifdefs and runtime checks for
capabilities we cannot work without anyway, provide central test
infrastructure for verifying their availability both at build and
runtime.

Signed-off-by: Jan Kiszka <>...

cad1e282 01/23/2011 06:27 am Jan Kiszka

kvm: Drop smp_cpus argument from init functions

No longer used.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Marcelo Tosatti <>

73aaec4a 01/23/2011 06:27 am Jan Kiszka

kvm: Stop on all fatal exit reasons

Ensure that we stop the guest whenever we face a fatal or unknown exit
reason. If we stop, we also have to enforce a cpu loop exit.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Marcelo Tosatti <>

5823947f 01/22/2011 12:12 am Edgar E. Iglesias

ppc: Correct BookE tlb reads

Call the tlb read helper (and not the write helper) for tlb
reads.

Signed-off-by: Edgar E. Iglesias <>

d788b570 01/20/2011 04:11 pm Aurelien Jarno

target-ppc: fix wrong NaN tests

Some tests in FPU emulation code were wrongly using float64_is_nan()
before commit 185698715dfb18c82ad2a5dbc169908602d43e81, and wrongly
using float64_is_quiet_nan() after. Fix them by using float64_is_any_nan()
instead.

Reviewed-by: Nathan Froyd <>...

96912e39 01/20/2011 04:11 pm Aurelien Jarno

target-ppc: fix sNaN propagation

The current FPU code returns 0.0 if one of the operand is a
signaling NaN and the VXSNAN exception is disabled.

fload_invalid_op_excp() doesn't return a qNaN in case of a VXSNAN
exception as the operand should be propagated instead of a new...

82b323cd 01/06/2011 05:12 pm Aurelien Jarno

target-ppc: use float32_is_any_nan()

Use the new function float32_is_any_nan() instead of
float32_is_quiet_nan() || float32_is_signaling_nan().

Acked-by: Alexander Graf <>
Signed-off-by: Aurelien Jarno <>

3eb28bbd 01/06/2011 05:10 pm Aurelien Jarno

target-ppc: fix default qNaN

On PPC the default qNaN doesn't have the sign bit set.

Acked-by: Alexander Graf <>
Signed-off-by: Aurelien Jarno <>

dd94ad96 01/06/2011 05:10 pm Aurelien Jarno

target-ppc: remove PRECISE_EMULATION define

The PRECISE_EMULATION is "hardcoded" to one in target-ppc/exec.h and not
something easily tunable. Remove it and non-precise emulation code as
it doesn't make a noticeable difference in speed. People wanting speed...

18569871 01/02/2011 12:15 pm Peter Maydell

softfloat: Rename float*_is_nan() functions to float*_is_quiet_nan()

The softfloat functions float*_is_nan() were badly misnamed,
because they return true only for quiet NaNs, not for all NaNs.
Rename them to float*_is_quiet_nan() to more accurately reflect...

6d5c34fa 12/31/2010 10:17 pm Mike Pall

Fix translation of unary PPC/SPE instructions (efdneg etc.).

Signed-off-by: Mike Pall <>
Signed-off-by: Aurelien Jarno <>

138b38b6 12/08/2010 10:30 pm Alexander Graf

ppc: kvm: fix signedness warning

I get a warning on a signed comparison with an unsigned variable, so
let's make the variable signed and be happy.

Signed-off-by: Alexander Graf <>
Signed-off-by: Edgar E. Iglesias <>

9a78eead 10/30/2010 11:01 am Stefan Weil

target-xxx: Use fprintf_function (format checking)

fprintf_function uses format checking with GCC_FMT_ATTR.

Format errors were fixed in
  • target-i386/helper.c
  • target-mips/translate.c
  • target-ppc/translate.c

Cc: Blue Swirl <>
Signed-off-by: Stefan Weil <>...

577f25a5 10/13/2010 09:43 pm Blue Swirl

ppc: avoid write only variables

Compiling with GCC 4.6.0 20100925 produced warnings:
/src/qemu/target-ppc/op_helper.c: In function 'helper_icbi':
/src/qemu/target-ppc/op_helper.c:351:14: error: variable 'tmp' set but not used [-Werror=unused-but-set-variable]...

ae0bfb79 10/13/2010 09:38 pm Blue Swirl

ppc: remove video.x

Only Mac-on-Linux stuff used video.x, OpenBIOS does not need it.

Remove video.x MoL hacks.

Signed-off-by: Alexander Graf <>
Signed-off-by: Blue Swirl <>

999fa40e 10/05/2010 07:38 pm John Clark

ppc: Minor 40x MMU fixes

  • Fix swapped reading of tlblo/hi.
  • Fix tlb exec permissions

Signed-off-by: John Clark <>
Signed-off-by: Alexander Graf <>
Signed-off-by: Edgar E. Iglesias <>

2c50e26e 09/30/2010 07:53 pm Edgar E. Iglesias

powerpc: Add a virtex5 ml507 refdesign board

Signed-off-by: Edgar E. Iglesias <>
Signed-off-by: Alexander Graf <>

95070372 09/30/2010 07:53 pm Edgar E. Iglesias

powerpc: Add a ppc-440x5 Xilinx model

Add a powerpc 440x5 with the model ID on the Xilinx virtex5.
Connect the 440x5 to the 40x interrupt logic.

Signed-off-by: Edgar E. Iglesias <>
Signed-off-by: Alexander Graf <>

a586e548 09/24/2010 11:01 pm Edgar E. Iglesias

powerpc: Improve emulation of the BookE MMU

Improve the emulation of the BookE MMU to be able to boot linux
on virtex5 boards.

Signed-off-by: Edgar E. Iglesias <>

d62d2863 09/18/2010 08:53 am Blue Swirl

PPC: Suppress gcc warnings with -Wtype-limits

The hack added by c5b76b381081680633e2e0a91216507430409fb2 was not
enough to avoid warnings with gcc flag -Wtype-limits. Add a new macro
to fix both problems.

Signed-off-by: Blue Swirl <>

41557447 09/15/2010 05:18 pm Alexander Graf

PPC: Redesign interrupt trigger path

According to the Book3S spec, the interrupt context starts with an MSR
value that is rather simple. If we leave out the HV case, it's almost
always 0.

To reflect this, let's redesign the way that MSR value gets calculated....

f844c817 09/15/2010 05:18 pm Alexander Graf

PPC: Enable hint bits for lwarx/ldarx

The lwarx and ldarx instructions have a bit to give some hint to the
CPU which is safe to ignore. We currently refuse to accept any instruction
with that bit set, as it used to be declared MBZ.

Let's remove the reserved bit and make the instruction work as expected....

24e0e38b 09/11/2010 03:29 pm Edgar E. Iglesias

powerpc: Avoid TLB related log spamming

Invalid TLB entries are normal and should not spam the log.

Signed-off-by: Edgar E. Iglesias <>

fc87e185 09/05/2010 12:50 pm Alexander Graf

KVM: PPC: Add level based interrupt logic

KVM on PowerPC used to have completely broken interrupt logic. Usually,
interrupts work by having a PIC that pulls a line up/down, so the CPU knows
that an interrupt is active. This line stays active until some action is...

45024f09 08/26/2010 07:13 pm Alexander Graf

PPC: Add PV hypercall transport through fw_cfg

On KVM for PPC we need to tell the guest which instructions to use when
doing a hypercall. The clean way to do this is to go through an ioctl
from userspace and passing it on to the guest using the device tree....

488243b0 07/19/2010 01:33 am Aurelien Jarno

target-ppc: fix power mode checking on 7400/7410

Only the PowerPC 7440/7450 family don't support DOZE mode. PowerPC
7400 and 7410 support it.

0bffbc6c 07/13/2010 07:18 pm Aurelien Jarno

target-ppc: add vexptefp instruction

Signed-off-by: Aurelien Jarno <>

a88790a1 07/03/2010 09:48 am Paolo Bonzini

remove exec-all.h inclusion from cpu.h

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Blue Swirl <>

10eb0cc0 07/03/2010 09:48 am Paolo Bonzini

move cpu_pc_from_tb to target-*/exec.h

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Blue Swirl <>

2bece2c8 06/16/2010 12:29 pm Richard Henderson

tcg: Optionally sign-extend 32-bit arguments for 64-bit hosts.

Some hosts (amd64, ia64) have an ABI that ignores the high bits
of the 64-bit register when passing 32-bit arguments. Others
require the value to be properly sign-extended for the type.
I.e. "int32_t" must be sign-extended and "uint32_t" must be...

0f89cc7b 05/31/2010 08:18 pm Thomas Monjalon

target-ppc: remove useless line

This line was a bit clear.
The next lines set or reset this bit (LE) depending of another bit (ILE).
So the first line is useless.

Signed-off-by: Thomas Monjalon <>
Signed-off-by: Aurelien Jarno <>

c3d420ea 05/31/2010 08:17 pm Thomas Monjalon

target-ppc: fix RFI by clearing some bits of MSR

Since commit 2ada0ed, "Return From Interrupt" is broken for PPC processors
because some interrupt specifics bits of SRR1 are copied to MSR.

SRR1 is a save of MSR during interrupt.
During RFI, MSR must be restored from SRR1....

0bfcd599 05/22/2010 11:02 am Blue Swirl

Fix %lld or %llx printf format use

Signed-off-by: Blue Swirl <>

c821c2bd 05/18/2010 09:21 pm Alexander Graf

PPC/KVM: make iothread work

When running with --enable-io-thread the timer we have doesn't help,
because it doesn't wake up the CPU thread. So instead we need to
actually kick it.

While at it I refined the logic a bit to not dumbly trigger a timer
every 500ms, but rather do it more often after an interrupt got injected....

4513d923 05/11/2010 08:03 pm Gleb Natapov

Do not stop VM if emulation failed in userspace.

Continue vcpu execution in case emulation failure happened while vcpu
was in userspace. In this case #UD will be injected into the guest
allowing guest OS to kill offending process and continue.

Signed-off-by: Gleb Natapov <>...

0af691d7 05/11/2010 08:02 pm Marcelo Tosatti

kvm: enable smp > 1

Process INIT/SIPI requests and enable -smp > 1.

Signed-off-by: Marcelo Tosatti <>
Signed-off-by: Avi Kivity <>

8d0d2eb6 05/05/2010 01:20 pm Richard Henderson

target-ppc: Remove duplicate cpu log.

Logging for -d cpu is done in generic code.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

05f92404 04/25/2010 11:32 pm Blue Swirl

ppc: remove dead assignments, spotted by clang analyzer

Value stored is never read.

Signed-off-by: Blue Swirl <>

7b13448f 04/18/2010 05:26 pm Blue Swirl

PPC: avoid function pointer type mismatch, spotted by clang

Fixes clang errors:
CC ppc-softmmu/translate.o
/src/qemu/target-ppc/translate.c:3748:13: error: comparison of distinct pointer types ('void (*)(void *, int, int)' and 'void *')
if (likely(read_cb != SPR_NOACCESS)) {...

de6a1dec 03/27/2010 12:37 am Dmitry Ilyevsky

target-ppc: generic PowerPC TBL

Time base SPRs TBL/TBU should be accessible in user/priv modes for reading
as specified in POWER ISA documentation. Therefore SPRs permissions were
changed in gen_tbl function.

Signed-off-by: Dmitry Ilyevsky <>...

d4c430a8 03/17/2010 04:44 am Paul Brook

Large page TLB flush

QEMU uses a fixed page size for the CPU TLB. If the guest uses large
pages then we effectively split these into multiple smaller pages, and
populate the corresponding TLB entries on demand.

When the guest invalidates the TLB by virtual address we must invalidate...

3c7b48b7 03/12/2010 08:44 pm Paul Brook

Target specific usermode cleanup

Disable various target specific code that is only relevant to system emulation.

Signed-off-by: Paul Brook <>

4fcc562b 03/12/2010 08:34 pm Paul Brook

Remove cpu_get_phys_page_debug from userspace emulation

cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it.

Signed-off-by: Paul Brook <>

52705890 03/12/2010 06:28 pm Richard Henderson

Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.

Removes a set of ifdefs from exec.c.

Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other
than Alpha. This will be used for page_find_alloc, which is
supposed to be using virtual addresses in the first place....

0aef4261 03/11/2010 10:29 pm Aurelien Jarno

target-ppc: fix evsrwu and evsrws (second try)

Signed-off-by: Aurelien Jarno <>

26b14dc4 03/11/2010 10:22 pm Aurelien Jarno

target-ppc: fix evsrwu and evsrws

Signed-off-by: Aurelien Jarno <>

e29ef9fa 03/11/2010 10:14 pm Aurelien Jarno

target-ppc: fix evslw instruction

Signed-off-by: Aurelien Jarno <>

ea375f9a 03/04/2010 05:29 am Jan Kiszka

KVM: Rework VCPU state writeback API

This grand cleanup drops all reset and vmsave/load related
synchronization points in favor of four(!) generic hooks:

- cpu_synchronize_all_states in qemu_savevm_state_complete
(initial sync from kernel before vmsave)...

db9a231d 02/28/2010 05:36 pm Aurelien Jarno

Revert "target-ppc: stop translation after a trap instruction"

This reverts commit 6454e7be1b2504533f7ffb190d54ebe2993cb434.

6c712321 02/28/2010 05:36 pm Aurelien Jarno

target-ppc: don't print invalid opcode messages on the console

Invalid opcode messages can be perfectly normal, for example if this
code is never executed. Don't print an error message on the console,
but keep the message in the log for debugging purposes....

6454e7be 02/28/2010 03:11 pm Aurelien Jarno

target-ppc: stop translation after a trap instruction

Signed-off-by: Aurelien Jarno <>

ae01847f 02/27/2010 05:10 pm Nathan Froyd

target-ppc: fix SPE evsplat* instructions

The shifts in the gen_evsplat* functions were expecting rA to be masked,
not extracted, and so used the wrong shift amounts to sign-extend or pad
with zeroes.

Signed-off-by: Nathan Froyd <>...

e6bba2ef 02/27/2010 05:10 pm Nathan Froyd

target-ppc: fix SPE evcmp* instructions

The CRF_{CH,CL,CH_OR_CL,CH_AND_CL} constants were all off by one bit
position. Because of this, the SPE evcmp* family of instructions would
store values in the result condition register that were also off by one
bit position....

dc333cd6 02/14/2010 04:10 pm Alexander Graf

PPC: tell the guest about the time base frequency

Our guest systems need to know by how much the timebase increases every second,
so there usually is a "timebase-frequency" property in the cpu leaf of the
device tree.

This property is missing in OpenBIOS....

b2eca445 02/14/2010 04:10 pm Alexander Graf

PPC: Fix large pages

We were masking 1TB SLB entries on the feature bit of 16 MB pages. Obviously
that breaks, so let's just ignore 1TB SLB entries for now and instead do
16MB pages correctly.

This fixes PPC64 Linux boot with -m above 256.

Signed-off-by: Alexander Graf <>...

c6a94ba5 02/14/2010 04:10 pm Alexander Graf

PPC: Add timer when running KVM

For some odd reason we sometimes hang inside KVM forever. I'd guess it's
a race condition where we actually have a level triggered interrupt, but
the infrastructure can't expose that yet, so the guest ACKs it, goes to
sleep and never gets notified that there's still an interrupt pending....

95ff895f 02/06/2010 06:14 pm Aurelien Jarno

target-ppc: change DCR helpers to target_long arguments

The recent transition to always have the DCR helper functions take 32 bit
values broke the PPC64 target, as target_long became 64 bits there.

This patch changes DCR helpers to target_long arguments, and cast the values...

49a945a3 01/20/2010 12:31 am Paolo Bonzini

kill regs_to_env and env_to_regs

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Anthony Liguori <>

dcbc9a70 01/14/2010 03:42 pm Edgar E. Iglesias

ppc-40x: Correct ESR for zone protection faults.

Raise the zone protection fault in ESR for TLB faults caused by
zone protection bits.

Signed-off-by: Edgar E. Iglesias <>

ec5c3e48 01/14/2010 03:42 pm Edgar E. Iglesias

ppc-40x: Correct decoding of zone protection bits.

The 40x MMU has 15 zones in the ZPR register.

Signed-off-by: Edgar E. Iglesias <>

c5b9729a 01/14/2010 03:42 pm Edgar E. Iglesias

ppc-40x: Correct check for Endian swapping TLB entries.

Bailout on 40x TLB entries with endianess swapping only if the entry
is valid.

Signed-off-by: Edgar E. Iglesias <>

f25359cd 01/14/2010 03:41 pm Edgar E. Iglesias

ppc-40x: Get TLB attributes from TLBLO.

The ZSEL was incorrectly beeing decoded from TLBHI. Decode it from
TLBLO instead.

Signed-off-by: Edgar E. Iglesias <>

73b01960 12/21/2009 05:03 pm Alexander Graf

PPC: Make DCR uint32_t

For what I know DCR is always 32 bits wide, so we should also use uint32_t to
pass it along the stacks.

This fixes a warning when compiling qemu-system-ppc64 with KVM enabled, making
it compile without --disable-werror

Signed-off-by: Alexander Graf <>...

b711de95 12/21/2009 02:52 pm Aurelien Jarno

PPC64: Fix alternate timebase

Fix the alternate time base the same way as the default timebase. SPR_ATBL
should return a 64-bit value on 64 bit implementations.

Signed-off-by: Aurelien Jarno <>

e3ea6529 12/21/2009 02:42 pm Alexander Graf

PPC64: Fix timebase

On PPC we have a 64-bit time base. Usually (PPC32) this is accessed using
two separate 32 bit SPR accesses to SPR_TBU and SPR_TBL.

On PPC64 the SPR_TBL register acts as 64 bit though, so we get the full
64 bits as return value. If we only take the lower ones, fine. But Linux...

82c09f2f 12/19/2009 10:30 am Alexander Graf

target-ppc: fix ppc32 kvm build

My segment sync patch broke compilation on PPC32, because it was trying to
sync the SLB even though ppc32 CPUs don't have an SLB.

So let's only sync it when we're on a PP64 one!

Signed-off-by: Alexander Graf <>...

ba5e5090 12/03/2009 09:10 pm Alexander Graf

target-ppc: Get MMU state on register sync

While x86 only needs to sync cr0-4 to know all about its MMU state and enable
qemu to resolve virtual to physical addresses, we need to sync all of the
segment registers on PPC to know which mapping we're in.

So let's grab the segment register contents to be able to use the "x" monitor...

caa5af0f 11/17/2009 04:49 pm Jan Kiszka

kvm: Add arch reset handler

Will be required by succeeding changes.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Anthony Liguori <>

812151f2 11/12/2009 07:23 pm Hollis Blanchard

kvm ppc: Remove unused label

Signed-off-by: Hollis Blanchard <>
Signed-off-by: Anthony Liguori <>

b55a37c9 11/07/2009 12:37 pm Blue Swirl

user: move CPU reset call to main.c for x86/PPC/Sparc

Signed-off-by: Blue Swirl <>

d84bda46 11/07/2009 12:36 pm Blue Swirl

PPC: rename cpu_ppc_reset to cpu_reset for consistency

Signed-off-by: Blue Swirl <>

e4394131 11/07/2009 11:32 am Blue Swirl

PPC: remove unneeded calls to device reset

Signed-off-by: Blue Swirl <>

cb2dbfc3 10/23/2009 01:14 am Aurelien Jarno

target-ppc: move often used CPU fields at the top of the structure

Signed-off-by: Aurelien Jarno <>

74d77cae 10/18/2009 05:15 pm Thomas Monjalon

target-ppc: simpler definitions for microcontrollers based on e300

No need to alias e300 core for each CPU package.
Differences between microcontrollers have to be implemented in a higher layer
than translate_init.c

Signed-off-by: Thomas Monjalon <>...

492d7bf5 10/18/2009 05:15 pm Thomas Monjalon

target-ppc: add declarations of microcontrollers based on e300

Add CPU declarations of MPC8343, MPC8343E, MPC8347 and MPC8347E.

Signed-off-by: Thomas Monjalon <>
Signed-off-by: Aurelien Jarno <>

8daf1781 10/18/2009 05:15 pm Thomas Monjalon

target-ppc: better support of e300 CPU core

Declare HID2 register.

Use high BATs for e300 (8 instead of 4).

Fix index of high BATs registers.
Before the fix, IBAT4-7 were overwriting IBAT0-3.

Signed-off-by: François Armand <>
Signed-off-by: Aurelien Jarno <>

c227f099 10/02/2009 12:12 am Anthony Liguori

Revert "Get rid of _t suffix"

In the very least, a change like this requires discussion on the list.

The naming convention is goofy and it causes a massive merge problem. Something
like this must be presented on the list first so people can provide input...

99a0949b 10/01/2009 09:45 pm malc

Get rid of _t suffix

Some not so obvious bits, slirp and Xen were left alone for the time
being.

Signed-off-by: malc <>

731c54f8 09/28/2009 02:40 pm Aurelien Jarno

target-ppc: log instructions start in TCG code

Signed-off-by: Aurelien Jarno <>

86178a57 09/25/2009 10:51 pm Juan Quintela

static and inline should came before the type of the functions

Signed-off-by: Juan Quintela <>
Signed-off-by: Blue Swirl <>

7fd6bf7d 09/18/2009 05:57 pm Aurelien Jarno

target-ppc: optimize slw/srw/sld/srd

Remove a temp local variable and a jump by computing a mask with shifts.

Signed-off-by: Aurelien Jarno <>

72cf2d4f 09/12/2009 10:36 am Blue Swirl

Fix sys-queue.h conflict for good

Problem: Our file sys-queue.h is a copy of the BSD file, but there are
some additions and it's not entirely compatible. Because of that, there have
been conflicts with system headers on BSD systems. Some hacks have been
introduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896,...

6ee093c9 09/11/2009 06:19 pm Juan Quintela

Unexport ticks_per_sec variable. Create get_ticks_per_sec() function

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

4c0960c0 08/28/2009 04:35 am Avi Kivity

kvm: Simplify cpu_synchronize_state()

cpu_synchronize_state() is a little unreadable since the 'modified'
argument isn't self-explanatory. Simplify it by making it always
synchronize the kernel state into qemu, and automatically flush the
registers back to the kernel if they've been synchronized on this...

0b5c1ce8 08/24/2009 04:21 pm Nathan Froyd

cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal

handle_cpu_signal is very nearly copy-paste code for each target, with a
few minor variations. This patch sets up appropriate defaults for a
generic handle_cpu_signal and provides overrides for particular targets...

b11ebf64 08/16/2009 02:54 pm Blue Swirl

Replace REGX with PRIx64

Signed-off-by: Blue Swirl <>

90e189ec 08/16/2009 02:13 pm Blue Swirl

Replace local ADDRX/PADDRX macros with TARGET_FMT_lx/plx

Signed-off-by: Blue Swirl <>

636aa200 08/16/2009 12:06 pm Blue Swirl

Replace always_inline with inline

We define inline as always_inline.

Signed-off-by: Blue Swirl <>

174c80d5 08/03/2009 07:33 pm Nathan Froyd

target-ppc: add cpu_set_tls

Signed-off-by: Nathan Froyd <>
Signed-off-by: malc <>

18b21a2f 08/03/2009 07:33 pm Nathan Froyd

target-ppc: retain l{w,d}arx loaded value

We do this so we can check on the corresponding stc{w,d}x. whether the
value has changed. It's a poor man's form of implementing atomic
operations and is valid only for NPTL usermode Linux emulation.

Signed-off-by: Nathan Froyd <>...

4425265b 08/03/2009 07:33 pm Nathan Froyd

target-ppc: add exceptions for conditional stores

Signed-off-by: Nathan Froyd <>
Signed-off-by: malc <>