Revision bb98fe42
| b/fpu/softfloat-macros.h | ||
|---|---|---|
| 44 | 44 |
| The result is stored in the location pointed to by `zPtr'. |
| 45 | 45 |
*----------------------------------------------------------------------------*/ |
| 46 | 46 |
|
| 47 |
INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr )
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|
| 47 |
INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr )
|
|
| 48 | 48 |
{
|
| 49 |
bits32 z;
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|
| 49 |
uint32_t z;
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|
| 50 | 50 |
|
| 51 | 51 |
if ( count == 0 ) {
|
| 52 | 52 |
z = a; |
| ... | ... | |
| 70 | 70 |
| The result is stored in the location pointed to by `zPtr'. |
| 71 | 71 |
*----------------------------------------------------------------------------*/ |
| 72 | 72 |
|
| 73 |
INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr )
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|
| 73 |
INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr )
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|
| 74 | 74 |
{
|
| 75 |
bits64 z;
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|
| 75 |
uint64_t z;
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| 76 | 76 |
|
| 77 | 77 |
if ( count == 0 ) {
|
| 78 | 78 |
z = a; |
| ... | ... | |
| 106 | 106 |
|
| 107 | 107 |
INLINE void |
| 108 | 108 |
shift64ExtraRightJamming( |
| 109 |
bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
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|
| 109 |
uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
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| 110 | 110 |
{
|
| 111 |
bits64 z0, z1;
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|
| 111 |
uint64_t z0, z1;
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| 112 | 112 |
int8 negCount = ( - count ) & 63; |
| 113 | 113 |
|
| 114 | 114 |
if ( count == 0 ) {
|
| ... | ... | |
| 143 | 143 |
|
| 144 | 144 |
INLINE void |
| 145 | 145 |
shift128Right( |
| 146 |
bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
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|
| 146 |
uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
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| 147 | 147 |
{
|
| 148 |
bits64 z0, z1;
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| 148 |
uint64_t z0, z1;
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| 149 | 149 |
int8 negCount = ( - count ) & 63; |
| 150 | 150 |
|
| 151 | 151 |
if ( count == 0 ) {
|
| ... | ... | |
| 178 | 178 |
|
| 179 | 179 |
INLINE void |
| 180 | 180 |
shift128RightJamming( |
| 181 |
bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
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|
| 181 |
uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
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| 182 | 182 |
{
|
| 183 |
bits64 z0, z1;
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| 183 |
uint64_t z0, z1;
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| 184 | 184 |
int8 negCount = ( - count ) & 63; |
| 185 | 185 |
|
| 186 | 186 |
if ( count == 0 ) {
|
| ... | ... | |
| 229 | 229 |
|
| 230 | 230 |
INLINE void |
| 231 | 231 |
shift128ExtraRightJamming( |
| 232 |
bits64 a0,
|
|
| 233 |
bits64 a1,
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| 234 |
bits64 a2,
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| 232 |
uint64_t a0,
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| 233 |
uint64_t a1,
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| 234 |
uint64_t a2,
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| 235 | 235 |
int16 count, |
| 236 |
bits64 *z0Ptr,
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| 237 |
bits64 *z1Ptr,
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| 238 |
bits64 *z2Ptr
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|
| 236 |
uint64_t *z0Ptr,
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| 237 |
uint64_t *z1Ptr,
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| 238 |
uint64_t *z2Ptr
|
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| 239 | 239 |
) |
| 240 | 240 |
{
|
| 241 |
bits64 z0, z1, z2;
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|
| 241 |
uint64_t z0, z1, z2;
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| 242 | 242 |
int8 negCount = ( - count ) & 63; |
| 243 | 243 |
|
| 244 | 244 |
if ( count == 0 ) {
|
| ... | ... | |
| 287 | 287 |
|
| 288 | 288 |
INLINE void |
| 289 | 289 |
shortShift128Left( |
| 290 |
bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
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|
| 290 |
uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
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| 291 | 291 |
{
|
| 292 | 292 |
|
| 293 | 293 |
*z1Ptr = a1<<count; |
| ... | ... | |
| 306 | 306 |
|
| 307 | 307 |
INLINE void |
| 308 | 308 |
shortShift192Left( |
| 309 |
bits64 a0,
|
|
| 310 |
bits64 a1,
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|
| 311 |
bits64 a2,
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|
| 309 |
uint64_t a0,
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| 310 |
uint64_t a1,
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| 311 |
uint64_t a2,
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| 312 | 312 |
int16 count, |
| 313 |
bits64 *z0Ptr,
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| 314 |
bits64 *z1Ptr,
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| 315 |
bits64 *z2Ptr
|
|
| 313 |
uint64_t *z0Ptr,
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| 314 |
uint64_t *z1Ptr,
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| 315 |
uint64_t *z2Ptr
|
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| 316 | 316 |
) |
| 317 | 317 |
{
|
| 318 |
bits64 z0, z1, z2;
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|
| 318 |
uint64_t z0, z1, z2;
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| 319 | 319 |
int8 negCount; |
| 320 | 320 |
|
| 321 | 321 |
z2 = a2<<count; |
| ... | ... | |
| 341 | 341 |
|
| 342 | 342 |
INLINE void |
| 343 | 343 |
add128( |
| 344 |
bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr )
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|
| 344 |
uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1, uint64_t *z0Ptr, uint64_t *z1Ptr )
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| 345 | 345 |
{
|
| 346 |
bits64 z1;
|
|
| 346 |
uint64_t z1;
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| 347 | 347 |
|
| 348 | 348 |
z1 = a1 + b1; |
| 349 | 349 |
*z1Ptr = z1; |
| ... | ... | |
| 361 | 361 |
|
| 362 | 362 |
INLINE void |
| 363 | 363 |
add192( |
| 364 |
bits64 a0,
|
|
| 365 |
bits64 a1,
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|
| 366 |
bits64 a2,
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|
| 367 |
bits64 b0,
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|
| 368 |
bits64 b1,
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| 369 |
bits64 b2,
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| 370 |
bits64 *z0Ptr,
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| 371 |
bits64 *z1Ptr,
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| 372 |
bits64 *z2Ptr
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|
| 364 |
uint64_t a0,
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| 365 |
uint64_t a1,
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|
| 366 |
uint64_t a2,
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| 367 |
uint64_t b0,
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|
| 368 |
uint64_t b1,
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| 369 |
uint64_t b2,
|
|
| 370 |
uint64_t *z0Ptr,
|
|
| 371 |
uint64_t *z1Ptr,
|
|
| 372 |
uint64_t *z2Ptr
|
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| 373 | 373 |
) |
| 374 | 374 |
{
|
| 375 |
bits64 z0, z1, z2;
|
|
| 375 |
uint64_t z0, z1, z2;
|
|
| 376 | 376 |
int8 carry0, carry1; |
| 377 | 377 |
|
| 378 | 378 |
z2 = a2 + b2; |
| ... | ... | |
| 399 | 399 |
|
| 400 | 400 |
INLINE void |
| 401 | 401 |
sub128( |
| 402 |
bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr )
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|
| 402 |
uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1, uint64_t *z0Ptr, uint64_t *z1Ptr )
|
|
| 403 | 403 |
{
|
| 404 | 404 |
|
| 405 | 405 |
*z1Ptr = a1 - b1; |
| ... | ... | |
| 417 | 417 |
|
| 418 | 418 |
INLINE void |
| 419 | 419 |
sub192( |
| 420 |
bits64 a0,
|
|
| 421 |
bits64 a1,
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|
| 422 |
bits64 a2,
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|
| 423 |
bits64 b0,
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|
| 424 |
bits64 b1,
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|
| 425 |
bits64 b2,
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|
| 426 |
bits64 *z0Ptr,
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|
| 427 |
bits64 *z1Ptr,
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|
| 428 |
bits64 *z2Ptr
|
|
| 420 |
uint64_t a0,
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|
| 421 |
uint64_t a1,
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|
| 422 |
uint64_t a2,
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|
| 423 |
uint64_t b0,
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|
| 424 |
uint64_t b1,
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|
| 425 |
uint64_t b2,
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|
| 426 |
uint64_t *z0Ptr,
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|
| 427 |
uint64_t *z1Ptr,
|
|
| 428 |
uint64_t *z2Ptr
|
|
| 429 | 429 |
) |
| 430 | 430 |
{
|
| 431 |
bits64 z0, z1, z2;
|
|
| 431 |
uint64_t z0, z1, z2;
|
|
| 432 | 432 |
int8 borrow0, borrow1; |
| 433 | 433 |
|
| 434 | 434 |
z2 = a2 - b2; |
| ... | ... | |
| 451 | 451 |
| `z0Ptr' and `z1Ptr'. |
| 452 | 452 |
*----------------------------------------------------------------------------*/ |
| 453 | 453 |
|
| 454 |
INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr )
|
|
| 454 |
INLINE void mul64To128( uint64_t a, uint64_t b, uint64_t *z0Ptr, uint64_t *z1Ptr )
|
|
| 455 | 455 |
{
|
| 456 |
bits32 aHigh, aLow, bHigh, bLow;
|
|
| 457 |
bits64 z0, zMiddleA, zMiddleB, z1;
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|
| 456 |
uint32_t aHigh, aLow, bHigh, bLow;
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|
| 457 |
uint64_t z0, zMiddleA, zMiddleB, z1;
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| 458 | 458 |
|
| 459 | 459 |
aLow = a; |
| 460 | 460 |
aHigh = a>>32; |
| 461 | 461 |
bLow = b; |
| 462 | 462 |
bHigh = b>>32; |
| 463 |
z1 = ( (bits64) aLow ) * bLow;
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|
| 464 |
zMiddleA = ( (bits64) aLow ) * bHigh;
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| 465 |
zMiddleB = ( (bits64) aHigh ) * bLow;
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| 466 |
z0 = ( (bits64) aHigh ) * bHigh;
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| 463 |
z1 = ( (uint64_t) aLow ) * bLow;
|
|
| 464 |
zMiddleA = ( (uint64_t) aLow ) * bHigh;
|
|
| 465 |
zMiddleB = ( (uint64_t) aHigh ) * bLow;
|
|
| 466 |
z0 = ( (uint64_t) aHigh ) * bHigh;
|
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| 467 | 467 |
zMiddleA += zMiddleB; |
| 468 |
z0 += ( ( (bits64) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 );
|
|
| 468 |
z0 += ( ( (uint64_t) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 );
|
|
| 469 | 469 |
zMiddleA <<= 32; |
| 470 | 470 |
z1 += zMiddleA; |
| 471 | 471 |
z0 += ( z1 < zMiddleA ); |
| ... | ... | |
| 483 | 483 |
|
| 484 | 484 |
INLINE void |
| 485 | 485 |
mul128By64To192( |
| 486 |
bits64 a0,
|
|
| 487 |
bits64 a1,
|
|
| 488 |
bits64 b,
|
|
| 489 |
bits64 *z0Ptr,
|
|
| 490 |
bits64 *z1Ptr,
|
|
| 491 |
bits64 *z2Ptr
|
|
| 486 |
uint64_t a0,
|
|
| 487 |
uint64_t a1,
|
|
| 488 |
uint64_t b,
|
|
| 489 |
uint64_t *z0Ptr,
|
|
| 490 |
uint64_t *z1Ptr,
|
|
| 491 |
uint64_t *z2Ptr
|
|
| 492 | 492 |
) |
| 493 | 493 |
{
|
| 494 |
bits64 z0, z1, z2, more1;
|
|
| 494 |
uint64_t z0, z1, z2, more1;
|
|
| 495 | 495 |
|
| 496 | 496 |
mul64To128( a1, b, &z1, &z2 ); |
| 497 | 497 |
mul64To128( a0, b, &z0, &more1 ); |
| ... | ... | |
| 511 | 511 |
|
| 512 | 512 |
INLINE void |
| 513 | 513 |
mul128To256( |
| 514 |
bits64 a0,
|
|
| 515 |
bits64 a1,
|
|
| 516 |
bits64 b0,
|
|
| 517 |
bits64 b1,
|
|
| 518 |
bits64 *z0Ptr,
|
|
| 519 |
bits64 *z1Ptr,
|
|
| 520 |
bits64 *z2Ptr,
|
|
| 521 |
bits64 *z3Ptr
|
|
| 514 |
uint64_t a0,
|
|
| 515 |
uint64_t a1,
|
|
| 516 |
uint64_t b0,
|
|
| 517 |
uint64_t b1,
|
|
| 518 |
uint64_t *z0Ptr,
|
|
| 519 |
uint64_t *z1Ptr,
|
|
| 520 |
uint64_t *z2Ptr,
|
|
| 521 |
uint64_t *z3Ptr
|
|
| 522 | 522 |
) |
| 523 | 523 |
{
|
| 524 |
bits64 z0, z1, z2, z3;
|
|
| 525 |
bits64 more1, more2;
|
|
| 524 |
uint64_t z0, z1, z2, z3;
|
|
| 525 |
uint64_t more1, more2;
|
|
| 526 | 526 |
|
| 527 | 527 |
mul64To128( a1, b1, &z2, &z3 ); |
| 528 | 528 |
mul64To128( a1, b0, &z1, &more2 ); |
| ... | ... | |
| 548 | 548 |
| unsigned integer is returned. |
| 549 | 549 |
*----------------------------------------------------------------------------*/ |
| 550 | 550 |
|
| 551 |
static bits64 estimateDiv128To64( bits64 a0, bits64 a1, bits64 b )
|
|
| 551 |
static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b )
|
|
| 552 | 552 |
{
|
| 553 |
bits64 b0, b1;
|
|
| 554 |
bits64 rem0, rem1, term0, term1;
|
|
| 555 |
bits64 z;
|
|
| 553 |
uint64_t b0, b1;
|
|
| 554 |
uint64_t rem0, rem1, term0, term1;
|
|
| 555 |
uint64_t z;
|
|
| 556 | 556 |
|
| 557 | 557 |
if ( b <= a0 ) return LIT64( 0xFFFFFFFFFFFFFFFF ); |
| 558 | 558 |
b0 = b>>32; |
| 559 | 559 |
z = ( b0<<32 <= a0 ) ? LIT64( 0xFFFFFFFF00000000 ) : ( a0 / b0 )<<32; |
| 560 | 560 |
mul64To128( b, z, &term0, &term1 ); |
| 561 | 561 |
sub128( a0, a1, term0, term1, &rem0, &rem1 ); |
| 562 |
while ( ( (sbits64) rem0 ) < 0 ) {
|
|
| 562 |
while ( ( (int64_t) rem0 ) < 0 ) {
|
|
| 563 | 563 |
z -= LIT64( 0x100000000 ); |
| 564 | 564 |
b1 = b<<32; |
| 565 | 565 |
add128( rem0, rem1, b0, b1, &rem0, &rem1 ); |
| ... | ... | |
| 580 | 580 |
| value. |
| 581 | 581 |
*----------------------------------------------------------------------------*/ |
| 582 | 582 |
|
| 583 |
static bits32 estimateSqrt32( int16 aExp, bits32 a )
|
|
| 583 |
static uint32_t estimateSqrt32( int16 aExp, uint32_t a )
|
|
| 584 | 584 |
{
|
| 585 |
static const bits16 sqrtOddAdjustments[] = {
|
|
| 585 |
static const uint16_t sqrtOddAdjustments[] = {
|
|
| 586 | 586 |
0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0, |
| 587 | 587 |
0x039C, 0x0468, 0x0545, 0x0631, 0x072B, 0x0832, 0x0946, 0x0A67 |
| 588 | 588 |
}; |
| 589 |
static const bits16 sqrtEvenAdjustments[] = {
|
|
| 589 |
static const uint16_t sqrtEvenAdjustments[] = {
|
|
| 590 | 590 |
0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E, |
| 591 | 591 |
0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002 |
| 592 | 592 |
}; |
| 593 | 593 |
int8 index; |
| 594 |
bits32 z;
|
|
| 594 |
uint32_t z;
|
|
| 595 | 595 |
|
| 596 | 596 |
index = ( a>>27 ) & 15; |
| 597 | 597 |
if ( aExp & 1 ) {
|
| ... | ... | |
| 603 | 603 |
z = 0x8000 + ( a>>17 ) - sqrtEvenAdjustments[ (int)index ]; |
| 604 | 604 |
z = a / z + z; |
| 605 | 605 |
z = ( 0x20000 <= z ) ? 0xFFFF8000 : ( z<<15 ); |
| 606 |
if ( z <= a ) return (bits32) ( ( (sbits32) a )>>1 );
|
|
| 606 |
if ( z <= a ) return (uint32_t) ( ( (int32_t) a )>>1 );
|
|
| 607 | 607 |
} |
| 608 |
return ( (bits32) ( ( ( (bits64) a )<<31 ) / z ) ) + ( z>>1 );
|
|
| 608 |
return ( (uint32_t) ( ( ( (uint64_t) a )<<31 ) / z ) ) + ( z>>1 );
|
|
| 609 | 609 |
|
| 610 | 610 |
} |
| 611 | 611 |
|
| ... | ... | |
| 614 | 614 |
| `a'. If `a' is zero, 32 is returned. |
| 615 | 615 |
*----------------------------------------------------------------------------*/ |
| 616 | 616 |
|
| 617 |
static int8 countLeadingZeros32( bits32 a )
|
|
| 617 |
static int8 countLeadingZeros32( uint32_t a )
|
|
| 618 | 618 |
{
|
| 619 | 619 |
static const int8 countLeadingZerosHigh[] = {
|
| 620 | 620 |
8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, |
| ... | ... | |
| 655 | 655 |
| `a'. If `a' is zero, 64 is returned. |
| 656 | 656 |
*----------------------------------------------------------------------------*/ |
| 657 | 657 |
|
| 658 |
static int8 countLeadingZeros64( bits64 a )
|
|
| 658 |
static int8 countLeadingZeros64( uint64_t a )
|
|
| 659 | 659 |
{
|
| 660 | 660 |
int8 shiftCount; |
| 661 | 661 |
|
| 662 | 662 |
shiftCount = 0; |
| 663 |
if ( a < ( (bits64) 1 )<<32 ) {
|
|
| 663 |
if ( a < ( (uint64_t) 1 )<<32 ) {
|
|
| 664 | 664 |
shiftCount += 32; |
| 665 | 665 |
} |
| 666 | 666 |
else {
|
| ... | ... | |
| 677 | 677 |
| Otherwise, returns 0. |
| 678 | 678 |
*----------------------------------------------------------------------------*/ |
| 679 | 679 |
|
| 680 |
INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
|
|
| 680 |
INLINE flag eq128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
|
|
| 681 | 681 |
{
|
| 682 | 682 |
|
| 683 | 683 |
return ( a0 == b0 ) && ( a1 == b1 ); |
| ... | ... | |
| 690 | 690 |
| Otherwise, returns 0. |
| 691 | 691 |
*----------------------------------------------------------------------------*/ |
| 692 | 692 |
|
| 693 |
INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
|
|
| 693 |
INLINE flag le128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
|
|
| 694 | 694 |
{
|
| 695 | 695 |
|
| 696 | 696 |
return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 <= b1 ) ); |
| ... | ... | |
| 703 | 703 |
| returns 0. |
| 704 | 704 |
*----------------------------------------------------------------------------*/ |
| 705 | 705 |
|
| 706 |
INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
|
|
| 706 |
INLINE flag lt128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
|
|
| 707 | 707 |
{
|
| 708 | 708 |
|
| 709 | 709 |
return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) ); |
| ... | ... | |
| 716 | 716 |
| Otherwise, returns 0. |
| 717 | 717 |
*----------------------------------------------------------------------------*/ |
| 718 | 718 |
|
| 719 |
INLINE flag ne128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
|
|
| 719 |
INLINE flag ne128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
|
|
| 720 | 720 |
{
|
| 721 | 721 |
|
| 722 | 722 |
return ( a0 != b0 ) || ( a1 != b1 ); |
| b/fpu/softfloat-native.c | ||
|---|---|---|
| 418 | 418 |
u.f = a1; |
| 419 | 419 |
a = u.i; |
| 420 | 420 |
|
| 421 |
return ( LIT64( 0xFFF0000000000000 ) < (bits64) ( a<<1 ) );
|
|
| 421 |
return ( LIT64( 0xFFF0000000000000 ) < (uint64_t) ( a<<1 ) );
|
|
| 422 | 422 |
|
| 423 | 423 |
} |
| 424 | 424 |
|
| ... | ... | |
| 500 | 500 |
aLow = u.i.low & ~ LIT64( 0x4000000000000000 ); |
| 501 | 501 |
return |
| 502 | 502 |
( ( u.i.high & 0x7FFF ) == 0x7FFF ) |
| 503 |
&& (bits64) ( aLow<<1 )
|
|
| 503 |
&& (uint64_t) ( aLow<<1 )
|
|
| 504 | 504 |
&& ( u.i.low == aLow ); |
| 505 | 505 |
} |
| 506 | 506 |
|
| ... | ... | |
| 508 | 508 |
{
|
| 509 | 509 |
floatx80u u; |
| 510 | 510 |
u.f = a1; |
| 511 |
return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( u.i.low<<1 );
|
|
| 511 |
return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) && (uint64_t) ( u.i.low<<1 );
|
|
| 512 | 512 |
} |
| 513 | 513 |
|
| 514 | 514 |
#endif |
| b/fpu/softfloat-specialize.h | ||
|---|---|---|
| 52 | 52 |
*----------------------------------------------------------------------------*/ |
| 53 | 53 |
typedef struct {
|
| 54 | 54 |
flag sign; |
| 55 |
bits64 high, low;
|
|
| 55 |
uint64_t high, low;
|
|
| 56 | 56 |
} commonNaNT; |
| 57 | 57 |
|
| 58 | 58 |
/*---------------------------------------------------------------------------- |
| ... | ... | |
| 120 | 120 |
if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR ); |
| 121 | 121 |
z.sign = float16_val(a) >> 15; |
| 122 | 122 |
z.low = 0; |
| 123 |
z.high = ((bits64) float16_val(a))<<54;
|
|
| 123 |
z.high = ((uint64_t) float16_val(a))<<54;
|
|
| 124 | 124 |
return z; |
| 125 | 125 |
} |
| 126 | 126 |
|
| ... | ... | |
| 156 | 156 |
#if SNAN_BIT_IS_ONE |
| 157 | 157 |
return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); |
| 158 | 158 |
#else |
| 159 |
return ( 0xFF800000 <= (bits32) ( a<<1 ) );
|
|
| 159 |
return ( 0xFF800000 <= (uint32_t) ( a<<1 ) );
|
|
| 160 | 160 |
#endif |
| 161 | 161 |
} |
| 162 | 162 |
|
| ... | ... | |
| 169 | 169 |
{
|
| 170 | 170 |
uint32_t a = float32_val(a_); |
| 171 | 171 |
#if SNAN_BIT_IS_ONE |
| 172 |
return ( 0xFF800000 <= (bits32) ( a<<1 ) );
|
|
| 172 |
return ( 0xFF800000 <= (uint32_t) ( a<<1 ) );
|
|
| 173 | 173 |
#else |
| 174 | 174 |
return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); |
| 175 | 175 |
#endif |
| ... | ... | |
| 190 | 190 |
# error Rules for silencing a signaling NaN are target-specific |
| 191 | 191 |
# endif |
| 192 | 192 |
#else |
| 193 |
bits32 a = float32_val(a_);
|
|
| 193 |
uint32_t a = float32_val(a_);
|
|
| 194 | 194 |
a |= (1 << 22); |
| 195 | 195 |
return make_float32(a); |
| 196 | 196 |
#endif |
| ... | ... | |
| 211 | 211 |
if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR ); |
| 212 | 212 |
z.sign = float32_val(a)>>31; |
| 213 | 213 |
z.low = 0; |
| 214 |
z.high = ( (bits64) float32_val(a) )<<41;
|
|
| 214 |
z.high = ( (uint64_t) float32_val(a) )<<41;
|
|
| 215 | 215 |
return z; |
| 216 | 216 |
} |
| 217 | 217 |
|
| ... | ... | |
| 222 | 222 |
|
| 223 | 223 |
static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM) |
| 224 | 224 |
{
|
| 225 |
bits32 mantissa = a.high>>41;
|
|
| 225 |
uint32_t mantissa = a.high>>41;
|
|
| 226 | 226 |
|
| 227 | 227 |
if ( STATUS(default_nan_mode) ) {
|
| 228 | 228 |
return float32_default_nan; |
| ... | ... | |
| 230 | 230 |
|
| 231 | 231 |
if ( mantissa ) |
| 232 | 232 |
return make_float32( |
| 233 |
( ( (bits32) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
|
|
| 233 |
( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
|
|
| 234 | 234 |
else |
| 235 | 235 |
return float32_default_nan; |
| 236 | 236 |
} |
| ... | ... | |
| 357 | 357 |
{
|
| 358 | 358 |
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; |
| 359 | 359 |
flag aIsLargerSignificand; |
| 360 |
bits32 av, bv;
|
|
| 360 |
uint32_t av, bv;
|
|
| 361 | 361 |
|
| 362 | 362 |
aIsQuietNaN = float32_is_quiet_nan( a ); |
| 363 | 363 |
aIsSignalingNaN = float32_is_signaling_nan( a ); |
| ... | ... | |
| 371 | 371 |
if ( STATUS(default_nan_mode) ) |
| 372 | 372 |
return float32_default_nan; |
| 373 | 373 |
|
| 374 |
if ((bits32)(av<<1) < (bits32)(bv<<1)) {
|
|
| 374 |
if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
|
|
| 375 | 375 |
aIsLargerSignificand = 0; |
| 376 |
} else if ((bits32)(bv<<1) < (bits32)(av<<1)) {
|
|
| 376 |
} else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) {
|
|
| 377 | 377 |
aIsLargerSignificand = 1; |
| 378 | 378 |
} else {
|
| 379 | 379 |
aIsLargerSignificand = (av < bv) ? 1 : 0; |
| ... | ... | |
| 394 | 394 |
|
| 395 | 395 |
int float64_is_quiet_nan( float64 a_ ) |
| 396 | 396 |
{
|
| 397 |
bits64 a = float64_val(a_);
|
|
| 397 |
uint64_t a = float64_val(a_);
|
|
| 398 | 398 |
#if SNAN_BIT_IS_ONE |
| 399 | 399 |
return |
| 400 | 400 |
( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) |
| 401 | 401 |
&& ( a & LIT64( 0x0007FFFFFFFFFFFF ) ); |
| 402 | 402 |
#else |
| 403 |
return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) );
|
|
| 403 |
return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) );
|
|
| 404 | 404 |
#endif |
| 405 | 405 |
} |
| 406 | 406 |
|
| ... | ... | |
| 411 | 411 |
|
| 412 | 412 |
int float64_is_signaling_nan( float64 a_ ) |
| 413 | 413 |
{
|
| 414 |
bits64 a = float64_val(a_);
|
|
| 414 |
uint64_t a = float64_val(a_);
|
|
| 415 | 415 |
#if SNAN_BIT_IS_ONE |
| 416 |
return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) );
|
|
| 416 |
return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) );
|
|
| 417 | 417 |
#else |
| 418 | 418 |
return |
| 419 | 419 |
( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) |
| ... | ... | |
| 436 | 436 |
# error Rules for silencing a signaling NaN are target-specific |
| 437 | 437 |
# endif |
| 438 | 438 |
#else |
| 439 |
bits64 a = float64_val(a_);
|
|
| 439 |
uint64_t a = float64_val(a_);
|
|
| 440 | 440 |
a |= LIT64( 0x0008000000000000 ); |
| 441 | 441 |
return make_float64(a); |
| 442 | 442 |
#endif |
| ... | ... | |
| 468 | 468 |
|
| 469 | 469 |
static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM) |
| 470 | 470 |
{
|
| 471 |
bits64 mantissa = a.high>>12;
|
|
| 471 |
uint64_t mantissa = a.high>>12;
|
|
| 472 | 472 |
|
| 473 | 473 |
if ( STATUS(default_nan_mode) ) {
|
| 474 | 474 |
return float64_default_nan; |
| ... | ... | |
| 476 | 476 |
|
| 477 | 477 |
if ( mantissa ) |
| 478 | 478 |
return make_float64( |
| 479 |
( ( (bits64) a.sign )<<63 )
|
|
| 479 |
( ( (uint64_t) a.sign )<<63 )
|
|
| 480 | 480 |
| LIT64( 0x7FF0000000000000 ) |
| 481 | 481 |
| ( a.high>>12 )); |
| 482 | 482 |
else |
| ... | ... | |
| 493 | 493 |
{
|
| 494 | 494 |
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; |
| 495 | 495 |
flag aIsLargerSignificand; |
| 496 |
bits64 av, bv;
|
|
| 496 |
uint64_t av, bv;
|
|
| 497 | 497 |
|
| 498 | 498 |
aIsQuietNaN = float64_is_quiet_nan( a ); |
| 499 | 499 |
aIsSignalingNaN = float64_is_signaling_nan( a ); |
| ... | ... | |
| 507 | 507 |
if ( STATUS(default_nan_mode) ) |
| 508 | 508 |
return float64_default_nan; |
| 509 | 509 |
|
| 510 |
if ((bits64)(av<<1) < (bits64)(bv<<1)) {
|
|
| 510 |
if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
|
|
| 511 | 511 |
aIsLargerSignificand = 0; |
| 512 |
} else if ((bits64)(bv<<1) < (bits64)(av<<1)) {
|
|
| 512 |
} else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) {
|
|
| 513 | 513 |
aIsLargerSignificand = 1; |
| 514 | 514 |
} else {
|
| 515 | 515 |
aIsLargerSignificand = (av < bv) ? 1 : 0; |
| ... | ... | |
| 534 | 534 |
int floatx80_is_quiet_nan( floatx80 a ) |
| 535 | 535 |
{
|
| 536 | 536 |
#if SNAN_BIT_IS_ONE |
| 537 |
bits64 aLow;
|
|
| 537 |
uint64_t aLow;
|
|
| 538 | 538 |
|
| 539 | 539 |
aLow = a.low & ~ LIT64( 0x4000000000000000 ); |
| 540 | 540 |
return |
| 541 | 541 |
( ( a.high & 0x7FFF ) == 0x7FFF ) |
| 542 |
&& (bits64) ( aLow<<1 )
|
|
| 542 |
&& (uint64_t) ( aLow<<1 )
|
|
| 543 | 543 |
&& ( a.low == aLow ); |
| 544 | 544 |
#else |
| 545 | 545 |
return ( ( a.high & 0x7FFF ) == 0x7FFF ) |
| 546 |
&& (LIT64( 0x8000000000000000 ) <= ((bits64) ( a.low<<1 )));
|
|
| 546 |
&& (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
|
|
| 547 | 547 |
#endif |
| 548 | 548 |
} |
| 549 | 549 |
|
| ... | ... | |
| 557 | 557 |
{
|
| 558 | 558 |
#if SNAN_BIT_IS_ONE |
| 559 | 559 |
return ( ( a.high & 0x7FFF ) == 0x7FFF ) |
| 560 |
&& (LIT64( 0x8000000000000000 ) <= ((bits64) ( a.low<<1 )));
|
|
| 560 |
&& (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
|
|
| 561 | 561 |
#else |
| 562 |
bits64 aLow;
|
|
| 562 |
uint64_t aLow;
|
|
| 563 | 563 |
|
| 564 | 564 |
aLow = a.low & ~ LIT64( 0x4000000000000000 ); |
| 565 | 565 |
return |
| 566 | 566 |
( ( a.high & 0x7FFF ) == 0x7FFF ) |
| 567 |
&& (bits64) ( aLow<<1 )
|
|
| 567 |
&& (uint64_t) ( aLow<<1 )
|
|
| 568 | 568 |
&& ( a.low == aLow ); |
| 569 | 569 |
#endif |
| 570 | 570 |
} |
| ... | ... | |
| 628 | 628 |
z.low = a.high; |
| 629 | 629 |
else |
| 630 | 630 |
z.low = floatx80_default_nan_low; |
| 631 |
z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF;
|
|
| 631 |
z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
|
|
| 632 | 632 |
return z; |
| 633 | 633 |
} |
| 634 | 634 |
|
| ... | ... | |
| 689 | 689 |
&& ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) ); |
| 690 | 690 |
#else |
| 691 | 691 |
return |
| 692 |
( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
|
|
| 692 |
( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
|
|
| 693 | 693 |
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); |
| 694 | 694 |
#endif |
| 695 | 695 |
} |
| ... | ... | |
| 703 | 703 |
{
|
| 704 | 704 |
#if SNAN_BIT_IS_ONE |
| 705 | 705 |
return |
| 706 |
( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
|
|
| 706 |
( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
|
|
| 707 | 707 |
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); |
| 708 | 708 |
#else |
| 709 | 709 |
return |
| ... | ... | |
| 767 | 767 |
} |
| 768 | 768 |
|
| 769 | 769 |
shift128Right( a.high, a.low, 16, &z.high, &z.low ); |
| 770 |
z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
|
|
| 770 |
z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
|
|
| 771 | 771 |
return z; |
| 772 | 772 |
} |
| 773 | 773 |
|
| b/fpu/softfloat.c | ||
|---|---|---|
| 109 | 109 |
| positive or negative integer is returned. |
| 110 | 110 |
*----------------------------------------------------------------------------*/ |
| 111 | 111 |
|
| 112 |
static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM)
|
|
| 112 |
static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM)
|
|
| 113 | 113 |
{
|
| 114 | 114 |
int8 roundingMode; |
| 115 | 115 |
flag roundNearestEven; |
| ... | ... | |
| 140 | 140 |
if ( zSign ) z = - z; |
| 141 | 141 |
if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {
|
| 142 | 142 |
float_raise( float_flag_invalid STATUS_VAR); |
| 143 |
return zSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
|
|
| 143 |
return zSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
|
|
| 144 | 144 |
} |
| 145 | 145 |
if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact; |
| 146 | 146 |
return z; |
| ... | ... | |
| 159 | 159 |
| returned. |
| 160 | 160 |
*----------------------------------------------------------------------------*/ |
| 161 | 161 |
|
| 162 |
static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PARAM)
|
|
| 162 |
static int64 roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1 STATUS_PARAM)
|
|
| 163 | 163 |
{
|
| 164 | 164 |
int8 roundingMode; |
| 165 | 165 |
flag roundNearestEven, increment; |
| ... | ... | |
| 167 | 167 |
|
| 168 | 168 |
roundingMode = STATUS(float_rounding_mode); |
| 169 | 169 |
roundNearestEven = ( roundingMode == float_round_nearest_even ); |
| 170 |
increment = ( (sbits64) absZ1 < 0 );
|
|
| 170 |
increment = ( (int64_t) absZ1 < 0 );
|
|
| 171 | 171 |
if ( ! roundNearestEven ) {
|
| 172 | 172 |
if ( roundingMode == float_round_to_zero ) {
|
| 173 | 173 |
increment = 0; |
| ... | ... | |
| 184 | 184 |
if ( increment ) {
|
| 185 | 185 |
++absZ0; |
| 186 | 186 |
if ( absZ0 == 0 ) goto overflow; |
| 187 |
absZ0 &= ~ ( ( (bits64) ( absZ1<<1 ) == 0 ) & roundNearestEven );
|
|
| 187 |
absZ0 &= ~ ( ( (uint64_t) ( absZ1<<1 ) == 0 ) & roundNearestEven );
|
|
| 188 | 188 |
} |
| 189 | 189 |
z = absZ0; |
| 190 | 190 |
if ( zSign ) z = - z; |
| ... | ... | |
| 192 | 192 |
overflow: |
| 193 | 193 |
float_raise( float_flag_invalid STATUS_VAR); |
| 194 | 194 |
return |
| 195 |
zSign ? (sbits64) LIT64( 0x8000000000000000 )
|
|
| 195 |
zSign ? (int64_t) LIT64( 0x8000000000000000 )
|
|
| 196 | 196 |
: LIT64( 0x7FFFFFFFFFFFFFFF ); |
| 197 | 197 |
} |
| 198 | 198 |
if ( absZ1 ) STATUS(float_exception_flags) |= float_flag_inexact; |
| ... | ... | |
| 204 | 204 |
| Returns the fraction bits of the single-precision floating-point value `a'. |
| 205 | 205 |
*----------------------------------------------------------------------------*/ |
| 206 | 206 |
|
| 207 |
INLINE bits32 extractFloat32Frac( float32 a )
|
|
| 207 |
INLINE uint32_t extractFloat32Frac( float32 a )
|
|
| 208 | 208 |
{
|
| 209 | 209 |
|
| 210 | 210 |
return float32_val(a) & 0x007FFFFF; |
| ... | ... | |
| 256 | 256 |
*----------------------------------------------------------------------------*/ |
| 257 | 257 |
|
| 258 | 258 |
static void |
| 259 |
normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr )
|
|
| 259 |
normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSigPtr )
|
|
| 260 | 260 |
{
|
| 261 | 261 |
int8 shiftCount; |
| 262 | 262 |
|
| ... | ... | |
| 277 | 277 |
| significand. |
| 278 | 278 |
*----------------------------------------------------------------------------*/ |
| 279 | 279 |
|
| 280 |
INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig )
|
|
| 280 |
INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig )
|
|
| 281 | 281 |
{
|
| 282 | 282 |
|
| 283 | 283 |
return make_float32( |
| 284 |
( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig);
|
|
| 284 |
( ( (uint32_t) zSign )<<31 ) + ( ( (uint32_t) zExp )<<23 ) + zSig);
|
|
| 285 | 285 |
|
| 286 | 286 |
} |
| 287 | 287 |
|
| ... | ... | |
| 307 | 307 |
| Binary Floating-Point Arithmetic. |
| 308 | 308 |
*----------------------------------------------------------------------------*/ |
| 309 | 309 |
|
| 310 |
static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM)
|
|
| 310 |
static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM)
|
|
| 311 | 311 |
{
|
| 312 | 312 |
int8 roundingMode; |
| 313 | 313 |
flag roundNearestEven; |
| ... | ... | |
| 332 | 332 |
} |
| 333 | 333 |
} |
| 334 | 334 |
roundBits = zSig & 0x7F; |
| 335 |
if ( 0xFD <= (bits16) zExp ) {
|
|
| 335 |
if ( 0xFD <= (uint16_t) zExp ) {
|
|
| 336 | 336 |
if ( ( 0xFD < zExp ) |
| 337 | 337 |
|| ( ( zExp == 0xFD ) |
| 338 |
&& ( (sbits32) ( zSig + roundIncrement ) < 0 ) )
|
|
| 338 |
&& ( (int32_t) ( zSig + roundIncrement ) < 0 ) )
|
|
| 339 | 339 |
) {
|
| 340 | 340 |
float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR); |
| 341 | 341 |
return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 )); |
| ... | ... | |
| 370 | 370 |
*----------------------------------------------------------------------------*/ |
| 371 | 371 |
|
| 372 | 372 |
static float32 |
| 373 |
normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM)
|
|
| 373 |
normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM)
|
|
| 374 | 374 |
{
|
| 375 | 375 |
int8 shiftCount; |
| 376 | 376 |
|
| ... | ... | |
| 383 | 383 |
| Returns the fraction bits of the double-precision floating-point value `a'. |
| 384 | 384 |
*----------------------------------------------------------------------------*/ |
| 385 | 385 |
|
| 386 |
INLINE bits64 extractFloat64Frac( float64 a )
|
|
| 386 |
INLINE uint64_t extractFloat64Frac( float64 a )
|
|
| 387 | 387 |
{
|
| 388 | 388 |
|
| 389 | 389 |
return float64_val(a) & LIT64( 0x000FFFFFFFFFFFFF ); |
| ... | ... | |
| 435 | 435 |
*----------------------------------------------------------------------------*/ |
| 436 | 436 |
|
| 437 | 437 |
static void |
| 438 |
normalizeFloat64Subnormal( bits64 aSig, int16 *zExpPtr, bits64 *zSigPtr )
|
|
| 438 |
normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSigPtr )
|
|
| 439 | 439 |
{
|
| 440 | 440 |
int8 shiftCount; |
| 441 | 441 |
|
| ... | ... | |
| 456 | 456 |
| significand. |
| 457 | 457 |
*----------------------------------------------------------------------------*/ |
| 458 | 458 |
|
| 459 |
INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig )
|
|
| 459 |
INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig )
|
|
| 460 | 460 |
{
|
| 461 | 461 |
|
| 462 | 462 |
return make_float64( |
| 463 |
( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<52 ) + zSig);
|
|
| 463 |
( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<52 ) + zSig);
|
|
| 464 | 464 |
|
| 465 | 465 |
} |
| 466 | 466 |
|
| ... | ... | |
| 486 | 486 |
| Binary Floating-Point Arithmetic. |
| 487 | 487 |
*----------------------------------------------------------------------------*/ |
| 488 | 488 |
|
| 489 |
static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM)
|
|
| 489 |
static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM)
|
|
| 490 | 490 |
{
|
| 491 | 491 |
int8 roundingMode; |
| 492 | 492 |
flag roundNearestEven; |
| ... | ... | |
| 511 | 511 |
} |
| 512 | 512 |
} |
| 513 | 513 |
roundBits = zSig & 0x3FF; |
| 514 |
if ( 0x7FD <= (bits16) zExp ) {
|
|
| 514 |
if ( 0x7FD <= (uint16_t) zExp ) {
|
|
| 515 | 515 |
if ( ( 0x7FD < zExp ) |
| 516 | 516 |
|| ( ( zExp == 0x7FD ) |
| 517 |
&& ( (sbits64) ( zSig + roundIncrement ) < 0 ) )
|
|
| 517 |
&& ( (int64_t) ( zSig + roundIncrement ) < 0 ) )
|
|
| 518 | 518 |
) {
|
| 519 | 519 |
float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR); |
| 520 | 520 |
return packFloat64( zSign, 0x7FF, - ( roundIncrement == 0 )); |
| ... | ... | |
| 549 | 549 |
*----------------------------------------------------------------------------*/ |
| 550 | 550 |
|
| 551 | 551 |
static float64 |
| 552 |
normalizeRoundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM)
|
|
| 552 |
normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM)
|
|
| 553 | 553 |
{
|
| 554 | 554 |
int8 shiftCount; |
| 555 | 555 |
|
| ... | ... | |
| 565 | 565 |
| value `a'. |
| 566 | 566 |
*----------------------------------------------------------------------------*/ |
| 567 | 567 |
|
| 568 |
INLINE bits64 extractFloatx80Frac( floatx80 a )
|
|
| 568 |
INLINE uint64_t extractFloatx80Frac( floatx80 a )
|
|
| 569 | 569 |
{
|
| 570 | 570 |
|
| 571 | 571 |
return a.low; |
| ... | ... | |
| 604 | 604 |
*----------------------------------------------------------------------------*/ |
| 605 | 605 |
|
| 606 | 606 |
static void |
| 607 |
normalizeFloatx80Subnormal( bits64 aSig, int32 *zExpPtr, bits64 *zSigPtr )
|
|
| 607 |
normalizeFloatx80Subnormal( uint64_t aSig, int32 *zExpPtr, uint64_t *zSigPtr )
|
|
| 608 | 608 |
{
|
| 609 | 609 |
int8 shiftCount; |
| 610 | 610 |
|
| ... | ... | |
| 619 | 619 |
| extended double-precision floating-point value, returning the result. |
| 620 | 620 |
*----------------------------------------------------------------------------*/ |
| 621 | 621 |
|
| 622 |
INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig )
|
|
| 622 |
INLINE floatx80 packFloatx80( flag zSign, int32 zExp, uint64_t zSig )
|
|
| 623 | 623 |
{
|
| 624 | 624 |
floatx80 z; |
| 625 | 625 |
|
| 626 | 626 |
z.low = zSig; |
| 627 |
z.high = ( ( (bits16) zSign )<<15 ) + zExp;
|
|
| 627 |
z.high = ( ( (uint16_t) zSign )<<15 ) + zExp;
|
|
| 628 | 628 |
return z; |
| 629 | 629 |
|
| 630 | 630 |
} |
| ... | ... | |
| 655 | 655 |
|
| 656 | 656 |
static floatx80 |
| 657 | 657 |
roundAndPackFloatx80( |
| 658 |
int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1
|
|
| 658 |
int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1
|
|
| 659 | 659 |
STATUS_PARAM) |
| 660 | 660 |
{
|
| 661 | 661 |
int8 roundingMode; |
| ... | ... | |
| 692 | 692 |
} |
| 693 | 693 |
} |
| 694 | 694 |
roundBits = zSig0 & roundMask; |
| 695 |
if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) {
|
|
| 695 |
if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {
|
|
| 696 | 696 |
if ( ( 0x7FFE < zExp ) |
| 697 | 697 |
|| ( ( zExp == 0x7FFE ) && ( zSig0 + roundIncrement < zSig0 ) ) |
| 698 | 698 |
) {
|
| ... | ... | |
| 710 | 710 |
if ( isTiny && roundBits ) float_raise( float_flag_underflow STATUS_VAR); |
| 711 | 711 |
if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact; |
| 712 | 712 |
zSig0 += roundIncrement; |
| 713 |
if ( (sbits64) zSig0 < 0 ) zExp = 1;
|
|
| 713 |
if ( (int64_t) zSig0 < 0 ) zExp = 1;
|
|
| 714 | 714 |
roundIncrement = roundMask + 1; |
| 715 | 715 |
if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {
|
| 716 | 716 |
roundMask |= roundIncrement; |
| ... | ... | |
| 733 | 733 |
if ( zSig0 == 0 ) zExp = 0; |
| 734 | 734 |
return packFloatx80( zSign, zExp, zSig0 ); |
| 735 | 735 |
precision80: |
| 736 |
increment = ( (sbits64) zSig1 < 0 );
|
|
| 736 |
increment = ( (int64_t) zSig1 < 0 );
|
|
| 737 | 737 |
if ( ! roundNearestEven ) {
|
| 738 | 738 |
if ( roundingMode == float_round_to_zero ) {
|
| 739 | 739 |
increment = 0; |
| ... | ... | |
| 747 | 747 |
} |
| 748 | 748 |
} |
| 749 | 749 |
} |
| 750 |
if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) {
|
|
| 750 |
if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {
|
|
| 751 | 751 |
if ( ( 0x7FFE < zExp ) |
| 752 | 752 |
|| ( ( zExp == 0x7FFE ) |
| 753 | 753 |
&& ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) ) |
| ... | ... | |
| 776 | 776 |
if ( isTiny && zSig1 ) float_raise( float_flag_underflow STATUS_VAR); |
| 777 | 777 |
if ( zSig1 ) STATUS(float_exception_flags) |= float_flag_inexact; |
| 778 | 778 |
if ( roundNearestEven ) {
|
| 779 |
increment = ( (sbits64) zSig1 < 0 );
|
|
| 779 |
increment = ( (int64_t) zSig1 < 0 );
|
|
| 780 | 780 |
} |
| 781 | 781 |
else {
|
| 782 | 782 |
if ( zSign ) {
|
| ... | ... | |
| 789 | 789 |
if ( increment ) {
|
| 790 | 790 |
++zSig0; |
| 791 | 791 |
zSig0 &= |
| 792 |
~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven );
|
|
| 793 |
if ( (sbits64) zSig0 < 0 ) zExp = 1;
|
|
| 792 |
~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
|
|
| 793 |
if ( (int64_t) zSig0 < 0 ) zExp = 1;
|
|
| 794 | 794 |
} |
| 795 | 795 |
return packFloatx80( zSign, zExp, zSig0 ); |
| 796 | 796 |
} |
| ... | ... | |
| 803 | 803 |
zSig0 = LIT64( 0x8000000000000000 ); |
| 804 | 804 |
} |
| 805 | 805 |
else {
|
| 806 |
zSig0 &= ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven );
|
|
| 806 |
zSig0 &= ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
|
|
| 807 | 807 |
} |
| 808 | 808 |
} |
| 809 | 809 |
else {
|
| ... | ... | |
| 824 | 824 |
|
| 825 | 825 |
static floatx80 |
| 826 | 826 |
normalizeRoundAndPackFloatx80( |
| 827 |
int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1
|
|
| 827 |
int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1
|
|
| 828 | 828 |
STATUS_PARAM) |
| 829 | 829 |
{
|
| 830 | 830 |
int8 shiftCount; |
| ... | ... | |
| 851 | 851 |
| floating-point value `a'. |
| 852 | 852 |
*----------------------------------------------------------------------------*/ |
| 853 | 853 |
|
| 854 |
INLINE bits64 extractFloat128Frac1( float128 a )
|
|
| 854 |
INLINE uint64_t extractFloat128Frac1( float128 a )
|
|
| 855 | 855 |
{
|
| 856 | 856 |
|
| 857 | 857 |
return a.low; |
| ... | ... | |
| 863 | 863 |
| floating-point value `a'. |
| 864 | 864 |
*----------------------------------------------------------------------------*/ |
| 865 | 865 |
|
| 866 |
INLINE bits64 extractFloat128Frac0( float128 a )
|
|
| 866 |
INLINE uint64_t extractFloat128Frac0( float128 a )
|
|
| 867 | 867 |
{
|
| 868 | 868 |
|
| 869 | 869 |
return a.high & LIT64( 0x0000FFFFFFFFFFFF ); |
| ... | ... | |
| 905 | 905 |
|
| 906 | 906 |
static void |
| 907 | 907 |
normalizeFloat128Subnormal( |
| 908 |
bits64 aSig0,
|
|
| 909 |
bits64 aSig1,
|
|
| 908 |
uint64_t aSig0,
|
|
| 909 |
uint64_t aSig1,
|
|
| 910 | 910 |
int32 *zExpPtr, |
| 911 |
bits64 *zSig0Ptr,
|
|
| 912 |
bits64 *zSig1Ptr
|
|
| 911 |
uint64_t *zSig0Ptr,
|
|
| 912 |
uint64_t *zSig1Ptr
|
|
| 913 | 913 |
) |
| 914 | 914 |
{
|
| 915 | 915 |
int8 shiftCount; |
| ... | ... | |
| 948 | 948 |
*----------------------------------------------------------------------------*/ |
| 949 | 949 |
|
| 950 | 950 |
INLINE float128 |
| 951 |
packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
|
|
| 951 |
packFloat128( flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 )
|
|
| 952 | 952 |
{
|
| 953 | 953 |
float128 z; |
| 954 | 954 |
|
| 955 | 955 |
z.low = zSig1; |
| 956 |
z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0;
|
|
| 956 |
z.high = ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<48 ) + zSig0;
|
|
| 957 | 957 |
return z; |
| 958 | 958 |
|
| 959 | 959 |
} |
| ... | ... | |
| 981 | 981 |
|
| 982 | 982 |
static float128 |
| 983 | 983 |
roundAndPackFloat128( |
| 984 |
flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 STATUS_PARAM)
|
|
| 984 |
flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2 STATUS_PARAM)
|
|
| 985 | 985 |
{
|
| 986 | 986 |
int8 roundingMode; |
| 987 | 987 |
flag roundNearestEven, increment, isTiny; |
| 988 | 988 |
|
| 989 | 989 |
roundingMode = STATUS(float_rounding_mode); |
| 990 | 990 |
roundNearestEven = ( roundingMode == float_round_nearest_even ); |
| 991 |
increment = ( (sbits64) zSig2 < 0 );
|
|
| 991 |
increment = ( (int64_t) zSig2 < 0 );
|
|
| 992 | 992 |
if ( ! roundNearestEven ) {
|
| 993 | 993 |
if ( roundingMode == float_round_to_zero ) {
|
| 994 | 994 |
increment = 0; |
| ... | ... | |
| 1002 | 1002 |
} |
| 1003 | 1003 |
} |
| 1004 | 1004 |
} |
| 1005 |
if ( 0x7FFD <= (bits32) zExp ) {
|
|
| 1005 |
if ( 0x7FFD <= (uint32_t) zExp ) {
|
|
| 1006 | 1006 |
if ( ( 0x7FFD < zExp ) |
| 1007 | 1007 |
|| ( ( zExp == 0x7FFD ) |
| 1008 | 1008 |
&& eq128( |
| ... | ... | |
| 1046 | 1046 |
zExp = 0; |
| 1047 | 1047 |
if ( isTiny && zSig2 ) float_raise( float_flag_underflow STATUS_VAR); |
| 1048 | 1048 |
if ( roundNearestEven ) {
|
| 1049 |
increment = ( (sbits64) zSig2 < 0 );
|
|
| 1049 |
increment = ( (int64_t) zSig2 < 0 );
|
|
| 1050 | 1050 |
} |
| 1051 | 1051 |
else {
|
| 1052 | 1052 |
if ( zSign ) {
|
| ... | ... | |
| 1082 | 1082 |
|
| 1083 | 1083 |
static float128 |
| 1084 | 1084 |
normalizeRoundAndPackFloat128( |
| 1085 |
flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM)
|
|
| 1085 |
flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM)
|
|
| 1086 | 1086 |
{
|
| 1087 | 1087 |
int8 shiftCount; |
| 1088 |
bits64 zSig2;
|
|
| 1088 |
uint64_t zSig2;
|
|
| 1089 | 1089 |
|
| 1090 | 1090 |
if ( zSig0 == 0 ) {
|
| 1091 | 1091 |
zSig0 = zSig1; |
| ... | ... | |
| 1119 | 1119 |
flag zSign; |
| 1120 | 1120 |
|
| 1121 | 1121 |
if ( a == 0 ) return float32_zero; |
| 1122 |
if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );
|
|
| 1122 |
if ( a == (int32_t) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );
|
|
| 1123 | 1123 |
zSign = ( a < 0 ); |
| 1124 | 1124 |
return normalizeRoundAndPackFloat32( zSign, 0x9C, zSign ? - a : a STATUS_VAR ); |
| 1125 | 1125 |
|
| ... | ... | |
| 1136 | 1136 |
flag zSign; |
| 1137 | 1137 |
uint32 absA; |
| 1138 | 1138 |
int8 shiftCount; |
| 1139 |
bits64 zSig;
|
|
| 1139 |
uint64_t zSig;
|
|
| 1140 | 1140 |
|
| 1141 | 1141 |
if ( a == 0 ) return float64_zero; |
| 1142 | 1142 |
zSign = ( a < 0 ); |
| ... | ... | |
| 1161 | 1161 |
flag zSign; |
| 1162 | 1162 |
uint32 absA; |
| 1163 | 1163 |
int8 shiftCount; |
| 1164 |
bits64 zSig;
|
|
| 1164 |
uint64_t zSig;
|
|
| 1165 | 1165 |
|
| 1166 | 1166 |
if ( a == 0 ) return packFloatx80( 0, 0, 0 ); |
| 1167 | 1167 |
zSign = ( a < 0 ); |
| ... | ... | |
| 1187 | 1187 |
flag zSign; |
| 1188 | 1188 |
uint32 absA; |
| 1189 | 1189 |
int8 shiftCount; |
| 1190 |
bits64 zSig0;
|
|
| 1190 |
uint64_t zSig0;
|
|
| 1191 | 1191 |
|
| 1192 | 1192 |
if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); |
| 1193 | 1193 |
zSign = ( a < 0 ); |
| ... | ... | |
| 1264 | 1264 |
flag zSign; |
| 1265 | 1265 |
|
| 1266 | 1266 |
if ( a == 0 ) return float64_zero; |
| 1267 |
if ( a == (sbits64) LIT64( 0x8000000000000000 ) ) {
|
|
| 1267 |
if ( a == (int64_t) LIT64( 0x8000000000000000 ) ) {
|
|
| 1268 | 1268 |
return packFloat64( 1, 0x43E, 0 ); |
| 1269 | 1269 |
} |
| 1270 | 1270 |
zSign = ( a < 0 ); |
| ... | ... | |
| 1318 | 1318 |
uint64 absA; |
| 1319 | 1319 |
int8 shiftCount; |
| 1320 | 1320 |
int32 zExp; |
| 1321 |
bits64 zSig0, zSig1;
|
|
| 1321 |
uint64_t zSig0, zSig1;
|
|
| 1322 | 1322 |
|
| 1323 | 1323 |
if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); |
| 1324 | 1324 |
zSign = ( a < 0 ); |
| ... | ... | |
| 1355 | 1355 |
{
|
| 1356 | 1356 |
flag aSign; |
| 1357 | 1357 |
int16 aExp, shiftCount; |
| 1358 |
bits32 aSig;
|
|
| 1359 |
bits64 aSig64;
|
|
| 1358 |
uint32_t aSig;
|
|
| 1359 |
uint64_t aSig64;
|
|
| 1360 | 1360 |
|
| 1361 | 1361 |
a = float32_squash_input_denormal(a STATUS_VAR); |
| 1362 | 1362 |
aSig = extractFloat32Frac( a ); |
| ... | ... | |
| 1386 | 1386 |
{
|
| 1387 | 1387 |
flag aSign; |
| 1388 | 1388 |
int16 aExp, shiftCount; |
| 1389 |
bits32 aSig;
|
|
| 1389 |
uint32_t aSig;
|
|
| 1390 | 1390 |
int32 z; |
| 1391 | 1391 |
a = float32_squash_input_denormal(a STATUS_VAR); |
| 1392 | 1392 |
|
| ... | ... | |
| 1399 | 1399 |
float_raise( float_flag_invalid STATUS_VAR); |
| 1400 | 1400 |
if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) return 0x7FFFFFFF; |
| 1401 | 1401 |
} |
| 1402 |
return (sbits32) 0x80000000;
|
|
| 1402 |
return (int32_t) 0x80000000;
|
|
| 1403 | 1403 |
} |
| 1404 | 1404 |
else if ( aExp <= 0x7E ) {
|
| 1405 | 1405 |
if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; |
| ... | ... | |
| 1407 | 1407 |
} |
| 1408 | 1408 |
aSig = ( aSig | 0x00800000 )<<8; |
| 1409 | 1409 |
z = aSig>>( - shiftCount ); |
| 1410 |
if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) {
|
|
| 1410 |
if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) {
|
|
| 1411 | 1411 |
STATUS(float_exception_flags) |= float_flag_inexact; |
| 1412 | 1412 |
} |
| 1413 | 1413 |
if ( aSign ) z = - z; |
| ... | ... | |
| 1429 | 1429 |
{
|
| 1430 | 1430 |
flag aSign; |
| 1431 | 1431 |
int16 aExp, shiftCount; |
| 1432 |
bits32 aSig;
|
|
| 1432 |
uint32_t aSig;
|
|
| 1433 | 1433 |
int32 z; |
| 1434 | 1434 |
|
| 1435 | 1435 |
aSig = extractFloat32Frac( a ); |
| ... | ... | |
| 1443 | 1443 |
return 0x7FFF; |
| 1444 | 1444 |
} |
| 1445 | 1445 |
} |
| 1446 |
return (sbits32) 0xffff8000;
|
|
| 1446 |
return (int32_t) 0xffff8000;
|
|
| 1447 | 1447 |
} |
| 1448 | 1448 |
else if ( aExp <= 0x7E ) {
|
| 1449 | 1449 |
if ( aExp | aSig ) {
|
| ... | ... | |
| 1454 | 1454 |
shiftCount -= 0x10; |
| 1455 | 1455 |
aSig = ( aSig | 0x00800000 )<<8; |
| 1456 | 1456 |
z = aSig>>( - shiftCount ); |
| 1457 |
if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) {
|
|
| 1457 |
if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) {
|
|
| 1458 | 1458 |
STATUS(float_exception_flags) |= float_flag_inexact; |
| 1459 | 1459 |
} |
| 1460 | 1460 |
if ( aSign ) {
|
| ... | ... | |
| 1478 | 1478 |
{
|
| 1479 | 1479 |
flag aSign; |
| 1480 | 1480 |
int16 aExp, shiftCount; |
| 1481 |
bits32 aSig;
|
|
| 1482 |
bits64 aSig64, aSigExtra;
|
|
| 1481 |
uint32_t aSig;
|
|
| 1482 |
uint64_t aSig64, aSigExtra;
|
|
| 1483 | 1483 |
a = float32_squash_input_denormal(a STATUS_VAR); |
| 1484 | 1484 |
|
| 1485 | 1485 |
aSig = extractFloat32Frac( a ); |
| ... | ... | |
| 1491 | 1491 |
if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) {
|
| 1492 | 1492 |
return LIT64( 0x7FFFFFFFFFFFFFFF ); |
| 1493 | 1493 |
} |
| 1494 |
return (sbits64) LIT64( 0x8000000000000000 );
|
|
| 1494 |
return (int64_t) LIT64( 0x8000000000000000 );
|
|
| 1495 | 1495 |
} |
| 1496 | 1496 |
if ( aExp ) aSig |= 0x00800000; |
| 1497 | 1497 |
aSig64 = aSig; |
| ... | ... | |
| 1515 | 1515 |
{
|
| 1516 | 1516 |
flag aSign; |
| 1517 | 1517 |
int16 aExp, shiftCount; |
| 1518 |
bits32 aSig;
|
|
| 1519 |
bits64 aSig64;
|
|
| 1518 |
uint32_t aSig;
|
|
| 1519 |
uint64_t aSig64;
|
|
| 1520 | 1520 |
int64 z; |
| 1521 | 1521 |
a = float32_squash_input_denormal(a STATUS_VAR); |
| 1522 | 1522 |
|
| ... | ... | |
| 1531 | 1531 |
return LIT64( 0x7FFFFFFFFFFFFFFF ); |
| 1532 | 1532 |
} |
| 1533 | 1533 |
} |
| 1534 |
return (sbits64) LIT64( 0x8000000000000000 );
|
|
| 1534 |
return (int64_t) LIT64( 0x8000000000000000 );
|
|
| 1535 | 1535 |
} |
| 1536 | 1536 |
else if ( aExp <= 0x7E ) {
|
| 1537 | 1537 |
if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; |
| ... | ... | |
| 1540 | 1540 |
aSig64 = aSig | 0x00800000; |
| 1541 | 1541 |
aSig64 <<= 40; |
| 1542 | 1542 |
z = aSig64>>( - shiftCount ); |
| 1543 |
if ( (bits64) ( aSig64<<( shiftCount & 63 ) ) ) {
|
|
| 1543 |
if ( (uint64_t) ( aSig64<<( shiftCount & 63 ) ) ) {
|
|
| 1544 | 1544 |
STATUS(float_exception_flags) |= float_flag_inexact; |
| 1545 | 1545 |
} |
| 1546 | 1546 |
if ( aSign ) z = - z; |
| ... | ... | |
| 1559 | 1559 |
{
|
| 1560 | 1560 |
flag aSign; |
| 1561 | 1561 |
int16 aExp; |
| 1562 |
bits32 aSig;
|
|
| 1562 |
uint32_t aSig;
|
|
| 1563 | 1563 |
a = float32_squash_input_denormal(a STATUS_VAR); |
| 1564 | 1564 |
|
| 1565 | 1565 |
aSig = extractFloat32Frac( a ); |
| ... | ... | |
| 1574 | 1574 |
normalizeFloat32Subnormal( aSig, &aExp, &aSig ); |
| 1575 | 1575 |
--aExp; |
| 1576 | 1576 |
} |
| 1577 |
return packFloat64( aSign, aExp + 0x380, ( (bits64) aSig )<<29 );
|
|
| 1577 |
return packFloat64( aSign, aExp + 0x380, ( (uint64_t) aSig )<<29 );
|
|
| 1578 | 1578 |
|
| 1579 | 1579 |
} |
| 1580 | 1580 |
|
| ... | ... | |
| 1591 | 1591 |
{
|
| 1592 | 1592 |
flag aSign; |
| 1593 | 1593 |
int16 aExp; |
| 1594 |
bits32 aSig;
|
|
| 1594 |
uint32_t aSig;
|
|
| 1595 | 1595 |
|
| 1596 | 1596 |
a = float32_squash_input_denormal(a STATUS_VAR); |
| 1597 | 1597 |
aSig = extractFloat32Frac( a ); |
| ... | ... | |
| 1606 | 1606 |
normalizeFloat32Subnormal( aSig, &aExp, &aSig ); |
| 1607 | 1607 |
} |
| 1608 | 1608 |
aSig |= 0x00800000; |
| 1609 |
return packFloatx80( aSign, aExp + 0x3F80, ( (bits64) aSig )<<40 );
|
|
| 1609 |
return packFloatx80( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<40 );
|
|
| 1610 | 1610 |
|
| 1611 | 1611 |
} |
| 1612 | 1612 |
|
| ... | ... | |
| 1625 | 1625 |
{
|
| 1626 | 1626 |
flag aSign; |
| 1627 | 1627 |
int16 aExp; |
| 1628 |
bits32 aSig;
|
|
| 1628 |
uint32_t aSig;
|
|
| 1629 | 1629 |
|
| 1630 | 1630 |
a = float32_squash_input_denormal(a STATUS_VAR); |
| 1631 | 1631 |
aSig = extractFloat32Frac( a ); |
| ... | ... | |
| 1640 | 1640 |
normalizeFloat32Subnormal( aSig, &aExp, &aSig ); |
| 1641 | 1641 |
--aExp; |
| 1642 | 1642 |
} |
| 1643 |
return packFloat128( aSign, aExp + 0x3F80, ( (bits64) aSig )<<25, 0 );
|
|
| 1643 |
return packFloat128( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<25, 0 );
|
|
| 1644 | 1644 |
|
| 1645 | 1645 |
} |
| 1646 | 1646 |
|
| ... | ... | |
| 1657 | 1657 |
{
|
| 1658 | 1658 |
flag aSign; |
| 1659 | 1659 |
int16 aExp; |
| 1660 |
bits32 lastBitMask, roundBitsMask;
|
|
| 1660 |
uint32_t lastBitMask, roundBitsMask;
|
|
| 1661 | 1661 |
int8 roundingMode; |
| 1662 |
bits32 z;
|
|
| 1662 |
uint32_t z;
|
|
| 1663 | 1663 |
a = float32_squash_input_denormal(a STATUS_VAR); |
| 1664 | 1664 |
|
| 1665 | 1665 |
aExp = extractFloat32Exp( a ); |
| ... | ... | |
| 1670 | 1670 |
return a; |
| 1671 | 1671 |
} |
| 1672 | 1672 |
if ( aExp <= 0x7E ) {
|
| 1673 |
if ( (bits32) ( float32_val(a)<<1 ) == 0 ) return a;
|
|
| 1673 |
if ( (uint32_t) ( float32_val(a)<<1 ) == 0 ) return a;
|
|
| 1674 | 1674 |
STATUS(float_exception_flags) |= float_flag_inexact; |
| 1675 | 1675 |
aSign = extractFloat32Sign( a ); |
| 1676 | 1676 |
switch ( STATUS(float_rounding_mode) ) {
|
| ... | ... | |
| 1717 | 1717 |
static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) |
| 1718 | 1718 |
{
|
| 1719 | 1719 |
int16 aExp, bExp, zExp; |
| 1720 |
bits32 aSig, bSig, zSig;
|
|
| 1720 |
uint32_t aSig, bSig, zSig;
|
|
| 1721 | 1721 |
int16 expDiff; |
| 1722 | 1722 |
|
| 1723 | 1723 |
aSig = extractFloat32Frac( a ); |
| ... | ... | |
| 1771 | 1771 |
aSig |= 0x20000000; |
| 1772 | 1772 |
zSig = ( aSig + bSig )<<1; |
| 1773 | 1773 |
--zExp; |
| 1774 |
if ( (sbits32) zSig < 0 ) {
|
|
| 1774 |
if ( (int32_t) zSig < 0 ) {
|
|
| 1775 | 1775 |
zSig = aSig + bSig; |
| 1776 | 1776 |
++zExp; |
| 1777 | 1777 |
} |
| ... | ... | |
| 1791 | 1791 |
static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) |
| 1792 | 1792 |
{
|
| 1793 | 1793 |
int16 aExp, bExp, zExp; |
| 1794 |
bits32 aSig, bSig, zSig;
|
|
| 1794 |
uint32_t aSig, bSig, zSig;
|
|
| 1795 | 1795 |
int16 expDiff; |
| 1796 | 1796 |
|
| 1797 | 1797 |
aSig = extractFloat32Frac( a ); |
| ... | ... | |
| 1911 | 1911 |
{
|
| 1912 | 1912 |
flag aSign, bSign, zSign; |
| 1913 | 1913 |
int16 aExp, bExp, zExp; |
| 1914 |
bits32 aSig, bSig;
|
|
| 1915 |
bits64 zSig64;
|
|
| 1916 |
bits32 zSig;
|
|
| 1914 |
uint32_t aSig, bSig;
|
|
| 1915 |
uint64_t zSig64;
|
|
| 1916 |
uint32_t zSig;
|
|
| 1917 | 1917 |
|
| 1918 | 1918 |
a = float32_squash_input_denormal(a STATUS_VAR); |
| 1919 | 1919 |
b = float32_squash_input_denormal(b STATUS_VAR); |
| ... | ... | |
| 1954 | 1954 |
zExp = aExp + bExp - 0x7F; |
| 1955 | 1955 |
aSig = ( aSig | 0x00800000 )<<7; |
| 1956 | 1956 |
bSig = ( bSig | 0x00800000 )<<8; |
| 1957 |
shift64RightJamming( ( (bits64) aSig ) * bSig, 32, &zSig64 );
|
|
| 1957 |
shift64RightJamming( ( (uint64_t) aSig ) * bSig, 32, &zSig64 );
|
|
| 1958 | 1958 |
zSig = zSig64; |
| 1959 |
if ( 0 <= (sbits32) ( zSig<<1 ) ) {
|
|
| 1959 |
if ( 0 <= (int32_t) ( zSig<<1 ) ) {
|
|
| 1960 | 1960 |
zSig <<= 1; |
| 1961 | 1961 |
--zExp; |
| 1962 | 1962 |
} |
| ... | ... | |
| 1974 | 1974 |
{
|
| 1975 | 1975 |
flag aSign, bSign, zSign; |
| 1976 | 1976 |
int16 aExp, bExp, zExp; |
| 1977 |
bits32 aSig, bSig, zSig;
|
|
| 1977 |
uint32_t aSig, bSig, zSig;
|
|
| 1978 | 1978 |
a = float32_squash_input_denormal(a STATUS_VAR); |
| 1979 | 1979 |
b = float32_squash_input_denormal(b STATUS_VAR); |
| 1980 | 1980 |
|
| ... | ... | |
| 2020 | 2020 |
aSig >>= 1; |
| 2021 | 2021 |
++zExp; |
| 2022 | 2022 |
} |
| 2023 |
zSig = ( ( (bits64) aSig )<<32 ) / bSig;
|
|
| 2023 |
zSig = ( ( (uint64_t) aSig )<<32 ) / bSig;
|
|
| 2024 | 2024 |
if ( ( zSig & 0x3F ) == 0 ) {
|
| 2025 |
zSig |= ( (bits64) bSig * zSig != ( (bits64) aSig )<<32 );
|
|
| 2025 |
zSig |= ( (uint64_t) bSig * zSig != ( (uint64_t) aSig )<<32 );
|
|
| 2026 | 2026 |
} |
| 2027 | 2027 |
return roundAndPackFloat32( zSign, zExp, zSig STATUS_VAR ); |
| 2028 | 2028 |
|
| ... | ... | |
| 2038 | 2038 |
{
|
| 2039 | 2039 |
flag aSign, zSign; |
| 2040 | 2040 |
int16 aExp, bExp, expDiff; |
| 2041 |
bits32 aSig, bSig;
|
|
| 2042 |
bits32 q;
|
|
| 2043 |
bits64 aSig64, bSig64, q64;
|
|
| 2044 |
bits32 alternateASig;
|
|
| 2045 |
sbits32 sigMean;
|
|
| 2041 |
uint32_t aSig, bSig;
|
|
| 2042 |
uint32_t q;
|
|
| 2043 |
uint64_t aSig64, bSig64, q64;
|
|
| 2044 |
uint32_t alternateASig;
|
|
| 2045 |
int32_t sigMean;
|
|
| 2046 | 2046 |
a = float32_squash_input_denormal(a STATUS_VAR); |
| 2047 | 2047 |
b = float32_squash_input_denormal(b STATUS_VAR); |
| 2048 | 2048 |
|
| ... | ... | |
| 2086 | 2086 |
q = ( bSig <= aSig ); |
| 2087 | 2087 |
if ( q ) aSig -= bSig; |
| 2088 | 2088 |
if ( 0 < expDiff ) {
|
| 2089 |
q = ( ( (bits64) aSig )<<32 ) / bSig;
|
|
| 2089 |
q = ( ( (uint64_t) aSig )<<32 ) / bSig;
|
|
| 2090 | 2090 |
q >>= 32 - expDiff; |
| 2091 | 2091 |
bSig >>= 2; |
| 2092 | 2092 |
aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q; |
| ... | ... | |
| 2098 | 2098 |
} |
| 2099 | 2099 |
else {
|
| 2100 | 2100 |
if ( bSig <= aSig ) aSig -= bSig; |
| 2101 |
aSig64 = ( (bits64) aSig )<<40;
|
|
| 2102 |
bSig64 = ( (bits64) bSig )<<40;
|
|
| 2101 |
aSig64 = ( (uint64_t) aSig )<<40;
|
|
| 2102 |
bSig64 = ( (uint64_t) bSig )<<40;
|
|
| 2103 | 2103 |
expDiff -= 64; |
| 2104 | 2104 |
while ( 0 < expDiff ) {
|
| 2105 | 2105 |
q64 = estimateDiv128To64( aSig64, 0, bSig64 ); |
| ... | ... | |
| 2118 | 2118 |
alternateASig = aSig; |
| 2119 | 2119 |
++q; |
| 2120 | 2120 |
aSig -= bSig; |
| 2121 |
} while ( 0 <= (sbits32) aSig );
|
|
| 2121 |
} while ( 0 <= (int32_t) aSig );
|
|
| 2122 | 2122 |
sigMean = aSig + alternateASig; |
| 2123 | 2123 |
if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
|
| 2124 | 2124 |
aSig = alternateASig; |
| 2125 | 2125 |
} |
| 2126 |
zSign = ( (sbits32) aSig < 0 );
|
|
| 2126 |
zSign = ( (int32_t) aSig < 0 );
|
|
| 2127 | 2127 |
if ( zSign ) aSig = - aSig; |
| 2128 | 2128 |
return normalizeRoundAndPackFloat32( aSign ^ zSign, bExp, aSig STATUS_VAR ); |
| 2129 | 2129 |
|
| ... | ... | |
| 2139 | 2139 |
{
|
| 2140 | 2140 |
flag aSign; |
| 2141 | 2141 |
int16 aExp, zExp; |
| 2142 |
bits32 aSig, zSig;
|
|
| 2143 |
bits64 rem, term;
|
|
| 2142 |
uint32_t aSig, zSig;
|
|
| 2143 |
uint64_t rem, term;
|
|
| 2144 | 2144 |
a = float32_squash_input_denormal(a STATUS_VAR); |
| 2145 | 2145 |
|
| 2146 | 2146 |
aSig = extractFloat32Frac( a ); |
| ... | ... | |
| 2170 | 2170 |
goto roundAndPack; |
| 2171 | 2171 |
} |
| 2172 | 2172 |
aSig >>= aExp & 1; |
| 2173 |
term = ( (bits64) zSig ) * zSig;
|
|
| 2174 |
rem = ( ( (bits64) aSig )<<32 ) - term;
|
|
| 2175 |
while ( (sbits64) rem < 0 ) {
|
|
| 2173 |
term = ( (uint64_t) zSig ) * zSig;
|
|
| 2174 |
rem = ( ( (uint64_t) aSig )<<32 ) - term;
|
|
| 2175 |
while ( (int64_t) rem < 0 ) {
|
|
| 2176 | 2176 |
--zSig; |
| 2177 |
rem += ( ( (bits64) zSig )<<1 ) | 1;
|
|
| 2177 |
rem += ( ( (uint64_t) zSig )<<1 ) | 1;
|
|
| 2178 | 2178 |
} |
| 2179 | 2179 |
zSig |= ( rem != 0 ); |
| 2180 | 2180 |
} |
| ... | ... | |
| 2225 | 2225 |
{
|
| 2226 | 2226 |
flag aSign; |
| 2227 | 2227 |
int16 aExp; |
| 2228 |
bits32 aSig;
|
|
| 2228 |
uint32_t aSig;
|
|
| 2229 | 2229 |
float64 r, x, xn; |
| 2230 | 2230 |
int i; |
| 2231 | 2231 |
a = float32_squash_input_denormal(a STATUS_VAR); |
| ... | ... | |
| 2273 | 2273 |
{
|
| 2274 | 2274 |
flag aSign, zSign; |
| 2275 | 2275 |
int16 aExp; |
| 2276 |
bits32 aSig, zSig, i;
|
|
| 2276 |
uint32_t aSig, zSig, i;
|
|
| 2277 | 2277 |
|
Also available in: Unified diff