pci: add W1C bits to pci status register
This patch adds W1C bit support in the initialization/reset of pcistatus registers.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
pcie_regs.h: more constants
Add constants for PCI AER log.
pcie/aer: helper functions for pcie aer capability
This patch implements helper functions for pcie aer capabilitywhich will be used later.
pcie_aer: get rid of recursion
Added some TODOs: they are trivial but omitted hereto make the patch logic as transparent as possible.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
pcie_aer: complete unwinding recursion
Open-code functions created in the previous patch,to make code more compact and clear.Detcted and documented what looks like a bug in codethat becomes apparent from this refactoring.
ioh3420: support aer
Add aer support.
x3130/upstream: support aer
add aer support.
x3130/downstream: support aer.
pci: fix bridge control bit wmask
Bits 12 to 15 in bridge control register are reserver and must beread-only zero, curent mask is 0xffff which makes them writeable. Fixthis up by using symbolic bit names for writeable bits instead of ahardcoded constant....
pcie/port: fix bridge control register wmask
pci generic layer initialized wmask for bridge control registeraccording to pci spec. pcie deviates slightly from it,so initialize it properly.
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