Revision bc814401
| b/target-mips/helper.c | ||
|---|---|---|
| 50 | 50 |
tlb = &env->tlb[i]; |
| 51 | 51 |
/* Check ASID, virtual page number & size */ |
| 52 | 52 |
if ((tlb->G == 1 || tlb->ASID == ASID) && |
| 53 |
tlb->VPN == tag && address < tlb->end2) {
|
|
| 53 |
tlb->VPN == tag) {
|
|
| 54 | 54 |
/* TLB match */ |
| 55 | 55 |
n = (address >> TARGET_PAGE_BITS) & 1; |
| 56 | 56 |
/* Check access rights */ |
| ... | ... | |
| 420 | 420 |
void invalidate_tlb (CPUState *env, int idx, int use_extra) |
| 421 | 421 |
{
|
| 422 | 422 |
tlb_t *tlb; |
| 423 |
target_ulong addr; |
|
| 424 | 423 |
uint8_t ASID; |
| 425 | 424 |
|
| 426 | 425 |
ASID = env->CP0_EntryHi & 0xFF; |
| ... | ... | |
| 441 | 440 |
return; |
| 442 | 441 |
} |
| 443 | 442 |
|
| 444 |
if (tlb->V0) {
|
|
| 445 |
addr = tlb->VPN; |
|
| 446 |
while (addr < tlb->end) {
|
|
| 447 |
tlb_flush_page (env, addr); |
|
| 448 |
addr += TARGET_PAGE_SIZE; |
|
| 449 |
} |
|
| 450 |
} |
|
| 451 |
if (tlb->V1) {
|
|
| 452 |
addr = tlb->end; |
|
| 453 |
while (addr < tlb->end2) {
|
|
| 454 |
tlb_flush_page (env, addr); |
|
| 455 |
addr += TARGET_PAGE_SIZE; |
|
| 456 |
} |
|
| 457 |
} |
|
| 443 |
if (tlb->V0) |
|
| 444 |
tlb_flush_page (env, tlb->VPN); |
|
| 445 |
if (tlb->V1) |
|
| 446 |
tlb_flush_page (env, tlb->VPN + TARGET_PAGE_SIZE); |
|
| 458 | 447 |
} |
| 459 |
|
|
| b/target-mips/op_helper.c | ||
|---|---|---|
| 387 | 387 |
static void fill_tlb (int idx) |
| 388 | 388 |
{
|
| 389 | 389 |
tlb_t *tlb; |
| 390 |
int size; |
|
| 391 | 390 |
|
| 392 | 391 |
/* XXX: detect conflicting TLBs and raise a MCHECK exception when needed */ |
| 393 | 392 |
tlb = &env->tlb[idx]; |
| 394 | 393 |
tlb->VPN = env->CP0_EntryHi & (int32_t)0xFFFFE000; |
| 395 | 394 |
tlb->ASID = env->CP0_EntryHi & 0xFF; |
| 396 |
size = env->CP0_PageMask >> 13; |
|
| 397 |
size = 4 * (size + 1); |
|
| 398 |
tlb->end = tlb->VPN + (1 << (8 + size)); |
|
| 399 |
tlb->end2 = tlb->end + (1 << (8 + size)); |
|
| 400 | 395 |
tlb->G = env->CP0_EntryLo0 & env->CP0_EntryLo1 & 1; |
| 401 | 396 |
tlb->V0 = (env->CP0_EntryLo0 & 2) != 0; |
| 402 | 397 |
tlb->D0 = (env->CP0_EntryLo0 & 4) != 0; |
| ... | ... | |
| 467 | 462 |
{
|
| 468 | 463 |
tlb_t *tlb; |
| 469 | 464 |
uint8_t ASID; |
| 470 |
int size; |
|
| 471 | 465 |
|
| 472 | 466 |
ASID = env->CP0_EntryHi & 0xFF; |
| 473 | 467 |
tlb = &env->tlb[env->CP0_index & (MIPS_TLB_NB - 1)]; |
| ... | ... | |
| 479 | 473 |
mips_tlb_flush_extra(env, MIPS_TLB_NB); |
| 480 | 474 |
|
| 481 | 475 |
env->CP0_EntryHi = tlb->VPN | tlb->ASID; |
| 482 |
size = (tlb->end - tlb->VPN) >> 12; |
|
| 483 |
env->CP0_PageMask = (size - 1) << 13; |
|
| 484 | 476 |
env->CP0_EntryLo0 = tlb->G | (tlb->V0 << 1) | (tlb->D0 << 2) | |
| 485 | 477 |
(tlb->C0 << 3) | (tlb->PFN[0] >> 6); |
| 486 | 478 |
env->CP0_EntryLo1 = tlb->G | (tlb->V1 << 1) | (tlb->D1 << 2) | |
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