Revision bd7d9a6d target-ppc/cpu.h

b/target-ppc/cpu.h
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#if defined (TARGET_PPC64)
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/* PowerPC 64 definitions */
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typedef uint64_t ppc_gpr_t;
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#define TARGET_LONG_BITS 64
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#define TARGET_PAGE_BITS 12
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#else /* defined (TARGET_PPC64) */
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/* PowerPC 32 definitions */
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typedef uint32_t ppc_gpr_t;
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#define TARGET_LONG_BITS 32
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#if defined(TARGET_PPCEMB)
......
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    /* First are the most commonly used resources
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     * during translated code execution
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     */
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#if (TARGET_LONG_BITS > HOST_LONG_BITS) || !defined(TARGET_PPC64)
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#if TARGET_LONG_BITS > HOST_LONG_BITS
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    target_ulong t0, t1, t2;
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#endif
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#if !defined(TARGET_PPC64)
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    /* temporary fixed-point registers
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     * used to emulate 64 bits registers on 32 bits hosts
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     * used to emulate 64 bits registers on 32 bits targets
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     */
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    uint64_t t0, t1, t2;
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    uint64_t t0_64, t1_64, t2_64;
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#endif
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    ppc_avr_t avr0, avr1, avr2;
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    /* general purpose registers */
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    ppc_gpr_t gpr[32];
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    target_ulong gpr[32];
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#if !defined(TARGET_PPC64)
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    /* Storage for GPR MSB, used by the SPE extension */
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    ppc_gpr_t gprh[32];
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    target_ulong gprh[32];
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#endif
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    /* LR */
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    target_ulong lr;
......
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    /* machine state register */
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    target_ulong msr;
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    /* temporary general purpose registers */
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    ppc_gpr_t tgpr[4]; /* Used to speed-up TLB assist handlers */
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    target_ulong tgpr[4]; /* Used to speed-up TLB assist handlers */
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    /* Floating point execution context */
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    /* temporary float registers */
......
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    ppc_avr_t avr[32];
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    uint32_t vscr;
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    /* SPE registers */
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    ppc_gpr_t spe_acc;
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    target_ulong spe_acc;
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    float_status spe_status;
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    uint32_t spe_fscr;
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